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- set TERM=xterm not xterm-color, release 9
[packages/X11.git] / X11-r300.patch
CommitLineData
6f126e99 1Index: radeon_accel.c
2===================================================================
3RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v
4retrieving revision 1.10
5diff -u -p -b -r1.10 radeon_accel.c
6--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c 12 Aug 2004 05:00:22 -0000 1.10
7+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c 15 Oct 2004 21:13:47 -0000
8@@ -168,6 +168,31 @@ void RADEONEngineReset(ScrnInfoPtr pScrn
9 CARD32 rbbm_soft_reset;
10 CARD32 host_path_cntl;
11
12+ /* The following RBBM_SOFT_RESET sequence can help un-wedge
13+ * an R300 after the command processor got stuck.
14+ */
15+ rbbm_soft_reset = INREG(RADEON_RBBM_SOFT_RESET);
16+ OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
17+ RADEON_SOFT_RESET_CP |
18+ RADEON_SOFT_RESET_HI |
19+ RADEON_SOFT_RESET_SE |
20+ RADEON_SOFT_RESET_RE |
21+ RADEON_SOFT_RESET_PP |
22+ RADEON_SOFT_RESET_E2 |
23+ RADEON_SOFT_RESET_RB));
24+ INREG(RADEON_RBBM_SOFT_RESET);
25+ OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset & (CARD32)
26+ ~(RADEON_SOFT_RESET_CP |
27+ RADEON_SOFT_RESET_HI |
28+ RADEON_SOFT_RESET_SE |
29+ RADEON_SOFT_RESET_RE |
30+ RADEON_SOFT_RESET_PP |
31+ RADEON_SOFT_RESET_E2 |
32+ RADEON_SOFT_RESET_RB)));
33+ INREG(RADEON_RBBM_SOFT_RESET);
34+ OUTREG(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset);
35+ INREG(RADEON_RBBM_SOFT_RESET);
36+
37 RADEONEngineFlush(pScrn);
38
39 clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
40@@ -531,6 +556,30 @@ void RADEONCPFlushIndirect(ScrnInfoPtr p
41 buffer->idx);
42 }
43
44+ /* TODO: Fix this more elegantly.
45+ * Sometimes (especially with multiple DRI clients), this code
46+ * runs immediately after a DRI client issues a rendering command.
47+ *
48+ * The accel code regularly inserts WAIT_UNTIL_IDLE into the
49+ * command buffer that is sent with the indirect buffer below.
50+ * The accel code fails to set the 3D cache flush registers for
51+ * the R300 before sending WAIT_UNTIL_IDLE. Sending a cache flush
52+ * on these new registers is not necessary for pure 2D functionality,
53+ * but it *is* necessary after 3D operations.
54+ * Without the cache flushes before WAIT_UNTIL_IDLE, the R300 locks up.
55+ *
56+ * The CP_IDLE call into the DRM indirectly flushes all caches and
57+ * thus avoids the lockup problem, but the solution is far from ideal.
58+ * Better solutions could be:
59+ * - always flush caches when entering the X server
60+ * - track the type of rendering commands somewhere and issue
61+ * cache flushes when they change
62+ * However, I don't feel confident enough with the control flow
63+ * inside the X server to implement either fix. -- nh
64+ */
65+ if (IS_R300_VARIANT)
66+ drmCommandNone(info->drmFD, DRM_RADEON_CP_IDLE);
67+
68 indirect.idx = buffer->idx;
69 indirect.start = start;
70 indirect.end = buffer->used;
71@@ -570,6 +619,10 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr
72 buffer->idx);
73 }
74
75+ /* Hack for the R300 (see RADEONCPFlushIndirect for explanation) */
76+ if (IS_R300_VARIANT)
77+ drmCommandNone(info->drmFD, DRM_RADEON_CP_IDLE);
78+
79 indirect.idx = buffer->idx;
80 indirect.start = start;
81 indirect.end = buffer->used;
82Index: radeon_common.h
83===================================================================
84RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h,v
85retrieving revision 1.3
86diff -u -p -b -r1.3 radeon_common.h
87--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h 16 Jun 2004 09:43:58 -0000 1.3
88+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h 15 Oct 2004 21:13:50 -0000
89@@ -93,7 +93,8 @@ typedef struct {
90 enum {
91 DRM_RADEON_INIT_CP = 0x01,
92 DRM_RADEON_CLEANUP_CP = 0x02,
93- DRM_RADEON_INIT_R200_CP = 0x03
94+ DRM_RADEON_INIT_R200_CP = 0x03,
95+ DRM_RADEON_INIT_R300_CP = 0x04
96 } func;
97 unsigned long sarea_priv_offset;
98 int is_pci;
99Index: radeon_dri.c
100===================================================================
101RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v
102retrieving revision 1.7
103diff -u -p -b -r1.7 radeon_dri.c
104--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c 12 Aug 2004 05:00:22 -0000 1.7
105+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c 15 Oct 2004 21:13:55 -0000
106@@ -1025,7 +1025,9 @@ static int RADEONDRIKernelInit(RADEONInf
107
108 memset(&drmInfo, 0, sizeof(drmRadeonInit));
109
110- if ( info->ChipFamily >= CHIP_FAMILY_R200 )
111+ if ( info->ChipFamily >= CHIP_FAMILY_R300 )
112+ drmInfo.func = DRM_RADEON_INIT_R300_CP;
113+ else if ( info->ChipFamily >= CHIP_FAMILY_R200 )
114 drmInfo.func = DRM_RADEON_INIT_R200_CP;
115 else
116 drmInfo.func = DRM_RADEON_INIT_CP;
117@@ -1184,6 +1186,12 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre
118 int major, minor, patch;
119 drmVersionPtr version;
120
121+ if (info->ChipFamily >= CHIP_FAMILY_R300) {
122+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
123+ "Direct rendering support is highly experimental for "
124+ "Radeon 9500/9700 and newer cards\n");
125+ }
126+
127 /* Check that the GLX, DRI, and DRM modules have been loaded by testing
128 * for known symbols in each module.
129 */
130@@ -1236,7 +1244,9 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre
131 info->pDRIInfo = pDRIInfo;
132 pDRIInfo->drmDriverName = RADEON_DRIVER_NAME;
133
134- if ( info->ChipFamily >= CHIP_FAMILY_R200 )
135+ if ( info->ChipFamily >= CHIP_FAMILY_R300 )
136+ pDRIInfo->clientDriverName = R300_DRIVER_NAME;
137+ else if ( info->ChipFamily >= CHIP_FAMILY_R200 )
138 pDRIInfo->clientDriverName = R200_DRIVER_NAME;
139 else
140 pDRIInfo->clientDriverName = RADEON_DRIVER_NAME;
141@@ -1371,6 +1381,9 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre
142 } else if (info->ChipFamily >= CHIP_FAMILY_R200) {
143 req_minor = 5;
144 req_patch = 0;
145+ } else if (info->ChipFamily >= CHIP_FAMILY_R300) {
146+ req_minor = 11;
147+ req_patch = 1;
148 } else {
149 #if X_BYTE_ORDER == X_LITTLE_ENDIAN
150 req_minor = 1;
151Index: radeon_driver.c
152===================================================================
153RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v
154retrieving revision 1.19
155diff -u -p -b -r1.19 radeon_driver.c
156--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c 25 Aug 2004 00:30:41 -0000 1.19
157+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c 15 Oct 2004 21:14:10 -0000
158@@ -4526,11 +4526,13 @@ Bool RADEONScreenInit(int scrnIndex, Scr
159 (pScrn->displayWidth * pScrn->virtualY *
160 info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024);
161 info->directRenderingEnabled = FALSE;
162+#if 0
163 } else if (info->ChipFamily >= CHIP_FAMILY_R300) {
164 info->directRenderingEnabled = FALSE;
165 xf86DrvMsg(scrnIndex, X_WARNING,
166 "Direct rendering not yet supported on "
167 "Radeon 9500 and newer cards\n");
168+#endif
169 } else if (info->IsSecondary) {
170 info->directRenderingEnabled = FALSE;
171 } else if (xf86IsEntityShared(info->pEnt->index)) {
172Index: radeon_version.h
173===================================================================
174RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h,v
175retrieving revision 1.2
176diff -u -p -b -r1.2 radeon_version.h
177--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h 23 Apr 2004 19:26:46 -0000 1.2
178+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h 15 Oct 2004 21:14:10 -0000
179@@ -38,6 +38,7 @@
180 #define RADEON_NAME "RADEON"
181 #define RADEON_DRIVER_NAME "radeon"
182 #define R200_DRIVER_NAME "r200"
183+#define R300_DRIVER_NAME "r300"
184
185 #define RADEON_VERSION_MAJOR 4
186 #define RADEON_VERSION_MINOR 0
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