--- SVGATextMode-1.10/XFREE/riva128_clock.c.orig	Tue Mar 18 12:07:39 2003
+++ SVGATextMode-1.10/XFREE/riva128_clock.c	Tue Mar 18 12:24:24 2003
@@ -83,6 +83,33 @@
 #define PCI_DEVICE_ID_NVIDIA_VTNT2     0x002C
 #define PCI_DEVICE_ID_NVIDIA_UVTNT2    0x002D
 #define PCI_DEVICE_ID_NVIDIA_ITNT2     0x00A0
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR        0x0100
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR        0x0101
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX400     0x0110
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX200     0x0111
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS       0x0150
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2      0x0151
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA     0x0152
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE3		0x0200
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_TI200	0x0201
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_TI500	0x0202
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX460	0x0170
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440	0x0171
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX420	0x0172
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440SE	0x0173
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440GO	0x0174
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420GO	0x0175
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420GO32	0x0176
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460GO	0x0177
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460GO64	0x0179
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_410GO16	0x017D
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440_AGP8x	0x0181
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440SE_AGP8x	0x0182
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX420_AGP8x	0x0183
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI4800	0x0280
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI4200_AGP8x	0x0281
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI4800SE	0x0282
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200GO	0x0286
 
 vgaPCIInformation *vgaPCIInfo;
 
@@ -92,14 +119,15 @@
 #define PRAMDAC_PLL_COEFF  0x00000508
 #define PRAMDAC_PLL_COEFF_SELECT   0x0000050C
 
+#define PEXTDEV_BASE	0x00101000
+
 #define NV3_MIN_CLOCK_IN_KHZ  25000    // Not sure about this, but it seems reasonable
 #define NV3_MAX_CLOCK_IN_KHZ 230000
 #define NV4_MAX_CLOCK_IN_KHZ 350000
 
 static int max_clock, is_nv3, pll_coeff;
 
-/* NTSC cards have approx 14.3Mhz. Need to detect, but leave for now*/
-#define PLL_INPUT_FREQ 13500 
+static int PLL_INPUT_FREQ;
 #define M_MIN 7
 #define M_MAX 13
 
@@ -176,7 +204,7 @@
 // Set the clock to the given speed (in KHz)
 Bool RIVA128ClockSelect( int clockspeed )
 {
-  int *ptr;
+  int *ptr, *ptr2;
 
   int out;
   int m, n, p, value;
@@ -205,7 +233,34 @@
                                pcr->_device == PCI_DEVICE_ID_NVIDIA_UTNT2 ||
                                pcr->_device == PCI_DEVICE_ID_NVIDIA_VTNT2 ||
                                pcr->_device == PCI_DEVICE_ID_NVIDIA_UVTNT2 ||
-                               pcr->_device == PCI_DEVICE_ID_NVIDIA_ITNT2)
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_ITNT2 ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX400 ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX200 ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2 ||
+                               pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE3 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE3_TI200 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE3_TI500 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX460 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX420 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440SE ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_440GO ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_420GO ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_420GO32 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_460GO ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_460GO64 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_410GO16 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440_AGP8x ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX440SE_AGP8x ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX420_AGP8x ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI4800 ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI4200_AGP8x ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI4800SE ||
+			       pcr->_device == PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200GO)
                        {
                                is_nv3 = 0;
                                pll_coeff = 0x00010700;
@@ -249,6 +304,24 @@
     return FALSE;
   }
     
+  ptr2 = (int*)mmap(0, 0x1000,PROT_READ|PROT_WRITE,MAP_SHARED, fd, (off_t)(pcr->_base0) + PEXTDEV_BASE);
+
+  if( ptr2 == (int*)-1 )
+  {
+    PERROR(( "Error mmap'ing /dev/mem" ));
+    return FALSE;
+  }
+
+  if(is_nv3)
+  {
+    PLL_INPUT_FREQ = (ptr2[0x00000000/4]&0x20) ? 13500 : 14318;
+  }
+  else
+  {
+    PLL_INPUT_FREQ = (ptr2[0x00000000/4]&0x40) ? 14318 : 13500;
+  }
+  munmap(ptr2, 0x1000);
+    
   close( fd );
 #else
   ptr=(int*) malloc(0x4000);