- memory barriers and fake CPU detection for ppc, sparc, x86_64

Changed files:
    glide-morearchs.patch -> 1.1

diff --git a/glide-morearchs.patch b/glide-morearchs.patch
new file mode 100644 (file)
index 0000000..ed0955b
--- /dev/null
+++ b/glide-morearchs.patch
@@ -0,0 +1,161 @@
+--- glide3x-20010309/h3/glide3/src/gpci.c.orig 2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h3/glide3/src/gpci.c      2004-01-17 18:51:34.000000000 +0000
+@@ -901,7 +901,13 @@
+   _GlideRoot.environment.gammaG = GLIDE_FGETENV("SSTH3_GGAMMA", -1.f);
+   _GlideRoot.environment.gammaB = GLIDE_FGETENV("SSTH3_BGAMMA", -1.f);
+ 
+-  _GlideRoot.CPUType                       = GLIDE_GETENV("FX_CPU", _cpu_detect_asm() );    
++  _GlideRoot.CPUType                       = GLIDE_GETENV("FX_CPU",
++#ifdef __i386__
++      _cpu_detect_asm()
++#else
++      0
++#endif
++      );
+   GDBG_INFO(0,"               cpu: 0x%x\n",_GlideRoot.CPUType);
+ 
+   /* Setup the basic proc tables based on the cpu type. */
+--- glide3x-20010309/h3/glide3/src/fxglide.h.orig      2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h3/glide3/src/fxglide.h   2004-01-17 18:33:30.000000000 +0000
+@@ -1494,6 +1494,14 @@
+ # define P6FENCE asm volatile ("mf.a" ::: "memory");
+ #elif defined(__alpha__)
+ # define P6FENCE asm volatile("mb" ::: "memory");
++#elif defined(__powerpc__)
++# define P6FENCE asm volatile ("sync" ::: "memory");
++#elif defined (__x86_64__)
++# define P6FENCE asm volatile("mfence" ::: "memory");
++#elif defined(__sparc64__)
++# define P6FENCE asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory");
++#elif defined(__sparc__)
++# define P6FENCE asm volatile("" ::: "memory");
+ #else  /* !defined ( P6FENCE ) */
+ #  error "P6 Fencing code needs to be added for this compiler"
+ #endif /* !defined ( P6FENCE ) */
+--- glide3x-20010309/h3/glide3/src/cpudtect.S.orig     2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h3/glide3/src/cpudtect.S  2004-01-17 18:49:43.000000000 +0000
+@@ -71,7 +71,7 @@
+        ret $31,($26),1
+        .end _cpu_detect_asm
+ 
+-#else /* !__ia64__ */
++#elif defined(__i386__) /* !__ia64__ */
+ 
+ .file "cpudtect.asm"
+ 
+--- glide3x-20010309/h3/minihwc/linhwc.c.dri.orig      2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h3/minihwc/linhwc.c.dri   2004-01-17 18:32:57.000000000 +0000
+@@ -71,6 +71,14 @@
+ # define P6FENCE asm volatile("mf.a" ::: "memory");
+ #elif defined(__alpha__)
+ # define P6FENCE asm volatile("mb" ::: "memory");
++#elif defined(__powerpc__)
++# define P6FENCE asm volatile ("sync" ::: "memory");
++#elif defined (__x86_64__)
++# define P6FENCE asm volatile("mfence" ::: "memory");
++#elif defined(__sparc64__)
++# define P6FENCE asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory");
++#elif defined(__sparc__)
++# define P6FENCE asm volatile("" ::: "memory");
+ #else
+ # define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
+ #endif
+--- glide3x-20010309/h3/minihwc/linhwc.c.save.orig     2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h3/minihwc/linhwc.c.save  2004-01-17 18:33:13.000000000 +0000
+@@ -68,6 +68,14 @@
+ # define P6FENCE asm volatile ("mf.a" ::: "memory");
+ #elif defined(__alpha__)
+ # define P6FENCE asm volatile("mb" ::: "memory");
++#elif defined(__powerpc__)
++# define P6FENCE asm volatile ("sync" ::: "memory");
++#elif defined (__x86_64__)
++# define P6FENCE asm volatile("mfence" ::: "memory");
++#elif defined(__sparc64__)
++# define P6FENCE asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory");
++#elif defined(__sparc__)
++# define P6FENCE asm volatile("" ::: "memory");
+ #else
+ # define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
+ #endif
+--- glide3x-20010309/h5/glide3/src/fxglide.h.orig      2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h5/glide3/src/fxglide.h   2004-01-17 18:31:36.000000000 +0000
+@@ -2100,6 +2100,14 @@
+ # define P6FENCE asm volatile ("mf.a" ::: "memory");
+ #elif defined(__alpha__)
+ # define P6FENCE asm volatile("mb" ::: "memory");
++#elif defined(__powerpc__)
++# define P6FENCE asm volatile ("sync" ::: "memory");
++#elif defined(__x86_64__)
++# define P6FENCE asm volatile ("mfence" ::: "memory");
++#elif defined(__sparc64__)
++# define P6FENCE asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory");
++#elif defined(__sparc__)
++# define P6FENCE asm volatile("" ::: "memory");
+ #else  /* !defined ( P6FENCE ) */
+ #  error "P6 Fencing code needs to be added for this compiler"
+ #endif /* !defined ( P6FENCE ) */
+--- glide3x-20010309/h5/glide3/src/cpudtect.s.orig     2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h5/glide3/src/cpudtect.s  2004-01-17 18:46:25.000000000 +0000
+@@ -81,7 +81,7 @@
+        ret $31,($26),1
+        .end _cpu_detect_asm
+ 
+-#else /* !__ia64__ */
++#elif defined(__i386__) /* !__ia64__ */
+ 
+ 
+ .file "cpudtect.asm"
+--- glide3x-20010309/h5/glide3/src/gpci.c.orig 2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h5/glide3/src/gpci.c      2004-01-17 18:48:53.000000000 +0000
+@@ -1571,7 +1571,13 @@
+   
+   _GlideRoot.environment.useAppGamma  = GLIDE_GETENV("FX_GLIDE_USE_APP_GAMMA", 1L);
+ 
+-  _GlideRoot.CPUType                       = GLIDE_GETENV("FX_CPU", _cpu_detect_asm() );    
++  _GlideRoot.CPUType                       = GLIDE_GETENV("FX_CPU", 
++#ifdef __i386__
++      _cpu_detect_asm()
++#else
++      0
++#endif
++      );    
+   GDBG_INFO(0,"               cpu: 0x%x\n",_GlideRoot.CPUType);
+ 
+   /* Setup the basic proc tables based on the cpu type. */
+--- glide3x-20010309/h5/minihwc/linhwc.c.orig  2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/h5/minihwc/linhwc.c       2004-01-17 18:29:36.000000000 +0000
+@@ -71,6 +71,14 @@
+ # define P6FENCE asm volatile("mf.a" ::: "memory");
+ #elif defined (__alpha__)
+ # define P6FENCE asm volatile("mb" ::: "memory");
++#elif defined (__powerpc__)
++# define P6FENCE asm volatile("sync" ::: "memory");
++#elif defined (__x86_64__)
++# define P6FENCE asm volatile("mfence" ::: "memory");
++#elif defined(__sparc64__)
++# define P6FENCE asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory");
++#elif defined(__sparc__)
++# define P6FENCE asm volatile("" ::: "memory");
+ #else
+ # define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
+ #endif
+--- glide3x-20010309/swlibs/newpci/pcilib/fxlinux.c.orig       2004-01-17 17:28:19.000000000 +0000
++++ glide3x-20010309/swlibs/newpci/pcilib/fxlinux.c    2004-01-17 17:44:36.000000000 +0000
+@@ -26,7 +26,17 @@
+ #include <sys/stat.h>
+ #include <sys/mman.h>
+ #include <sys/ioctl.h>
++#if defined(__powerpc__) || defined(__sparc__)
++#define iopl(X) (-1)
++#define outb(D,P)
++#define outw(D,P)
++#define outl(D,P)
++#define inb(P) 0
++#define inw(P) 0
++#define inl(P) 0
++#else
+ #include <sys/io.h>
++#endif
+ #include <fcntl.h>
+ #include "fxpci.h"
+ #include "pcilib.h"