]> git.pld-linux.org Git - packages/Glide_V3-DRI.git/blame - glide-ia64.patch
- dropped pre-cvs changelog
[packages/Glide_V3-DRI.git] / glide-ia64.patch
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1--- Glide3/cvg/glide3/src/makefile.linux.ia64-foo Thu Dec 21 14:30:58 2000
2+++ Glide3/cvg/glide3/src/makefile.linux Thu Dec 21 14:31:48 2000
3@@ -19,10 +19,16 @@
4
5 TAG_REGEXP = $(BUILD_ROOT)/$(FX_GLIDE_HW)/$(FX_HW_PROJECTS)/src/glide.rx
6
7+ARCH := $(patsubst sparc64,sparc,$(patsubst i%86,i386,$(shell uname -m)))
8+
9 # Compile for specific hardware
10 ifeq ($(FX_GLIDE_HW),cvg)
11 FX_GLIDE_REAL_HW= 1
12+ifeq (i386,$(ARCH))
13 FX_GLIDE_CTRISETUP = 0
14+else
15+FX_GLIDE_CTRISETUP = 1
16+endif
17
18 HWSPEC = fifo.c
19 LCDEFS += -DCVG \
20--- Glide3/h3/glide3/src/cpudtect.S.ia64-foo Wed Nov 24 16:44:53 1999
21+++ Glide3/h3/glide3/src/cpudtect.S Thu Dec 21 16:38:48 2000
22@@ -48,7 +48,30 @@
23 /* 2 3/04/97 9:10p Dow */
24 /* Neutered mutiplatform multiheaded monster. */
25
26+#ifdef __ia64__
27
28+ .align 32
29+ .global _cpu_detect_asm
30+ .proc _cpu_detect_asm
31+
32+_cpu_detect_asm:
33+ mov ret0=0
34+ br.ret.sptk.few b0
35+
36+ .end _cpu_detect_asm
37+
38+#elif defined(__alpha__) /* !__ia64__ */
39+
40+ .align 4
41+ .globl _cpu_detect_asm
42+ .ent _cpu_detect_asm
43+_cpu_detect_asm:
44+ .prologue 0
45+ mov $31,$0
46+ ret $31,($26),1
47+ .end _cpu_detect_asm
48+
49+#else /* !__ia64__ */
50
51 .file "cpudtect.asm"
52
53@@ -324,3 +347,5 @@
54 .size double_precision_asm,.L_END_double_precision_asm-double_precision_asm
55
56 .end
57+
58+#endif /* !__ia64__ */
59--- Glide3/h3/glide3/src/diget.c.ia64-foo Wed Nov 24 16:44:54 1999
60+++ Glide3/h3/glide3/src/diget.c Thu Dec 21 14:27:40 2000
61@@ -615,10 +615,10 @@
62 break;
63
64 case GR_SURFACE_TEXTURE:
65- if (plength == 4) {
66+ if (plength == sizeof(long)) {
67 GR_DCL_GC;
68
69- *params = (FxU32) &gc->tBuffer;
70+ *(long *)params = (long) &gc->tBuffer;
71 retVal = plength;
72 }
73 break;
74--- Glide3/h3/glide3/src/disst.c.ia64-foo Wed Nov 24 16:44:54 1999
75+++ Glide3/h3/glide3/src/disst.c Thu Dec 21 14:27:40 2000
76@@ -183,7 +183,7 @@
77 GrErrorCallback( "grSstSelect: non-existent SST", FXTRUE );
78
79 _GlideRoot.current_sst = which;
80- setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] );
81+ setThreadValue( (long)&_GlideRoot.GCs[_GlideRoot.current_sst] );
82
83 #ifdef GLIDE_MULTIPLATFORM
84 _GlideRoot.curGCFuncs = _GlideRoot.curGC->gcFuncs;
85--- Glide3/h3/glide3/src/distrip.c.ia64-foo Wed Nov 24 16:44:54 1999
86+++ Glide3/h3/glide3/src/distrip.c Thu Dec 21 14:27:40 2000
87@@ -544,10 +544,10 @@
88 else {
89 void *b_ptr, *c_ptr;
90 while ((int)Count >= 3) {
91- b_ptr = (void *)((FxU32)pointers + stride);
92- c_ptr = (void *)((FxU32)pointers + stride*2);
93+ b_ptr = (void *)((long)pointers + stride);
94+ c_ptr = (void *)((long)pointers + stride*2);
95 TRISETUP(pointers, b_ptr, c_ptr);
96- pointers = (void *)((FxU32)c_ptr + stride);
97+ pointers = (void *)((long)c_ptr + stride);
98 Count -= 3;
99 }
100 }
101--- Glide3/h3/glide3/src/fifo.c.ia64-foo Wed Nov 24 16:44:55 1999
102+++ Glide3/h3/glide3/src/fifo.c Thu Dec 21 14:27:40 2000
103@@ -475,7 +475,7 @@
104 } ;
105
106
107-#define GEN_INDEX(a) ((((FxU32) a) - ((FxU32) gc->reg_ptr)) >> 2)
108+#define GEN_INDEX(a) ((((long) a) - ((long) gc->reg_ptr)) >> 2)
109
110 void
111 _grFifoWriteDebug(FxU32 addr, FxU32 val, FxU32 fifoPtr)
112@@ -833,7 +833,9 @@
113 gc->contextP = 1;
114 #endif
115 if (gc->contextP) {
116+#if 0
117 FxU32 wrapAddr = 0x00UL;
118+#endif
119 FxU32 checks;
120
121 GR_ASSERT(blockSize > 0);
122@@ -973,7 +975,9 @@
123
124 P6FENCE;
125
126+#if 0
127 wrapAddr = (FxU32)gc->cmdTransportInfo.fifoPtr;
128+#endif
129
130 /* Update roomXXX fields for the actual wrap */
131 gc->cmdTransportInfo.roomToReadPtr -= gc->cmdTransportInfo.roomToEnd;
132@@ -1047,10 +1051,10 @@
133 }
134
135
136-FxU32
137+long
138 _grHwFifoPtr(FxBool ignored)
139 {
140- FxU32 rVal = 0;
141+ long rVal = 0;
142
143 FxU32 status, readPtrL1, readPtrL2;
144 GR_DCL_GC;
145@@ -1069,7 +1073,7 @@
146 #endif
147 readPtrL2 = GET(gc->cRegs->cmdFifo0.readPtrL);
148 } while (readPtrL1 != readPtrL2);
149- rVal = (((FxU32)gc->cmdTransportInfo.fifoStart) +
150+ rVal = (((long)gc->cmdTransportInfo.fifoStart) +
151 readPtrL2 -
152 (FxU32)gc->cmdTransportInfo.fifoOffset);
153 }
154@@ -1191,13 +1195,13 @@
155 gcFifo=&gc->cmdTransportInfo;
156 readPos=readPos-gcFifo->fifoOffset;
157 gcFifo->fifoPtr = gcFifo->fifoStart + (readPos>>2);
158- gcFifo->fifoRead = (FxU32)gcFifo->fifoPtr;
159+ gcFifo->fifoRead = (long)gcFifo->fifoPtr;
160 #else
161 gcFifo=&gc->cmdTransportInfo;
162 gcFifo->fifoPtr = gc->rawLfb+(fifoPtr>>2);
163 gcFifo->fifoRead = ((int)gc->rawLfb)+fifoRead;
164 #endif
165- gcFifo->roomToReadPtr = gcFifo->fifoRead-((int)gcFifo->fifoPtr)-FIFO_END_ADJUST-sizeof(FxU32);
166+ gcFifo->roomToReadPtr = gcFifo->fifoRead-((long)gcFifo->fifoPtr)-FIFO_END_ADJUST-sizeof(FxU32);
167 if (gcFifo->roomToReadPtr<0) gcFifo->roomToReadPtr+=gcFifo->fifoSize;
168 gcFifo->roomToEnd = gcFifo->fifoSize -
169 ((gcFifo->fifoPtr-gcFifo->fifoStart)<<2) -
170@@ -1215,7 +1219,7 @@
171 GR_DCL_GC;
172 gcFifo=&gc->cmdTransportInfo;
173 *fifoPtr=(gcFifo->fifoPtr-gc->rawLfb)<<2;
174- *fifoRead=(gcFifo->fifoRead-(int)gc->rawLfb);
175+ *fifoRead=(gcFifo->fifoRead-(long)gc->rawLfb);
176 }
177
178 #endif
179--- Glide3/h3/glide3/src/fxcmd.h.ia64-foo Wed Nov 24 16:44:55 1999
180+++ Glide3/h3/glide3/src/fxcmd.h Thu Dec 21 14:27:40 2000
181@@ -182,7 +182,7 @@
182 /* NB: This should be used sparingly because it does a 'real' hw read
183 * which is *SLOW*.
184 */
185-FxU32 _grHwFifoPtr(FxBool);
186+long _grHwFifoPtr(FxBool);
187 #define HW_FIFO_PTR(a) _grHwFifoPtr(a)
188
189 #if FIFO_ASSERT_FULL
190@@ -716,8 +716,8 @@
191
192 #define REG_GROUP_END() \
193 ASSERT(_checkP); \
194- ASSERT((((FxU32)_regGroupFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) >> 2) == _groupNum + 1); \
195- gc->cmdTransportInfo.fifoRoom -= ((FxU32)_regGroupFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
196+ ASSERT((((long)_regGroupFifoPtr - (long)gc->cmdTransportInfo.fifoPtr) >> 2) == _groupNum + 1); \
197+ gc->cmdTransportInfo.fifoRoom -= ((long)_regGroupFifoPtr - (long)gc->cmdTransportInfo.fifoPtr); \
198 gc->cmdTransportInfo.fifoPtr = (FxU32*)_regGroupFifoPtr; \
199 GDBG_INFO(gc->myLevel + 200, "\tGroupEnd: (0x%X : 0x%X)\n", \
200 gc->cmdTransportInfo.fifoPtr, gc->cmdTransportInfo.fifoRoom); \
201@@ -1028,7 +1028,7 @@
202
203 #define TRI_END \
204 TRI_ASSERT(); \
205- gc->cmdTransportInfo.fifoRoom -= ((FxU32)tPackPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
206+ gc->cmdTransportInfo.fifoRoom -= ((long)tPackPtr - (long)gc->cmdTransportInfo.fifoPtr); \
207 gc->cmdTransportInfo.fifoPtr = tPackPtr; \
208 GDBG_INFO(gc->myLevel + 200, "\tTriEnd: (0x%X : 0x%X)\n", tPackPtr, gc->cmdTransportInfo.fifoRoom); \
209 FIFO_ASSERT(); \
210@@ -1047,12 +1047,12 @@
211 GR_CHECK_COMPATABILITY(FN_NAME, \
212 !gc->open, \
213 "Called before grSstWinOpen()"); \
214- GR_ASSERT(((FxU32)(packetPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \
215+ GR_ASSERT(((long)(packetPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \
216 GR_ASSERT((__numWords) > 0); /* packet size */ \
217 GR_ASSERT((__numWords) < ((0x01 << 19) - 2)); \
218 GR_ASSERT((((FxU32)(__numWords) + 2) << 2) <= (FxU32)gc->cmdTransportInfo.fifoRoom); \
219- GR_ASSERT(((FxU32)packetPtr + (((__numWords) + 2) << 2)) < \
220- (FxU32)gc->cmdTransportInfo.fifoEnd); \
221+ GR_ASSERT(((unsigned long)packetPtr + (((__numWords) + 2) << 2)) < \
222+ (unsigned long)gc->cmdTransportInfo.fifoEnd); \
223 GR_ASSERT((hdr2 & 0xE0000000UL) == 0x00UL); \
224 GR_ASSERT(((__addr) & 0x03UL) == 0x00UL); \
225 FIFO_ASSERT(); \
226@@ -1097,8 +1097,8 @@
227
228 #define FIFO_LINEAR_WRITE_END \
229 DEBUGFIFODUMP_LINEAR(gc->cmdTransportInfo.fifoPtr); \
230- GR_ASSERT((((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) >> 2) == __writeSize + 2); \
231- gc->cmdTransportInfo.fifoRoom -= ((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
232+ GR_ASSERT((((long)packetPtr - (long)gc->cmdTransportInfo.fifoPtr) >> 2) == __writeSize + 2); \
233+ gc->cmdTransportInfo.fifoRoom -= ((long)packetPtr - (long)gc->cmdTransportInfo.fifoPtr); \
234 gc->cmdTransportInfo.fifoPtr = packetPtr; \
235 GDBG_INFO(gc->myLevel + 200, "\tLinearEnd: (0x%X : 0x%X)\n", \
236 packetPtr, gc->cmdTransportInfo.fifoRoom); \
237@@ -1312,7 +1312,7 @@
238 #define REG_GROUP_SETF_CLAMP(__regBase, __regAddr, __val) \
239 do { \
240 const FxU32 fpClampVal = FP_FLOAT_CLAMP(__val); \
241- REG_GROUP_ASSERT(__regAddr, fpClampVal, FXTRUE); \
242+ REG_GROUP_ASSERT(__regAddr, fpClampVal, FXTRUE); \
243 SET(((FxU32*)(__regBase))[offsetof(SstRegs, __regAddr) >> 2], fpClampVal); \
244 GR_INC_SIZE(sizeof(FxU32)); \
245 } while(0)
246@@ -1512,7 +1512,7 @@
247 } \
248 else { \
249 FxU32 argb; \
250- argb = *((FxU32 *)((int)_s + i)) & 0x00ffffff; \
251+ argb = *((FxU32 *)((long)_s + i)) & 0x00ffffff; \
252 TRI_SETF(*((float *)&argb)); \
253 dataElem++; \
254 i = gc->tsuDataList[dataElem]; \
255--- Glide3/h3/glide3/src/fxglide.h.ia64-foo Fri Nov 24 13:36:48 2000
256+++ Glide3/h3/glide3/src/fxglide.h Thu Dec 21 14:27:40 2000
257@@ -1053,7 +1053,7 @@
258 SET(*curFifoPtr++, *curPktData++); \
259 } \
260 GR_INC_SIZE((__writeCount) * sizeof(FxU32)); \
261- gc->cmdTransportInfo.fifoRoom -= ((FxU32)curFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
262+ gc->cmdTransportInfo.fifoRoom -= ((long)curFifoPtr - (long)gc->cmdTransportInfo.fifoPtr); \
263 gc->cmdTransportInfo.fifoPtr = curFifoPtr; \
264 } \
265 GR_CHECK_SIZE(); \
266@@ -1172,7 +1172,7 @@
267 */
268
269 FxU32* fifoPtr; /* Current write pointer into fifo */
270- FxU32 fifoRead; /* Last known hw read ptr.
271+ long fifoRead; /* Last known hw read ptr.
272 * If on an sli enabled system this will be
273 * the 'closest' hw read ptr of the sli
274 * master and slave.
275@@ -1258,11 +1258,12 @@
276 curBuffer,
277 frontBuffer,
278 backBuffer,
279- buffers[4],
280+ buffers[4];
281+ long
282 lfbBuffers[4]; /* Tile relative addresses of the color/aux
283 * buffers for lfbReads.
284 */
285- FxU32 lockPtrs[2]; /* pointers to locked buffers */
286+ long lockPtrs[2]; /* pointers to locked buffers */
287 FxU32 fbStride;
288
289 struct {
290@@ -1489,6 +1490,10 @@
291 # define P6FENCE __eieio()
292 #elif defined(__GNUC__) && defined(__i386__)
293 #define P6FENCE asm("xchg %%eax, %0" : : "m" (_GlideRoot.p6Fencer) : "eax");
294+#elif defined(__GNUC__) && defined(__ia64__)
295+# define P6FENCE asm volatile ("mf.a" ::: "memory");
296+#elif defined(__alpha__)
297+# define P6FENCE asm volatile("mb" ::: "memory");
298 #else /* !defined ( P6FENCE ) */
299 # error "P6 Fencing code needs to be added for this compiler"
300 #endif /* !defined ( P6FENCE ) */
301@@ -1824,7 +1829,7 @@
302 #endif
303
304 #ifdef __linux__
305-extern FxU32 threadValueLinux;
306+extern long threadValueLinux;
307 #define getThreadValueFast() threadValueLinux
308 #endif
309
310@@ -1839,9 +1844,9 @@
311 initThreadStorage( void );
312
313 void
314-setThreadValue( FxU32 value );
315+setThreadValue( long value );
316
317-FxU32
318+long
319 getThreadValueSLOW( void );
320
321 void
322@@ -2119,7 +2124,11 @@
323 #if defined(GLIDE_SANITY_ASSERT)
324 #define GR_ASSERT(exp) ((void)((!(exp)) ? (_grAssert(#exp, __FILE__, __LINE__),0) : 0xFFFFFFFF))
325 #else
326-#define GR_ASSERT(exp) ((void)(0 && ((FxU32)(exp))))
327+# ifdef __GNUC__
328+# define GR_ASSERT(exp) ((void) 0)
329+# else
330+# define GR_ASSERT(exp) ((void)(0 && ((FxU32)(exp))))
331+# endif
332 #endif
333
334 #define INTERNAL_CHECK(__name, __cond, __msg, __fatalP) \
335@@ -2189,7 +2198,7 @@
336 #define HW_TEX_PTR(__b) ((FxU32*)(((FxU32)(__b)) + HW_TEXTURE_OFFSET))
337
338 /* access a floating point array with a byte index */
339-#define FARRAY(p,i) (*(float *)((i)+(int)(p)))
340+#define FARRAY(p,i) (*(float *)((i)+(long)(p)))
341 #define ArraySize(__a) (sizeof(__a) / sizeof((__a)[0]))
342
343 #if GDBG_INFO_ON
344--- Glide3/h3/glide3/src/g3df.c.ia64-foo Wed Nov 24 16:44:56 1999
345+++ Glide3/h3/glide3/src/g3df.c Thu Dec 21 14:27:40 2000
346@@ -70,6 +70,7 @@
347 * Added GR_DIENTRY for di glide functions
348 **
349 */
350+#include <ctype.h>
351 #include <stdio.h>
352 #include <string.h>
353 #include <3dfx.h>
354--- Glide3/h3/glide3/src/gaa.c.ia64-foo Wed Nov 24 16:44:56 1999
355+++ Glide3/h3/glide3/src/gaa.c Thu Dec 21 14:27:40 2000
356@@ -378,8 +378,8 @@
357 }
358 else {
359 ia = gc->state.vData.pargbInfo.offset;
360- *((FxU32 *)&v1a)=*((FxU32 *)((int)a + ia))&0x00ffffff;
361- *((FxU32 *)&v2a)=*((FxU32 *)((int)b + ia))&0x00ffffff;
362+ *((FxU32 *)&v1a)=*((FxU32 *)((long)a + ia))&0x00ffffff;
363+ *((FxU32 *)&v2a)=*((FxU32 *)((long)b + ia))&0x00ffffff;
364 }
365
366 {
367@@ -678,7 +678,7 @@
368 FxU32 argb;
369
370 if (i == ia) {
371- argb = *((FxU32 *)((int)e + i)) & 0x00ffffff;
372+ argb = *((FxU32 *)((long)e + i)) & 0x00ffffff;
373 TRI_SETF(*((float *)&argb));
374 }
375 else {
376@@ -855,8 +855,8 @@
377 ady = -ady;
378
379 if (gc->state.vData.colorType != GR_FLOAT) {
380- *((FxU32 *)&v1a)=*((FxU32 *)((int)v1 + ia))&0x00ffffff;
381- *((FxU32 *)&v2a)=*((FxU32 *)((int)v2 + ia))&0x00ffffff;
382+ *((FxU32 *)&v1a)=*((FxU32 *)((long)v1 + ia))&0x00ffffff;
383+ *((FxU32 *)&v2a)=*((FxU32 *)((long)v2 + ia))&0x00ffffff;
384 }
385
386 if (adx >= ady) { /* X major line */
387@@ -1255,8 +1255,8 @@
388 }
389 else {
390 ia = gc->state.vData.pargbInfo.offset;
391- *((FxU32 *)&v1a)=*((FxU32 *)((int)a + ia))&0x00ffffff;
392- *((FxU32 *)&v2a)=*((FxU32 *)((int)b + ia))&0x00ffffff;
393+ *((FxU32 *)&v1a)=*((FxU32 *)((long)a + ia))&0x00ffffff;
394+ *((FxU32 *)&v2a)=*((FxU32 *)((long)b + ia))&0x00ffffff;
395 }
396
397 {
398--- Glide3/h3/glide3/src/gdraw.c.ia64-foo Tue Feb 15 17:35:58 2000
399+++ Glide3/h3/glide3/src/gdraw.c Thu Dec 21 14:27:40 2000
400@@ -233,13 +233,15 @@
401 GR_ENTRY(grDrawLine, void, (const void *a, const void *b))
402 {
403 #define FN_NAME "grDrawLine"
404+ const void *vertices[2] = {a, b};
405+
406 GR_BEGIN_NOFIFOCHECK(FN_NAME, 91);
407 GDBG_INFO_MORE(gc->myLevel, "(a = 0x%x, b = 0x%x)\n", a, b);
408
409 if (gc->state.grEnableArgs.primitive_smooth_mode & GR_AA_ORDERED_LINES_MASK)
410- _grAADrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, (void *)&a);
411+ _grAADrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, vertices);
412 else
413- _grDrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, (void *)&a);
414+ _grDrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, vertices);
415 #undef FN_NAME
416 } /* grDrawLine */
417
418@@ -323,7 +325,7 @@
419 GR_INC_SIZE(sizeof(FxU32))
420
421 #define DA_END \
422- gc->cmdTransportInfo.fifoRoom -= ((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
423+ gc->cmdTransportInfo.fifoRoom -= ((long)packetPtr - (long)gc->cmdTransportInfo.fifoPtr); \
424 gc->cmdTransportInfo.fifoPtr = packetPtr; \
425 FIFO_ASSERT(); \
426 }
427@@ -348,7 +350,7 @@
428 * except the data set up is from the pointer array and
429 * its data layout
430 */
431- FxI32 stride = mode;
432+ FxI32 stride;
433
434 /* we snap to an integer by adding a large enough number that it
435 * shoves all fraction bits off the right side of the mantissa.
436@@ -382,8 +384,10 @@
437 */
438 #define POINTS_BUFFER 100
439
440- if (stride == 0)
441+ if (mode == 0)
442 stride = gc->state.vData.vStride;
443+ else
444+ stride = sizeof(float *) / sizeof (float);
445
446 if (gc->state.grCoordinateSpaceArgs.coordinate_space_mode == GR_WINDOW_COORDS) {
447 while (count > 0) {
448@@ -573,7 +577,7 @@
449 int j;
450 FxI32 sCount;
451 FxU32 vertexParamOffset;
452- FxI32 stride = mode;
453+ FxI32 stride;
454
455 #define DX gc->pool.ftemp1
456 #define ADY gc->pool.ftemp2
457@@ -589,8 +593,11 @@
458
459 #define LINES_BUFFER 100
460
461- if (stride == 0)
462+ if (mode == 0)
463 stride = gc->state.vData.vStride;
464+ else
465+ stride = sizeof(float *) / sizeof (float);
466+
467 if (ltype == GR_LINES)
468 sCount = count >> 1; /* line list */
469 else
470@@ -618,16 +625,16 @@
471 ** compute absolute deltas and draw from low Y to high Y
472 */
473 ADY = FARRAY(b, gc->state.vData.vertexInfo.offset+4) - FARRAY(a, gc->state.vData.vertexInfo.offset+4);
474- i = *(long *)&ADY;
475+ i = *(int *)&ADY;
476 if (i < 0) {
477 float *tv;
478 tv = a; a = b; b = tv;
479 i ^= 0x80000000; /* ady = -ady; */
480- (*(long *)&ADY) = i;
481+ (*(int *)&ADY) = i;
482 }
483
484 DX = FARRAY(b, gc->state.vData.vertexInfo.offset) - FARRAY(a, gc->state.vData.vertexInfo.offset);
485- j = *(long *)&DX;
486+ j = *(int *)&DX;
487 if (j < 0) {
488 j ^= 0x80000000; /* adx = -adx; */
489 }
490@@ -797,7 +804,7 @@
491 ** compute absolute deltas and draw from low Y to high Y
492 */
493 ADY = tmp2 - tmp1;
494- i = *(long *)&ADY;
495+ i = *(int *)&ADY;
496 if (i < 0) {
497 float *tv;
498 owa = oowb; owb = oowa;
499@@ -805,7 +812,7 @@
500 fby = tmp1;
501 tv = a; a = b; b = tv;
502 i ^= 0x80000000; /* ady = -ady; */
503- (*(long *)&ADY) = i;
504+ (*(int *)&ADY) = i;
505 }
506 fax = FARRAY(a, gc->state.vData.vertexInfo.offset)
507 *owa*gc->state.Viewport.hwidth+gc->state.Viewport.ox;
508@@ -813,7 +820,7 @@
509 *owb*gc->state.Viewport.hwidth+gc->state.Viewport.ox;
510
511 DX = fbx - fax;
512- j = *(long *)&DX;
513+ j = *(int *)&DX;
514 if (j < 0) {
515 j ^= 0x80000000; /* adx = -adx; */
516 }
517@@ -901,7 +908,7 @@
518 vSize,
519 #endif
520 k;
521- FxI32 stride = mode;
522+ FxI32 stride;
523 float *vPtr;
524
525 GR_BEGIN_NOFIFOCHECK(FN_NAME, 90);
526@@ -917,9 +924,10 @@
527 GDBG_INFO(110, "%s: paramMask = 0x%x\n", FN_NAME, gc->cmdTransportInfo.paramMask);
528 #endif
529
530- if (stride == 0)
531+ if (mode == 0)
532 stride = gc->state.vData.vStride;
533-
534+ else
535+ stride = sizeof(float *) / sizeof (float);
536
537 gc->stats.trisProcessed+=(count/3);
538
539--- Glide3/h3/glide3/src/gerror.c.ia64-foo Tue Feb 15 17:35:58 2000
540+++ Glide3/h3/glide3/src/gerror.c Thu Dec 21 14:27:40 2000
541@@ -280,7 +280,7 @@
542
543 gdbg_printf("Command Fifo:\n");
544 gdbg_printf("\tSoftware:\n");
545- gdbg_printf("\t\tfifoPtr: 0x%X\n", (FxU32)gc->cmdTransportInfo.fifoPtr - (FxU32) gc->rawLfb);
546+ gdbg_printf("\t\tfifoPtr: 0x%X\n", (long)gc->cmdTransportInfo.fifoPtr - (long) gc->rawLfb);
547 gdbg_printf("\t\tfifoOffset: 0x%X\n", gc->cmdTransportInfo.fifoOffset);
548 gdbg_printf("\t\tfifoEnd: 0x%X\n", gc->cmdTransportInfo.fifoEnd - gc->rawLfb);
549 gdbg_printf("\t\tfifoSize: 0x%X\n", gc->cmdTransportInfo.fifoSize);
550@@ -290,7 +290,7 @@
551
552 if ( !gc->windowed ) {
553 gdbg_printf("\tHardware:\n");
554- gdbg_printf("\t\treadPtrL: 0x%X\n", HW_FIFO_PTR(FXTRUE) - (FxU32)gc->rawLfb);
555+ gdbg_printf("\t\treadPtrL: 0x%X\n", HW_FIFO_PTR(FXTRUE) - (long)gc->rawLfb);
556 gdbg_printf("\t\tdepth: 0x%X\n", GR_CAGP_GET(depth));
557 gdbg_printf("\t\tholeCount: 0x%X\n", GR_CAGP_GET(holeCount));
558 gdbg_printf("\t\tbaseAddrL: 0x%X\n", GR_CAGP_GET(baseAddrL));
559--- Glide3/h3/glide3/src/gglide.c.dri.ia64-foo Fri Nov 24 13:36:48 2000
560+++ Glide3/h3/glide3/src/gglide.c.dri Thu Dec 21 14:27:40 2000
561@@ -1193,8 +1193,8 @@
562 for ( i = 0; i < MAX_BUFF_PENDING && j == -1; i++) {
563 if (gc->bufferSwaps[i] == 0xffffffff) {
564 gc->bufferSwaps[i] =
565- (FxU32) gc->cmdTransportInfo.fifoPtr -
566- (FxU32) gc->cmdTransportInfo.fifoStart;
567+ (long) gc->cmdTransportInfo.fifoPtr -
568+ (long) gc->cmdTransportInfo.fifoStart;
569 j = i;
570 }
571 }
572@@ -1236,7 +1236,7 @@
573 REG_GROUP_SET_WAX(hw, srcXY, x | ((driInfo.y+(y-driInfo.y))<<16));
574 REG_GROUP_SET_WAX(hw, dstSize, (w&0x1FFF)|((h&0x1FFF)<<16));
575 REG_GROUP_SET_WAX(hw, dstXY, (x&0x1FFF) | ((y&0x1FFF)<<16));
576- REG_GROUP_SET_WAX(hw, command, (0xCC<<24) | 0x1 | BIT(8));
577+ REG_GROUP_SET_WAX(hw, command, (0xCCu<<24) | 0x1 | BIT(8));
578 REG_GROUP_END();
579 } while (cnt);
580
581@@ -2168,7 +2168,7 @@
582 * continuing so that any internal glide calls have a valid
583 * gc from tls via GR_DCL_GC. F*ck this up at your own peril.
584 */
585- setThreadValue((FxU32)gc);
586+ setThreadValue((long)gc);
587 #if (GLIDE_PLATFORM & GLIDE_OS_WIN32)
588 /* Flush any remaining commands and cleanup any per gc state */
589 grSurfaceReleaseContext((GrContext_t)gc);
590--- Glide3/h3/glide3/src/gglide.c.save.ia64-foo Wed Nov 24 16:45:02 1999
591+++ Glide3/h3/glide3/src/gglide.c.save Thu Dec 21 14:27:40 2000
592@@ -1163,7 +1163,7 @@
593 do {
594 depth0 = GET(gc->cRegs->cmdFifo0.depth);
595 depth1 = GET(gc->cRegs->cmdFifo0.depth);
596- } while (readPtr0 != readPtr1);
597+ } while (depth0 != depth1);
598
599 if (depth0 == 0) {
600 for (i = 0; i < MAX_BUFF_PENDING; i++)
601@@ -1962,7 +1962,7 @@
602 * continuing so that any internal glide calls have a valid
603 * gc from tls via GR_DCL_GC. F*ck this up at your own peril.
604 */
605- setThreadValue((FxU32)gc);
606+ setThreadValue(gc);
607 #if (GLIDE_PLATFORM & GLIDE_OS_WIN32)
608 /* Flush any remaining commands and cleanup any per gc state */
609 grSurfaceReleaseContext((GrContext_t)gc);
610--- Glide3/h3/glide3/src/glfb.c.dri.ia64-foo Wed Nov 24 16:45:02 1999
611+++ Glide3/h3/glide3/src/glfb.c.dri Thu Dec 21 14:27:40 2000
612@@ -712,7 +712,7 @@
613 case GR_LFB_SRC_FMT_ZA16:
614 dstData = (FxU32*)(((FxU16*)dstData) + dst_x);
615 length = src_width * 2;
616- aligned = !((int)dstData&0x2);
617+ aligned = !((long)dstData&0x2);
618 srcJump = src_stride - length;
619 dstJump = info.strideInBytes - length;
620 if (aligned) {
621@@ -917,7 +917,7 @@
622 length = src_width * 2;
623 dstJump = dst_stride - length;
624 srcJump = info.strideInBytes - length;
625- aligned = !((int)srcData&0x2);
626+ aligned = !((long)srcData&0x2);
627 odd = (src_y+src_height) & 0x1;
628
629 if (aligned) {
630--- Glide3/h3/glide3/src/glide.h.ia64-foo Fri Nov 24 13:36:48 2000
631+++ Glide3/h3/glide3/src/glide.h Thu Dec 21 14:27:40 2000
632@@ -56,7 +56,7 @@
633 typedef FxU32 GrStipplePattern_t;
634 #endif /* __linux__ */
635 typedef FxU8 GrFog_t;
636-typedef FxU32 GrContext_t;
637+typedef unsigned long GrContext_t;
638 typedef int (FX_CALL *GrProc)();
639
640 /*
641--- Glide3/h3/glide3/src/gpci.c.ia64-foo Wed Nov 24 16:44:57 1999
642+++ Glide3/h3/glide3/src/gpci.c Thu Dec 21 14:27:40 2000
643@@ -418,14 +418,14 @@
644 {
645 /* Window coords */
646 {
647- { _trisetup_null, _trisetup_null },
648- { _trisetup_null, _trisetup_null },
649+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
650+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
651 },
652
653 /* Clip coordinates */
654 {
655- { _trisetup_null, _trisetup_null },
656- { _trisetup_null, _trisetup_null },
657+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
658+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
659 },
660 },
661 };
662@@ -1024,7 +1024,7 @@
663 GR_DCL_GC;
664
665 /* If there is no current gc in tls then set the current context. */
666- if (gc == NULL) setThreadValue((FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst]);
667+ if (gc == NULL) setThreadValue((long)&_GlideRoot.GCs[_GlideRoot.current_sst]);
668 }
669 break;
670 case DLL_THREAD_DETACH:
671--- Glide3/h3/glide3/src/gsst.c.dri.ia64-foo Wed Nov 24 16:45:01 1999
672+++ Glide3/h3/glide3/src/gsst.c.dri Thu Dec 21 14:27:40 2000
673@@ -542,30 +542,30 @@
674
675 ResEntry
676 _resTable[] = {
677- GR_RESOLUTION_320x200, 320, 200, /* 0x0 */
678- GR_RESOLUTION_320x240, 320, 240, /* 0x1 */
679- GR_RESOLUTION_400x256, 400, 256, /* 0x2 */
680- GR_RESOLUTION_512x384, 512, 384, /* 0x3 */
681- GR_RESOLUTION_640x200, 640, 200, /* 0x4 */
682- GR_RESOLUTION_640x350, 640, 350, /* 0x5 */
683- GR_RESOLUTION_640x400, 640, 400, /* 0x6 */
684- GR_RESOLUTION_640x480, 640, 480, /* 0x7 */
685- GR_RESOLUTION_800x600, 800, 600, /* 0x8 */
686- GR_RESOLUTION_960x720, 960, 720, /* 0x9 */
687- GR_RESOLUTION_856x480, 856, 480, /* 0xa */
688- GR_RESOLUTION_512x256, 512, 256, /* 0xb */
689- GR_RESOLUTION_1024x768, 1024, 768, /* 0xC */
690- GR_RESOLUTION_1280x1024, 1280, 1024, /* 0xD */
691- GR_RESOLUTION_1600x1200, 1600, 1200, /* 0xE */
692- GR_RESOLUTION_400x300, 400, 300, /* 0xF */
693- GR_RESOLUTION_1152x864, 1152, 864, /* 0x10 */
694- GR_RESOLUTION_1280x960, 1280, 960, /* 0x11 */
695- GR_RESOLUTION_1600x1024, 1600, 1024, /* 0x12 */
696- GR_RESOLUTION_1792x1344, 1792, 1344, /* 0x13 */
697- GR_RESOLUTION_1856x1392, 1856, 1392, /* 0x14 */
698- GR_RESOLUTION_1920x1440, 1920, 1440, /* 0x15 */
699- GR_RESOLUTION_2048x1536, 2048, 1536, /* 0x16 */
700- GR_RESOLUTION_2048x2048, 2048, 2048 /* 0x17 */
701+ { GR_RESOLUTION_320x200, 320, 200 }, /* 0x0 */
702+ { GR_RESOLUTION_320x240, 320, 240 }, /* 0x1 */
703+ { GR_RESOLUTION_400x256, 400, 256 }, /* 0x2 */
704+ { GR_RESOLUTION_512x384, 512, 384 }, /* 0x3 */
705+ { GR_RESOLUTION_640x200, 640, 200 }, /* 0x4 */
706+ { GR_RESOLUTION_640x350, 640, 350 }, /* 0x5 */
707+ { GR_RESOLUTION_640x400, 640, 400 }, /* 0x6 */
708+ { GR_RESOLUTION_640x480, 640, 480 }, /* 0x7 */
709+ { GR_RESOLUTION_800x600, 800, 600 }, /* 0x8 */
710+ { GR_RESOLUTION_960x720, 960, 720 }, /* 0x9 */
711+ { GR_RESOLUTION_856x480, 856, 480 }, /* 0xa */
712+ { GR_RESOLUTION_512x256, 512, 256 }, /* 0xb */
713+ { GR_RESOLUTION_1024x768, 1024, 768 }, /* 0xC */
714+ { GR_RESOLUTION_1280x1024, 1280, 1024 }, /* 0xD */
715+ { GR_RESOLUTION_1600x1200, 1600, 1200 }, /* 0xE */
716+ { GR_RESOLUTION_400x300, 400, 300 }, /* 0xF */
717+ { GR_RESOLUTION_1152x864, 1152, 864 }, /* 0x10 */
718+ { GR_RESOLUTION_1280x960, 1280, 960 }, /* 0x11 */
719+ { GR_RESOLUTION_1600x1024, 1600, 1024 }, /* 0x12 */
720+ { GR_RESOLUTION_1792x1344, 1792, 1344 }, /* 0x13 */
721+ { GR_RESOLUTION_1856x1392, 1856, 1392 }, /* 0x14 */
722+ { GR_RESOLUTION_1920x1440, 1920, 1440 }, /* 0x15 */
723+ { GR_RESOLUTION_2048x1536, 2048, 1536 }, /* 0x16 */
724+ { GR_RESOLUTION_2048x2048, 2048, 2048 } /* 0x17 */
725 };
726
727 /* ---------------------------------------------
728@@ -756,8 +756,8 @@
729 gc->bufferSwaps[t] = 0xffffffff;
730 }
731
732- gc->bufferSwaps[0] = ((FxU32) gc->cmdTransportInfo.fifoPtr -
733- (FxU32) gc->cmdTransportInfo.fifoStart);
734+ gc->bufferSwaps[0] = ((long) gc->cmdTransportInfo.fifoPtr -
735+ (long) gc->cmdTransportInfo.fifoStart);
736
737 gc->swapsPending = 1;
738
739@@ -946,7 +946,7 @@
740 * current gc. This gc is valid for all threads in the fullscreen
741 * context.
742 */
743- setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] );
744+ setThreadValue( (long)&_GlideRoot.GCs[_GlideRoot.current_sst] );
745
746 {
747 /* Partial Argument Validation */
748@@ -1076,12 +1076,12 @@
749 for (buffer = 0; buffer < nColBuffers; buffer++) {
750 gc->buffers[buffer] = bufInfo->colBuffStart[buffer];
751 GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers[buffer]);
752- gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
753+ gc->lfbBuffers[buffer] = (long)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
754 }
755 if (nAuxBuffers != 0) {
756 gc->buffers[buffer] = bufInfo->auxBuffStart;
757 GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers[buffer]);
758- gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
759+ gc->lfbBuffers[buffer] = (long)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
760 }
761
762 vInfo->hWnd = gc->grHwnd;
763@@ -1190,7 +1190,7 @@
764 gc->tBuffer.bufBPP = 0xffffffff; /* Don't matter to me */
765
766 GDBG_INFO(1, "autoBump: 0x%x\n", _GlideRoot.environment.autoBump);
767- if (gc->cmdTransportInfo.autoBump = _GlideRoot.environment.autoBump) {
768+ if ((gc->cmdTransportInfo.autoBump = _GlideRoot.environment.autoBump) != 0) {
769 if (!hwcInitFifo( bInfo, gc->cmdTransportInfo.autoBump)) {
770 hwcRestoreVideo(bInfo);
771 GrErrorCallback(hwcGetErrorString(), FXFALSE);
772@@ -1226,7 +1226,7 @@
773 gc->tmu_state[0].total_mem = gc->tramSize;
774 #else
775 /* gc->fbOffset = (FxU32)fxHalFbiGetMemory((SstRegs*)gc->reg_ptr); */
776- gc->fbOffset = (FxU32)gc->rawLfb;
777+ gc->fbOffset = (long)gc->rawLfb;
778 gc->tmuMemInfo[0].tramOffset = 0x200000;
779 gc->tmuMemInfo[0].tramSize = 0x200000;
780 gc->tmuMemInfo[1].tramOffset = gc->tmuMemInfo[0].tramSize + gc->tmuMemInfo[0].tramOffset;
781@@ -1440,7 +1440,10 @@
782 gcFifo->fifoPtr );
783
784 #ifdef __linux__
785- _grImportFifo(*driInfo.fifoPtr, *driInfo.fifoRead);
786+ {
787+ extern void _grImportFifo (int, int);
788+ _grImportFifo(*driInfo.fifoPtr, *driInfo.fifoRead);
789+ }
790 #endif
791
792 /* The hw is now in a usable state from the fifo macros.
793@@ -1591,7 +1594,7 @@
794 * the tls gc explicitly otherwise other whacky-ness (read 'random
795 * crashes' will ensue).
796 */
797- setThreadValue((FxU32)gc);
798+ setThreadValue((long) gc);
799 if ((gc != NULL) && gc->open) grFlush();
800
801 /* Make sure that the user specified gc is not whacked */
802--- Glide3/h3/glide3/src/gsst.c.save.ia64-foo Wed Nov 24 16:45:00 1999
803+++ Glide3/h3/glide3/src/gsst.c.save Thu Dec 21 14:27:40 2000
804@@ -937,7 +937,7 @@
805 * current gc. This gc is valid for all threads in the fullscreen
806 * context.
807 */
808- setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] );
809+ setThreadValue( (long)&_GlideRoot.GCs[_GlideRoot.current_sst] );
810
811 {
812 /* Partial Argument Validation */
813@@ -1056,12 +1056,12 @@
814 for (buffer = 0; buffer < nColBuffers; buffer++) {
815 gc->buffers[buffer] = bufInfo->colBuffStart[buffer];
816 GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers[buffer]);
817- gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
818+ gc->lfbBuffers[buffer] = (long)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
819 }
820 if (nAuxBuffers != 0) {
821 gc->buffers[buffer] = bufInfo->auxBuffStart;
822 GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers[buffer]);
823- gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
824+ gc->lfbBuffers[buffer] = (long)gc->rawLfb + bufInfo->lfbBuffAddr[buffer];
825 }
826
827 vInfo->hWnd = gc->grHwnd;
828@@ -1552,7 +1552,7 @@
829 * the tls gc explicitly otherwise other whacky-ness (read 'random
830 * crashes' will ensue).
831 */
832- setThreadValue((FxU32)gc);
833+ setThreadValue((long)gc);
834 if ((gc != NULL) && gc->open) grFlush();
835
836 /* Make sure that the user specified gc is not whacked */
837--- Glide3/h3/glide3/src/gtexdl.c.ia64-foo Wed Nov 24 16:44:57 1999
838+++ Glide3/h3/glide3/src/gtexdl.c Thu Dec 21 14:27:40 2000
839@@ -417,7 +417,7 @@
840 while(i < start + slopCount) {
841 FxU32 entry;
842
843- entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF);
844+ entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF));
845
846 gc->state.shadow.paletteRow[i>>3].data[i&7] = entry;
847 REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry );
848@@ -435,7 +435,7 @@
849 while(i < endIndex) {
850 FxU32 entry;
851
852- entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF);
853+ entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF));
854
855 gc->state.shadow.paletteRow[i>>3].data[i&7] = entry;
856 REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry );
857@@ -454,7 +454,7 @@
858 while(i <= end) {
859 FxU32 entry;
860
861- entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF);
862+ entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF));
863
864 gc->state.shadow.paletteRow[i>>3].data[i&7] = entry;
865 REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry );
866--- Glide3/h3/glide3/src/gthread.c.ia64-foo Tue Feb 15 17:35:59 2000
867+++ Glide3/h3/glide3/src/gthread.c Thu Dec 21 14:27:40 2000
868@@ -63,13 +63,13 @@
869
870 } /* initThreadStorage */
871
872-void setThreadValue( FxU32 value ) {
873+void setThreadValue( long value ) {
874 GR_CHECK_F( "setThreadValue", !threadInit, "Thread storage not initialized\n" );
875 TlsSetValue( _GlideRoot.tlsIndex, (void*)value );
876 }
877
878 #pragma warning (4:4035) /* No return value */
879-FxU32 getThreadValueSLOW( void ) {
880+long getThreadValueSLOW( void ) {
881 GR_CHECK_F( "getThreadValue", !threadInit, "Thread storage not initialized\n" );
882
883 #if 0
884@@ -122,7 +122,7 @@
885 {
886 }
887
888-void setThreadValue( FxU32 value )
889+void setThreadValue( long value )
890 {
891 _threadValueMacOS = value;
892 }
893@@ -157,18 +157,18 @@
894 #include "fxglide.h"
895 #include "fxcmd.h"
896
897-FxU32 threadValueLinux;
898+long threadValueLinux;
899
900 void initThreadStorage(void)
901 {
902 }
903
904-void setThreadValue( FxU32 value )
905+void setThreadValue( long value )
906 {
907 threadValueLinux = value;
908 }
909
910-FxU32 getThreadValueSLOW( void )
911+long getThreadValueSLOW( void )
912 {
913 return threadValueLinux;
914 }
915--- Glide3/h3/glide3/src/makefile.linux.ia64-foo Wed Jul 12 17:33:32 2000
916+++ Glide3/h3/glide3/src/makefile.linux Thu Dec 21 14:27:40 2000
917@@ -43,7 +43,7 @@
918
919 FX_GLIDE_REAL_HW= 1
920 FX_GLIDE_NO_FIFO= 1
921-FX_GLIDE_CTRISETUP = 0
922+FX_GLIDE_CTRISETUP = 1
923
924 HWSPEC = fifo.c
925 LCDEFS += -DH3 $(CMDXPORTDEFS)
926--- Glide3/h3/glide3/tests/.gdbinit.ia64-foo Thu Dec 21 14:27:40 2000
927+++ Glide3/h3/glide3/tests/.gdbinit Thu Dec 21 14:27:40 2000
928@@ -0,0 +1,3 @@
929+dir /r/erikson/usr/src/redhat/BUILD/Glide_V3-DRI-3.10/h3/glide3/src:/r/erikson/usr/src/redhat/BUILD/Glide_V3-DRI-3.10/h3/minihwc:/r/erikson/usr/src/redhat/BUILD/XFree86-4.0/xc/lib/Xxf86vm
930+set gdbg_debuglevel[80]=255
931+set gdbg_debuglevel[280]=255
932--- Glide3/h3/incsrc/gdebug.h.ia64-foo Wed Nov 24 16:45:02 1999
933+++ Glide3/h3/incsrc/gdebug.h Thu Dec 21 14:27:40 2000
934@@ -67,12 +67,21 @@
935 #pragma disable_message (111, 201, 302)
936 #endif /* defined(__WATCOMC__) || defined(__WATCOM_CPLUSPLUS__) */
937
938-#define GDBG_INFO 0 && (unsigned long)
939-#define GDBG_INFO_MORE 0 && (unsigned long)
940-#define GDBG_PRINTF 0 && (unsigned long)
941+#ifdef __GNUC__
942+# define GDBG_INFO(x...)
943+# define GDBG_INFO_MORE(x...)
944+# define GDBG_PRINTF(x...)
945
946-#define GDBG_ERROR_SET_CALLBACK 0 && (unsigned long)
947-#define GDBG_ERROR_CLEAR_CALLBACK 0 && (unsigned long)
948+# define GDBG_ERROR_SET_CALLBACK(x...)
949+# define GDBG_ERROR_CLEAR_CALLBACK(x...)
950+#else
951+# define GDBG_INFO 0 && (unsigned long)
952+# define GDBG_INFO_MORE 0 && (unsigned long)
953+# define GDBG_PRINTF 0 && (unsigned long)
954+
955+# define GDBG_ERROR_SET_CALLBACK 0 && (unsigned long)
956+# define GDBG_ERROR_CLEAR_CALLBACK 0 && (unsigned long)
957+#endif
958
959 #define GDBG_GET_DEBUGLEVEL(x) 0
960 #define GDBG_SET_DEBUGLEVEL(a,b)
961--- Glide3/h3/incsrc/h3defs.h.ia64-foo Wed Nov 24 16:45:03 1999
962+++ Glide3/h3/incsrc/h3defs.h Thu Dec 21 14:27:40 2000
963@@ -56,11 +56,21 @@
964
965 // this crazy macro tests the sign bit of a float by loading it into
966 // an integer register and then testing the sign bit of the integer
967-#define FLOAT_ISNEG(f) ((*(int *)(&(f))) < 0)
968+#ifdef __ia64__
969+ /* On IA-64, it's faster to do this the obvious way... --davidm 00/08/09 */
970+# define FLOAT_ISNEG(f) ((f) < 0.0)
971+#else
972+# define FLOAT_ISNEG(f) ((*(int *)(&(f))) < 0)
973+#endif
974
975 // these crazy macros returns the sign of a number (1 if >= 0; -1 if < 0)
976-#define ISIGN(x) (((x) | 0x40000000L) >> 30)
977-#define FSIGN(f) ISIGN(*(long *)&f)
978+#ifdef __ia64__
979+# define ISIGN(x) ((x) >= 0 ? 1 : -1)
980+# define FSIGN(f) ((f) >= 0.0 ? 1 : -1)
981+#else
982+# define ISIGN(x) (((x) | 0x40000000L) >> 30)
983+# define FSIGN(f) ISIGN(*(long *)&f)
984+#endif
985
986 #define BIT(n) (1UL<<(n))
987 #define SST_MASK(n) (0xFFFFFFFFL >> (32-(n)))
988@@ -1257,9 +1267,9 @@
989
990 //----------------- useful addressing macros -----------------------
991 // return pointer to SST at specified WRAP, CHIP, or TREX
992-#define SST_WRAP(sst,n) ((SstRegs *)((n)*0x4000+(FxI32)(sst)))
993-#define SST_CHIP(sst,n) ((SstRegs *)((n)*0x400+(FxI32)(sst)))
994-#define SST_TMU(sst,n) ((SstRegs *)((0x800<<(n))+(FxI32)(sst)))
995+#define SST_WRAP(sst,n) ((SstRegs *)((n)*0x4000+(long)(sst)))
996+#define SST_CHIP(sst,n) ((SstRegs *)((n)*0x400+(long)(sst)))
997+#define SST_TMU(sst,n) ((SstRegs *)((0x800<<(n))+(long)(sst)))
998 #define SST_TREX(sst,n) SST_TMU(sst,n)
999
1000 // offsets from the base of memBaseAddr0
1001@@ -1304,7 +1314,7 @@
1002
1003 #define SST_IS_REGISTER_ADDR(a) ( (a) >= SST_IO_OFFSET && (a) < SST_TEX_OFFSET )
1004
1005-#define SST_BASE_ADDRESS(sst) ((FxI32)(sst)-SST_3D_OFFSET)
1006+#define SST_BASE_ADDRESS(sst) ((long)(sst)-SST_3D_OFFSET)
1007 #define SST_IO_ADDRESS(sst) (SST_IO_OFFSET+SST_BASE_ADDRESS(sst))
1008 #define SST_CMDAGP_ADDRESS(sst) (SST_CMDAGP_OFFSET+SST_BASE_ADDRESS(sst))
1009 #define SST_GUI_ADDRESS(sst) (SST_2D_OFFSET+SST_BASE_ADDRESS(sst))
1010--- Glide3/h3/incsrc/h3info.h.ia64-foo Wed Nov 24 16:45:03 1999
1011+++ Glide3/h3/incsrc/h3info.h Thu Dec 21 14:27:40 2000
1012@@ -28,7 +28,11 @@
1013 // basic data types
1014 #define FxU8 unsigned char
1015 #define FxU16 unsigned short
1016-#define FxU32 unsigned long
1017+# ifdef __LP64__
1018+# define FxU32 unsigned int
1019+# else
1020+# define FxU32 unsigned long
1021+# endif
1022 #define FxBool int
1023 // defn of registers not reqd, treat (SstRegs *) as (void *)
1024 typedef void SstRegs;
1025--- Glide3/h3/incsrc/h3regs.h.ia64-foo Wed Nov 24 16:45:03 1999
1026+++ Glide3/h3/incsrc/h3regs.h Thu Dec 21 14:27:40 2000
1027@@ -45,7 +45,11 @@
1028 // STB Begin Changes
1029 // STB-SR 1/13/98 Adding code for bj
1030 #ifdef _H2INC
1031+# ifdef __LP64__
1032+typedef unsigned int FxU32;
1033+# else
1034 typedef unsigned long FxU32;
1035+# endif
1036 #endif
1037 // STB End Changes
1038
1039@@ -211,8 +215,8 @@
1040 //----------------- SST chip 3D layout -------------------------
1041 // registers are in groups of 8 for easy decode
1042 typedef struct vertex_Rec {
1043- unsigned long x; // 12.4 format
1044- unsigned long y; // 12.4
1045+ FxU32 x; // 12.4 format
1046+ FxU32 y; // 12.4
1047 } vtxRec;
1048
1049 typedef volatile struct sstregs { // THE 3D CHIP
1050@@ -223,118 +227,118 @@
1051 vtxRec vB;
1052 vtxRec vC;
1053
1054- long r; // 12.12 Parameters
1055- long g; // 12.12
1056- long b; // 12.12
1057- long z; // 20.12
1058- long a; // 12.12
1059- long s; // 14.18
1060- long t; // 14.18
1061- long w; // 2.30
1062-
1063- long drdx; // X Gradients
1064- long dgdx;
1065- long dbdx;
1066- long dzdx;
1067- long dadx;
1068- long dsdx;
1069- long dtdx;
1070- long dwdx;
1071-
1072- long drdy; // Y Gradients
1073- long dgdy;
1074- long dbdy;
1075- long dzdy;
1076- long dady;
1077- long dsdy;
1078- long dtdy;
1079- long dwdy;
1080+ FxI32 r; // 12.12 Parameters
1081+ FxI32 g; // 12.12
1082+ FxI32 b; // 12.12
1083+ FxI32 z; // 20.12
1084+ FxI32 a; // 12.12
1085+ FxI32 s; // 14.18
1086+ FxI32 t; // 14.18
1087+ FxI32 w; // 2.30
1088+
1089+ FxI32 drdx; // X Gradients
1090+ FxI32 dgdx;
1091+ FxI32 dbdx;
1092+ FxI32 dzdx;
1093+ FxI32 dadx;
1094+ FxI32 dsdx;
1095+ FxI32 dtdx;
1096+ FxI32 dwdx;
1097+
1098+ FxI32 drdy; // Y Gradients
1099+ FxI32 dgdy;
1100+ FxI32 dbdy;
1101+ FxI32 dzdy;
1102+ FxI32 dady;
1103+ FxI32 dsdy;
1104+ FxI32 dtdy;
1105+ FxI32 dwdy;
1106
1107- unsigned long triangleCMD; // execute a triangle command (float)
1108- unsigned long reservedA;
1109+ FxU32 triangleCMD; // execute a triangle command (float)
1110+ FxU32 reservedA;
1111 vtxRec FvA; // floating point version
1112 vtxRec FvB;
1113 vtxRec FvC;
1114
1115- long Fr; // floating point version
1116- long Fg;
1117- long Fb;
1118- long Fz;
1119- long Fa;
1120- long Fs;
1121- long Ft;
1122- long Fw;
1123-
1124- long Fdrdx;
1125- long Fdgdx;
1126- long Fdbdx;
1127- long Fdzdx;
1128- long Fdadx;
1129- long Fdsdx;
1130- long Fdtdx;
1131- long Fdwdx;
1132-
1133- long Fdrdy;
1134- long Fdgdy;
1135- long Fdbdy;
1136- long Fdzdy;
1137- long Fdady;
1138- long Fdsdy;
1139- long Fdtdy;
1140- long Fdwdy;
1141-
1142- unsigned long FtriangleCMD; // execute a triangle command
1143- unsigned long fbzColorPath; // color select and combine
1144- unsigned long fogMode; // fog Mode
1145- unsigned long alphaMode; // alpha Mode
1146- unsigned long fbzMode; // framebuffer and Z mode
1147- unsigned long lfbMode; // linear framebuffer Mode
1148- unsigned long clipLeftRight; // (6)10(6)10
1149- unsigned long clipBottomTop; // (6)10(6)10
1150-
1151- unsigned long nopCMD; // execute a nop command
1152- unsigned long fastfillCMD; // execute a fast fill command
1153- unsigned long swapbufferCMD;// execute a swapbuffer command
1154- unsigned long fogColor; // (8)888
1155- unsigned long zaColor; // 8(8)16
1156- unsigned long chromaKey; // (8)888
1157- unsigned long chromaRange;
1158- unsigned long userIntrCmd;
1159-
1160- unsigned long stipple; // 32 bits, MSB masks pixels
1161- unsigned long c0; // 8.8.8.8 (ARGB)
1162- unsigned long c1; // 8.8.8.8 (ARGB)
1163+ FxI32 Fr; // floating point version
1164+ FxI32 Fg;
1165+ FxI32 Fb;
1166+ FxI32 Fz;
1167+ FxI32 Fa;
1168+ FxI32 Fs;
1169+ FxI32 Ft;
1170+ FxI32 Fw;
1171+
1172+ FxI32 Fdrdx;
1173+ FxI32 Fdgdx;
1174+ FxI32 Fdbdx;
1175+ FxI32 Fdzdx;
1176+ FxI32 Fdadx;
1177+ FxI32 Fdsdx;
1178+ FxI32 Fdtdx;
1179+ FxI32 Fdwdx;
1180+
1181+ FxI32 Fdrdy;
1182+ FxI32 Fdgdy;
1183+ FxI32 Fdbdy;
1184+ FxI32 Fdzdy;
1185+ FxI32 Fdady;
1186+ FxI32 Fdsdy;
1187+ FxI32 Fdtdy;
1188+ FxI32 Fdwdy;
1189+
1190+ FxU32 FtriangleCMD; // execute a triangle command
1191+ FxU32 fbzColorPath; // color select and combine
1192+ FxU32 fogMode; // fog Mode
1193+ FxU32 alphaMode; // alpha Mode
1194+ FxU32 fbzMode; // framebuffer and Z mode
1195+ FxU32 lfbMode; // linear framebuffer Mode
1196+ FxU32 clipLeftRight; // (6)10(6)10
1197+ FxU32 clipBottomTop; // (6)10(6)10
1198+
1199+ FxU32 nopCMD; // execute a nop command
1200+ FxU32 fastfillCMD; // execute a fast fill command
1201+ FxU32 swapbufferCMD;// execute a swapbuffer command
1202+ FxU32 fogColor; // (8)888
1203+ FxU32 zaColor; // 8(8)16
1204+ FxU32 chromaKey; // (8)888
1205+ FxU32 chromaRange;
1206+ FxU32 userIntrCmd;
1207+
1208+ FxU32 stipple; // 32 bits, MSB masks pixels
1209+ FxU32 c0; // 8.8.8.8 (ARGB)
1210+ FxU32 c1; // 8.8.8.8 (ARGB)
1211 struct { // statistic gathering variables
1212- unsigned long fbiPixelsIn;
1213- unsigned long fbiChromaFail;
1214- unsigned long fbiZfuncFail;
1215- unsigned long fbiAfuncFail;
1216- unsigned long fbiPixelsOut;
1217+ FxU32 fbiPixelsIn;
1218+ FxU32 fbiChromaFail;
1219+ FxU32 fbiZfuncFail;
1220+ FxU32 fbiAfuncFail;
1221+ FxU32 fbiPixelsOut;
1222 } stats;
1223
1224- unsigned long fogTable[32]; // 64 entries, 2 per word, 2 bytes each
1225+ FxU32 fogTable[32]; // 64 entries, 2 per word, 2 bytes each
1226
1227- unsigned long reservedB[3];
1228+ FxU32 reservedB[3];
1229
1230- unsigned long colBufferAddr;
1231- unsigned long colBufferStride;
1232- unsigned long auxBufferAddr;
1233- unsigned long auxBufferStride;
1234- unsigned long reservedC;
1235-
1236- unsigned long clipLeftRight1;
1237- unsigned long clipBottomTop1;
1238- unsigned long reservedD[6]; // NOTE: used to store TMUprivate ptr
1239+ FxU32 colBufferAddr;
1240+ FxU32 colBufferStride;
1241+ FxU32 auxBufferAddr;
1242+ FxU32 auxBufferStride;
1243+ FxU32 reservedC;
1244+
1245+ FxU32 clipLeftRight1;
1246+ FxU32 clipBottomTop1;
1247+ FxU32 reservedD[6]; // NOTE: used to store TMUprivate ptr
1248
1249
1250- unsigned long reservedE[8];
1251+ FxU32 reservedE[8];
1252
1253- unsigned long reservedF[3];
1254- unsigned long swapBufferPend;
1255- unsigned long leftOverlayBuf;
1256- unsigned long rightOverlayBuf;
1257- unsigned long fbiSwapHistory;
1258- unsigned long fbiTrianglesOut; // triangles out counter
1259+ FxU32 reservedF[3];
1260+ FxU32 swapBufferPend;
1261+ FxU32 leftOverlayBuf;
1262+ FxU32 rightOverlayBuf;
1263+ FxU32 fbiSwapHistory;
1264+ FxU32 fbiTrianglesOut; // triangles out counter
1265
1266 FxU32 sSetupMode;
1267 FxU32 sVx;
1268@@ -356,27 +360,27 @@
1269
1270 FxU32 sDrawTriCMD;
1271 FxU32 sBeginTriCMD;
1272- unsigned long reservedG[6];
1273+ FxU32 reservedG[6];
1274
1275- unsigned long reservedH[8];
1276+ FxU32 reservedH[8];
1277
1278- unsigned long reservedI[8];
1279+ FxU32 reservedI[8];
1280
1281- unsigned long textureMode; // texture Mode
1282- unsigned long tLOD; // texture LOD settings
1283- unsigned long tDetail; // texture detail settings
1284- unsigned long texBaseAddr; // current texture base address
1285- unsigned long texBaseAddr1;
1286- unsigned long texBaseAddr2;
1287- unsigned long texBaseAddr38;
1288- unsigned long trexInit0; // hardware init bits
1289- unsigned long trexInit1; // hardware init bits
1290+ FxU32 textureMode; // texture Mode
1291+ FxU32 tLOD; // texture LOD settings
1292+ FxU32 tDetail; // texture detail settings
1293+ FxU32 texBaseAddr; // current texture base address
1294+ FxU32 texBaseAddr1;
1295+ FxU32 texBaseAddr2;
1296+ FxU32 texBaseAddr38;
1297+ FxU32 trexInit0; // hardware init bits
1298+ FxU32 trexInit1; // hardware init bits
1299
1300- unsigned long nccTable0[12]; // NCC decode tables, bits are packed
1301- unsigned long nccTable1[12]; // 4 words Y, 4 words I, 4 words Q
1302+ FxU32 nccTable0[12]; // NCC decode tables, bits are packed
1303+ FxU32 nccTable1[12]; // 4 words Y, 4 words I, 4 words Q
1304
1305- unsigned long tChromaKeyMin;
1306- unsigned long tChromaKeyMax;
1307+ FxU32 tChromaKeyMin;
1308+ FxU32 tChromaKeyMax;
1309 } SstRegs;
1310
1311 // STB Begin changes
1312--- Glide3/h3/minihwc/hwcext.h.ia64-foo Wed Nov 24 16:45:04 1999
1313+++ Glide3/h3/minihwc/hwcext.h Thu Dec 21 14:27:40 2000
1314@@ -192,9 +192,8 @@
1315
1316 /* Returned from HWCEXT_GETLINEARADDR */
1317 typedef struct hwcExtLinearAddrRes_s {
1318- FxU32
1319- numBaseAddrs, /* # base addresses */
1320- baseAddresses[HWCEXT_MAX_BASEADDR]; /* linear Addresses */
1321+ FxU32 numBaseAddrs; /* # base addresses */
1322+ long baseAddresses[HWCEXT_MAX_BASEADDR]; /* linear Addresses */
1323 } hwcExtLinearAddrRes_t;
1324
1325 /*
1326--- Glide3/h3/minihwc/linhwc.c.dri.ia64-foo Fri Oct 27 06:27:27 2000
1327+++ Glide3/h3/minihwc/linhwc.c.dri Thu Dec 21 14:27:40 2000
1328@@ -67,7 +67,13 @@
1329 #include "lindri.h"
1330
1331 static FxU32 fenceVar;
1332-#define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
1333+#ifdef __ia64__
1334+# define P6FENCE asm volatile("mf.a" ::: "memory");
1335+#elif defined(__alpha__)
1336+# define P6FENCE asm volatile("mb" ::: "memory");
1337+#else
1338+# define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
1339+#endif
1340
1341 #define MAXFIFOSIZE 0x40000
1342 #define FIFOPAD 0x0000
1343@@ -142,7 +148,7 @@
1344 char data[128];
1345 char *env, *val;
1346 envitem *item;
1347- int first=1;
1348+ int is_first=1;
1349
1350 if (envinit) return;
1351 envinit=1;
1352@@ -154,9 +160,9 @@
1353 if (*data=='\n') continue;
1354 val=strchr(data, '=');
1355 if (!val) {
1356- if (first) {
1357+ if (is_first) {
1358 fprintf(stderr, "In config file /etc/conf.3dfx/voodoo3:\n");
1359- first=0;
1360+ is_first=0;
1361 }
1362 fprintf(stderr, "Malformed line: %s\n", data);
1363 continue;
1364@@ -229,8 +235,8 @@
1365 }
1366
1367 bInfo->linearInfo.initialized = FXTRUE;
1368- bInfo->linearInfo.linearAddress[0]=(FxU32)driInfo.pRegs;
1369- bInfo->linearInfo.linearAddress[1]=(FxU32)driInfo.pFB;
1370+ bInfo->linearInfo.linearAddress[0]=(long)driInfo.pRegs;
1371+ bInfo->linearInfo.linearAddress[1]=(long)driInfo.pFB;
1372 return FXTRUE;
1373 }
1374
1375@@ -829,6 +835,10 @@
1376 #undef FN_NAME
1377 } /* hwcResolutionSupported */
1378
1379+extern void _grImportFifo (int, int);
1380+extern void _grInvalidateAll (void);
1381+extern void _grExportFifo (int *, int *);
1382+
1383 void grDRIImportFifo(int fifoPtr, int fifoRead)
1384 {
1385 _grImportFifo(fifoPtr, fifoRead);
1386@@ -840,5 +850,5 @@
1387
1388 void grDRIResetSAREA()
1389 {
1390- _grExportFifo(driInfo.fifoPtr, driInfo.fifoRead);
1391+ _grExportFifo((int *) driInfo.fifoPtr, (int *) driInfo.fifoRead);
1392 }
1393--- Glide3/h3/minihwc/linhwc.c.save.ia64-foo Mon Mar 20 16:42:57 2000
1394+++ Glide3/h3/minihwc/linhwc.c.save Thu Dec 21 14:27:40 2000
1395@@ -64,7 +64,13 @@
1396 #include <X11/extensions/xf86vmode.h>
1397
1398 static FxU32 fenceVar;
1399-#define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
1400+#ifdef __ia64__
1401+# define P6FENCE asm volatile ("mf.a" ::: "memory");
1402+#elif defined(__alpha__)
1403+# define P6FENCE asm volatile("mb" ::: "memory");
1404+#else
1405+# define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
1406+#endif
1407
1408 #define MAXFIFOSIZE 0x40000
1409 #define MAXFIFOSIZE_16MB 0xff000
1410@@ -114,7 +120,7 @@
1411 char data[128];
1412 char *env, *val;
1413 envitem *item;
1414- int first=1;
1415+ int is_first=1;
1416
1417 if (envinit) return;
1418 envinit=1;
1419@@ -126,9 +132,9 @@
1420 if (*data=='\n') continue;
1421 val=strchr(data, '=');
1422 if (!val) {
1423- if (first) {
1424+ if (is_first) {
1425 fprintf(stderr, "In config file /etc/conf.3dfx/voodoo3:\n");
1426- first=0;
1427+ is_first=0;
1428 }
1429 fprintf(stderr, "Malformed line: %s\n", data);
1430 continue;
1431@@ -269,7 +275,7 @@
1432
1433 for (bAddr = 0; bAddr < HWC_NUM_BASE_ADDR; bAddr++) {
1434 if ((bAddrMask >> bAddr) & 0x1) {
1435- bInfo->linearInfo.linearAddress[bAddr] = (FxU32)
1436+ bInfo->linearInfo.linearAddress[bAddr] = (long)
1437 pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1438 0x2000000, &bInfo->deviceNum, bInfo->boardNum, bAddr);
1439 }
1440--- Glide3/h3/minihwc/minihwc.c.ia64-foo Wed Nov 24 16:45:07 1999
1441+++ Glide3/h3/minihwc/minihwc.c Thu Dec 21 14:27:40 2000
1442@@ -1078,7 +1078,7 @@
1443 for (bAddr = 0; bAddr < 2; bAddr++) {
1444 if ((bAddrMask & (0x01UL << bAddr)) != 0x00UL) {
1445 bInfo->linearInfo.linearAddress[bAddr] =
1446- (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1447+ pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1448 0x1000000, &bInfo->deviceNum, bInfo->boardNum, bAddr);
1449 }
1450 }
1451@@ -1087,13 +1087,13 @@
1452 * unconditionally
1453 */
1454 bInfo->linearInfo.linearAddress[2] =
1455- (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1456+ pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1457 0x1000000, &bInfo->deviceNum, bInfo->boardNum, 2);
1458
1459 /* Does the caller want the rom bios? */
1460 if ((bAddrMask & 0x08UL) != 0x00UL) {
1461 bInfo->linearInfo.linearAddress[3] =
1462- (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1463+ pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
1464 0x1000000, &bInfo->deviceNum, bInfo->boardNum, 3);
1465 }
1466 }
1467--- Glide3/h3/minihwc/minihwc.h.ia64-foo Wed Nov 24 16:45:07 1999
1468+++ Glide3/h3/minihwc/minihwc.h Thu Dec 21 14:27:40 2000
1469@@ -238,22 +238,21 @@
1470 typedef struct hwcLinearInfo_s {
1471 FxBool
1472 initialized;
1473- FxU32
1474- linearAddress[HWC_NUM_BASE_ADDR];
1475+ long linearAddress[HWC_NUM_BASE_ADDR];
1476 } hwcLinearInfo;
1477
1478 typedef struct hwcRegInfo_s {
1479 FxBool
1480 initialized;
1481- volatile FxU32
1482- ioMemBase, /* mem base for I/O aliases */
1483- cmdAGPBase, /* CMD/AGP register base */
1484- waxBase, /* 2D register base */
1485- sstBase, /* 3D register base */
1486- lfbBase, /* 3D lfb base */
1487- rawLfbBase; /* Raw LFB base (base address 1) */
1488+ volatile long
1489+ ioMemBase, /* mem base for I/O aliases */
1490+ cmdAGPBase, /* CMD/AGP register base */
1491+ waxBase, /* 2D register base */
1492+ sstBase, /* 3D register base */
1493+ lfbBase, /* 3D lfb base */
1494+ rawLfbBase; /* Raw LFB base (base address 1) */
1495 #if __POWERPC__
1496- ioPortBase; /* PPC does I/O via a 32-bit address */
1497+ FxU32 ioPortBase; /* PPC does I/O via a 32-bit address */
1498 #else
1499 volatile FxU16
1500 ioPortBase, /* I/O base address */
1501--- Glide3/h5/glide3/src/cpudtect.s.ia64-foo Fri Nov 17 16:31:05 2000
1502+++ Glide3/h5/glide3/src/cpudtect.s Thu Dec 21 16:37:53 2000
1503@@ -58,6 +58,31 @@
1504 /* 2 3/04/97 9:10p Dow */
1505
1506
1507+#ifdef __ia64__
1508+
1509+ .align 32
1510+ .global _cpu_detect_asm
1511+ .proc _cpu_detect_asm
1512+
1513+_cpu_detect_asm:
1514+ mov ret0=0
1515+ br.ret.sptk.few b0
1516+
1517+ .end _cpu_detect_asm
1518+
1519+#elif defined(__alpha__) /* !__ia64__ */
1520+
1521+ .align 4
1522+ .globl _cpu_detect_asm
1523+ .ent _cpu_detect_asm
1524+_cpu_detect_asm:
1525+ .prologue 0
1526+ mov $31,$0
1527+ ret $31,($26),1
1528+ .end _cpu_detect_asm
1529+
1530+#else /* !__ia64__ */
1531+
1532
1533 .file "cpudtect.asm"
1534
1535@@ -333,3 +358,5 @@
1536 .size double_precision_asm,.L_END_double_precision_asm-double_precision_asm
1537
1538 .end
1539+
1540+#endif /* !__ia64___ */
1541--- Glide3/h5/glide3/src/diget.c.ia64-foo Thu Nov 16 14:26:03 2000
1542+++ Glide3/h5/glide3/src/diget.c Thu Dec 21 14:27:40 2000
1543@@ -807,11 +807,11 @@
1544 break;
1545
1546 case GR_SURFACE_TEXTURE:
1547- if (plength == 4) {
1548+ if (plength == sizeof(long)) {
1549 GR_DCL_GC;
1550
1551 #ifdef GLIDE_INIT_HWC
1552- *params = (FxU32) &gc->tBuffer;
1553+ *(long *)params = (long) &gc->tBuffer;
1554 retVal = plength;
1555 #endif
1556 }
1557--- Glide3/h5/glide3/src/disst.c.ia64-foo Wed Nov 15 18:32:52 2000
1558+++ Glide3/h5/glide3/src/disst.c Thu Dec 21 14:27:40 2000
1559@@ -184,7 +184,7 @@
1560 GrErrorCallback( "grSstSelect: non-existent SST", FXTRUE );
1561
1562 _GlideRoot.current_sst = which;
1563- setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] );
1564+ setThreadValue( (long)&_GlideRoot.GCs[_GlideRoot.current_sst] );
1565
1566 #ifdef GLIDE_MULTIPLATFORM
1567 _GlideRoot.curGCFuncs = _GlideRoot.curGC->gcFuncs;
1568--- Glide3/h5/glide3/src/distrip.c.ia64-foo Wed Nov 15 18:32:52 2000
1569+++ Glide3/h5/glide3/src/distrip.c Thu Dec 21 14:27:40 2000
1570@@ -552,10 +552,10 @@
1571 else {
1572 void *b_ptr, *c_ptr;
1573 while ((int)Count >= 3) {
1574- b_ptr = (void *)((FxU32)pointers + stride);
1575- c_ptr = (void *)((FxU32)pointers + stride*2);
1576+ b_ptr = (void *)((long)pointers + stride);
1577+ c_ptr = (void *)((long)pointers + stride*2);
1578 TRISETUP(pointers, b_ptr, c_ptr);
1579- pointers = (void *)((FxU32)c_ptr + stride);
1580+ pointers = (void *)((long)c_ptr + stride);
1581 Count -= 3;
1582 }
1583 }
1584--- Glide3/h5/glide3/src/fifo.c.ia64-foo Thu Nov 16 14:26:03 2000
1585+++ Glide3/h5/glide3/src/fifo.c Thu Dec 21 14:27:40 2000
1586@@ -502,7 +502,7 @@
1587 } ;
1588
1589
1590-#define GEN_INDEX(a) ((((FxU32) a) - ((FxU32) gc->reg_ptr)) >> 2)
1591+#define GEN_INDEX(a) ((((long) a) - ((long) gc->reg_ptr)) >> 2)
1592
1593 void
1594 _grFifoWriteDebug(FxU32 addr, FxU32 val, FxU32 fifoPtr)
1595@@ -882,7 +882,9 @@
1596 gc->contextP = 1; /* always has context in CSIM */
1597 #endif /* defined(GLIDE_INIT_HWC) && !defined(__linux__) */
1598 if (gc->contextP) {
1599+#if 0
1600 FxU32 wrapAddr = 0x00UL;
1601+#endif
1602 FxU32 checks;
1603
1604 GR_ASSERT(blockSize > 0);
1605@@ -1097,8 +1099,10 @@
1606 }
1607
1608 P6FENCE;
1609-
1610+
1611+#if 0
1612 wrapAddr = (FxU32)gc->cmdTransportInfo.fifoPtr;
1613+#endif
1614
1615 /* Update roomXXX fields for the actual wrap */
1616 gc->cmdTransportInfo.roomToReadPtr -= gc->cmdTransportInfo.roomToEnd;
1617@@ -1176,10 +1180,10 @@
1618 }
1619
1620
1621-FxU32
1622-_grHwFifoPtr(FxBool ignored)
1623+long
e1491fca 1624+_grHwFifoPtr(FxBool ignored)
a5b5e4cc
AM
1625 {
1626- FxU32 rVal = 0;
1627+ long rVal = 0;
1628
1629 FxU32 status, readPtrL1, readPtrL2;
1630 FxU32 chip ; /* AJB SLI MAYHEM */
1631@@ -1238,7 +1242,7 @@
1632 readPtrL2 = GET(gc->cRegs->cmdFifo0.readPtrL);
1633 } while (readPtrL1 != readPtrL2);
1634 }
1635- rVal = (((FxU32)gc->cmdTransportInfo.fifoStart) +
1636+ rVal = (((long)gc->cmdTransportInfo.fifoStart) +
1637 readPtrL2 -
1638 (FxU32)gc->cmdTransportInfo.fifoOffset);
1639 }
1640@@ -1388,13 +1392,13 @@
1641 gcFifo=&gc->cmdTransportInfo;
1642 readPos=readPos-gcFifo->fifoOffset;
1643 gcFifo->fifoPtr = gcFifo->fifoStart + (readPos>>2);
1644- gcFifo->fifoRead = (FxU32)gcFifo->fifoPtr;
1645+ gcFifo->fifoRead = (long)gcFifo->fifoPtr;
1646 #else
1647 gcFifo=&gc->cmdTransportInfo;
1648 gcFifo->fifoPtr = gc->rawLfb+(fifoPtr>>2);
1649 gcFifo->fifoRead = ((int)gc->rawLfb)+fifoRead;
1650 #endif
1651- gcFifo->roomToReadPtr = gcFifo->fifoRead-((int)gcFifo->fifoPtr)-FIFO_END_ADJUST-sizeof(FxU32);
1652+ gcFifo->roomToReadPtr = gcFifo->fifoRead-((long)gcFifo->fifoPtr)-FIFO_END_ADJUST-sizeof(FxU32);
1653 if (gcFifo->roomToReadPtr<0) gcFifo->roomToReadPtr+=gcFifo->fifoSize;
1654 gcFifo->roomToEnd = gcFifo->fifoSize -
1655 ((gcFifo->fifoPtr-gcFifo->fifoStart)<<2) -
1656@@ -1412,7 +1416,7 @@
1657 GR_DCL_GC;
1658 gcFifo=&gc->cmdTransportInfo;
1659 *fifoPtr=(gcFifo->fifoPtr-gc->rawLfb)<<2;
1660- *fifoRead=(gcFifo->fifoRead-(int)gc->rawLfb);
1661+ *fifoRead=(gcFifo->fifoRead-(long)gc->rawLfb);
1662 }
1663
1664 int
1665--- Glide3/h5/glide3/src/fxcmd.h.ia64-foo Wed Nov 15 18:32:52 2000
1666+++ Glide3/h5/glide3/src/fxcmd.h Thu Dec 21 14:27:40 2000
1667@@ -222,7 +222,7 @@
1668 /* NB: This should be used sparingly because it does a 'real' hw read
1669 * which is *SLOW*.
1670 */
1671-FxU32 _grHwFifoPtr(FxBool);
1672+long _grHwFifoPtr(FxBool);
1673 #define HW_FIFO_PTR(a) _grHwFifoPtr(a)
1674
1675 #if FIFO_ASSERT_FULL
1676@@ -825,8 +825,8 @@
1677
1678 #define REG_GROUP_END() \
1679 ASSERT(_checkP); \
1680- ASSERT((((FxU32)_regGroupFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) >> 2) == _groupNum + 1); \
1681- gc->cmdTransportInfo.fifoRoom -= ((FxU32)_regGroupFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
1682+ ASSERT((((long)_regGroupFifoPtr - (long)gc->cmdTransportInfo.fifoPtr) >> 2) == _groupNum + 1); \
1683+ gc->cmdTransportInfo.fifoRoom -= ((long)_regGroupFifoPtr - (long)gc->cmdTransportInfo.fifoPtr); \
1684 gc->cmdTransportInfo.fifoPtr = (FxU32*)_regGroupFifoPtr; \
1685 GDBG_INFO(gc->myLevel + 200, "\tGroupEnd: (0x%X : 0x%X)\n", \
1686 gc->cmdTransportInfo.fifoPtr, gc->cmdTransportInfo.fifoRoom); \
1687@@ -1137,7 +1137,7 @@
1688
1689 #define TRI_END \
1690 TRI_ASSERT(); \
1691- gc->cmdTransportInfo.fifoRoom -= ((FxU32)tPackPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
1692+ gc->cmdTransportInfo.fifoRoom -= ((long)tPackPtr - (long)gc->cmdTransportInfo.fifoPtr); \
1693 gc->cmdTransportInfo.fifoPtr = tPackPtr; \
1694 GDBG_INFO(gc->myLevel + 200, "\tTriEnd: (0x%X : 0x%X)\n", tPackPtr, gc->cmdTransportInfo.fifoRoom); \
1695 FIFO_ASSERT(); \
1696@@ -1156,12 +1156,12 @@
1697 GR_CHECK_COMPATABILITY(FN_NAME, \
1698 !gc->open, \
1699 "Called before grSstWinOpen()"); \
1700- GR_ASSERT(((FxU32)(packetPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \
1701+ GR_ASSERT(((long)(packetPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \
1702 GR_ASSERT((__numWords) > 0); /* packet size */ \
1703 GR_ASSERT((__numWords) < ((0x01 << 19) - 2)); \
1704 GR_ASSERT((((FxU32)(__numWords) + 2) << 2) <= (FxU32)gc->cmdTransportInfo.fifoRoom); \
1705- GR_ASSERT(((FxU32)packetPtr + (((__numWords) + 2) << 2)) < \
1706- (FxU32)gc->cmdTransportInfo.fifoEnd); \
1707+ GR_ASSERT(((unsigned long)packetPtr + (((__numWords) + 2) << 2)) < \
1708+ (unsigned long)gc->cmdTransportInfo.fifoEnd); \
1709 GR_ASSERT((hdr2 & 0xE0000000UL) == 0x00UL); \
1710 GR_ASSERT(((__addr) & 0x03UL) == 0x00UL); \
1711 FIFO_ASSERT(); \
1712@@ -1206,8 +1206,8 @@
1713
1714 #define FIFO_LINEAR_WRITE_END \
1715 DEBUGFIFODUMP_LINEAR(gc->cmdTransportInfo.fifoPtr); \
1716- GR_ASSERT((((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) >> 2) == __writeSize + 2); \
1717- gc->cmdTransportInfo.fifoRoom -= ((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
1718+ GR_ASSERT((((long)packetPtr - (long)gc->cmdTransportInfo.fifoPtr) >> 2) == __writeSize + 2); \
1719+ gc->cmdTransportInfo.fifoRoom -= ((long)packetPtr - (long)gc->cmdTransportInfo.fifoPtr); \
1720 gc->cmdTransportInfo.fifoPtr = packetPtr; \
1721 GDBG_INFO(gc->myLevel + 200, "\tLinearEnd: (0x%X : 0x%X)\n", \
1722 packetPtr, gc->cmdTransportInfo.fifoRoom); \
1723@@ -1625,7 +1625,7 @@
1724 } \
1725 else { \
1726 FxU32 argb; \
1727- argb = *((FxU32 *)((int)_s + i)) & 0x00ffffff; \
1728+ argb = *((FxU32 *)((long)_s + i)) & 0x00ffffff; \
1729 TRI_SETF(*((float *)&argb)); \
1730 dataElem++; \
1731 i = gc->tsuDataList[dataElem]; \
1732--- Glide3/h5/glide3/src/fxglide.h.ia64-foo Fri Nov 24 13:36:47 2000
1733+++ Glide3/h5/glide3/src/fxglide.h Thu Dec 21 14:27:40 2000
1734@@ -1564,7 +1564,7 @@
1735 SET_FIFO(*curFifoPtr++, *curPktData++); \
1736 } \
1737 GR_INC_SIZE((__writeCount) * sizeof(FxU32)); \
1738- gc->cmdTransportInfo.fifoRoom -= ((FxU32)curFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
1739+ gc->cmdTransportInfo.fifoRoom -= ((long)curFifoPtr - (long)gc->cmdTransportInfo.fifoPtr); \
1740 gc->cmdTransportInfo.fifoPtr = curFifoPtr; \
1741 } \
1742 GR_CHECK_SIZE(); \
1743@@ -1684,7 +1684,7 @@
1744 */
1745
1746 FxU32* fifoPtr; /* Current write pointer into fifo */
1747- FxU32 fifoRead; /* Last known hw read ptr.
1748+ long fifoRead; /* Last known hw read ptr.
1749 * If on an sli enabled system this will be
1750 * the 'closest' hw read ptr of the sli
1751 * master and slave.
1752@@ -1781,11 +1781,11 @@
1753 frontBuffer,
1754 backBuffer,
1755 buffers0[4],
1756- buffers1[4],
1757- lfbBuffers[4]; /* Tile relative addresses of the color/aux
1758+ buffers1[4];
1759+ long lfbBuffers[4]; /* Tile relative addresses of the color/aux
1760 * buffers for lfbReads.
1761 */
1762- FxU32 lockPtrs[2]; /* pointers to locked buffers */
1763+ long lockPtrs[2]; /* pointers to locked buffers */
1764 FxU32 fbStride;
1765
1766 FxBool colTiled, // AJB - grBufferClear needs to know when target surfaces
1767@@ -2096,6 +2096,10 @@
1768 * This is the __linux__ code.
1769 */
1770 #define P6FENCE asm("xchg %%eax, %0" : : "m" (_GlideRoot.p6Fencer) : "eax");
1771+#elif defined(__GNUC__) && defined(__ia64__)
1772+# define P6FENCE asm volatile ("mf.a" ::: "memory");
1773+#elif defined(__alpha__)
1774+# define P6FENCE asm volatile("mb" ::: "memory");
1775 #else /* !defined ( P6FENCE ) */
1776 # error "P6 Fencing code needs to be added for this compiler"
1777 #endif /* !defined ( P6FENCE ) */
1778@@ -2619,7 +2623,7 @@
1779 #endif
1780
1781 #ifdef __linux__
1782-extern FxU32 threadValueLinux;
1783+extern long threadValueLinux;
1784 #define getThreadValueFast() threadValueLinux
1785 #endif /* defined(__linux__) */
1786
1787@@ -2642,9 +2646,9 @@
1788 freeThreadStorage( void );
1789
1790 void
1791-setThreadValue( FxU32 value );
1792+setThreadValue( long value );
1793
1794-FxU32
1795+long
1796 getThreadValueSLOW( void );
1797
1798 void
1799@@ -2982,7 +2986,11 @@
1800 #if defined(GLIDE_SANITY_ASSERT)
1801 #define GR_ASSERT(exp) ((void)((!(exp)) ? (_grAssert(#exp, __FILE__, __LINE__),0) : 0xFFFFFFFF))
1802 #else
1803-#define GR_ASSERT(exp) ((void)(0 && ((FxU32)(exp))))
1804+# ifdef __GNUC__
1805+# define GR_ASSERT(exp) ((void) 0)
1806+# else
1807+# define GR_ASSERT(exp) ((void)(0 && ((FxU32)(exp))))
1808+# endif
1809 #endif
1810
1811 #define INTERNAL_CHECK(__name, __cond, __msg, __fatalP) \
1812@@ -3056,7 +3064,7 @@
1813 #define HW_TEX_PTR(__b) ((FxU32*)(((FxU32)(__b)) + HW_TEXTURE_OFFSET))
1814
1815 /* access a floating point array with a byte index */
1816-#define FARRAY(p,i) (*(float *)((i)+(int)(p)))
1817+#define FARRAY(p,i) (*(float *)((i)+(long)(p)))
1818 #define ArraySize(__a) (sizeof(__a) / sizeof((__a)[0]))
1819
1820 #if GDBG_INFO_ON
1821--- Glide3/h5/glide3/src/g3df.c.ia64-foo Wed Nov 15 18:32:53 2000
1822+++ Glide3/h5/glide3/src/g3df.c Thu Dec 21 14:27:40 2000
1823@@ -99,6 +99,7 @@
1824 * Added GR_DIENTRY for di glide functions
1825 **
1826 */
1827+#include <ctype.h>
1828 #include <stdio.h>
1829 #include <string.h>
1830 #include <3dfx.h>
1831--- Glide3/h5/glide3/src/gaa.c.ia64-foo Wed Nov 15 18:32:53 2000
1832+++ Glide3/h5/glide3/src/gaa.c Thu Dec 21 14:27:40 2000
1833@@ -388,8 +388,8 @@
1834 }
1835 else {
1836 ia = gc->state.vData.pargbInfo.offset;
1837- *((FxU32 *)&v1a)=*((FxU32 *)((int)a + ia))&0x00ffffff;
1838- *((FxU32 *)&v2a)=*((FxU32 *)((int)b + ia))&0x00ffffff;
1839+ *((FxU32 *)&v1a)=*((FxU32 *)((long)a + ia))&0x00ffffff;
1840+ *((FxU32 *)&v2a)=*((FxU32 *)((long)b + ia))&0x00ffffff;
1841 }
1842
1843 {
1844@@ -690,7 +690,7 @@
1845 FxU32 argb;
1846
1847 if (i == ia) {
1848- argb = *((FxU32 *)((int)e + i)) & 0x00ffffff;
1849+ argb = *((FxU32 *)((long)e + i)) & 0x00ffffff;
1850 TRI_SETF(*((float *)&argb));
1851 }
1852 else {
1853@@ -869,8 +869,8 @@
1854 ady = -ady;
1855
1856 if (gc->state.vData.colorType != GR_FLOAT) {
1857- *((FxU32 *)&v1a)=*((FxU32 *)((int)v1 + ia))&0x00ffffff;
1858- *((FxU32 *)&v2a)=*((FxU32 *)((int)v2 + ia))&0x00ffffff;
1859+ *((FxU32 *)&v1a)=*((FxU32 *)((long)v1 + ia))&0x00ffffff;
1860+ *((FxU32 *)&v2a)=*((FxU32 *)((long)v2 + ia))&0x00ffffff;
1861 }
1862
1863 if (adx >= ady) { /* X major line */
1864@@ -1270,8 +1270,8 @@
1865 }
1866 else {
1867 ia = gc->state.vData.pargbInfo.offset;
1868- *((FxU32 *)&v1a)=*((FxU32 *)((int)a + ia))&0x00ffffff;
1869- *((FxU32 *)&v2a)=*((FxU32 *)((int)b + ia))&0x00ffffff;
1870+ *((FxU32 *)&v1a)=*((FxU32 *)((long)a + ia))&0x00ffffff;
1871+ *((FxU32 *)&v2a)=*((FxU32 *)((long)b + ia))&0x00ffffff;
1872 }
1873
1874 {
1875--- Glide3/h5/glide3/src/gdraw.c.ia64-foo Wed Nov 15 18:32:53 2000
1876+++ Glide3/h5/glide3/src/gdraw.c Thu Dec 21 14:27:40 2000
1877@@ -270,7 +270,7 @@
1878 GR_BEGIN_NOFIFOCHECK(FN_NAME, 91);
1879 GDBG_INFO_MORE(gc->myLevel, "(a = 0x%x, b = 0x%x)\n", a, b);
1880
1881-#if __POWERPC__
1882+#if defined (__POWERPC__) || defined(__ia64__)
1883 {
1884 const void *verts[2];
1885 verts[0] = a; verts[1] = b;
1886@@ -388,7 +388,7 @@
1887 GR_INC_SIZE(sizeof(FxU32))
1888
1889 #define DA_END \
1890- gc->cmdTransportInfo.fifoRoom -= ((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \
1891+ gc->cmdTransportInfo.fifoRoom -= ((long)packetPtr - (long)gc->cmdTransportInfo.fifoPtr); \
1892 gc->cmdTransportInfo.fifoPtr = packetPtr; \
1893 FIFO_ASSERT(); \
1894 }
1895@@ -414,7 +414,7 @@
1896 * except the data set up is from the pointer array and
1897 * its data layout
1898 */
1899- FxI32 stride = mode;
1900+ FxI32 stride;
1901
1902 /* we snap to an integer by adding a large enough number that it
1903 * shoves all fraction bits off the right side of the mantissa.
1904@@ -449,8 +449,10 @@
1905 */
1906 #define POINTS_BUFFER 100
1907
1908- if (stride == 0)
1909+ if (mode == 0)
1910 stride = gc->state.vData.vStride;
1911+ else
1912+ stride = sizeof(float *) / sizeof (float);
1913
1914 if (gc->state.grCoordinateSpaceArgs.coordinate_space_mode == GR_WINDOW_COORDS) {
1915 #ifndef FX_GLIDE_H5_CSIM
1916@@ -757,7 +759,7 @@
1917 int j;
1918 FxI32 sCount;
1919 FxU32 vertexParamOffset;
1920- FxI32 stride = mode;
1921+ FxI32 stride;
1922
1923 #define DX gc->pool.ftemp1
1924 #define ADY gc->pool.ftemp2
1925@@ -773,8 +775,11 @@
1926
1927 #define LINES_BUFFER 100
1928
1929- if (stride == 0)
1930+ if (mode == 0)
1931 stride = gc->state.vData.vStride;
1932+ else
1933+ stride = sizeof(float *) / sizeof (float);
1934+
1935 if (ltype == GR_LINES)
1936 sCount = count >> 1; /* line list */
1937 else
1938@@ -802,16 +807,16 @@
1939 ** compute absolute deltas and draw from low Y to high Y
1940 */
1941 ADY = FARRAY(b, gc->state.vData.vertexInfo.offset+4) - FARRAY(a, gc->state.vData.vertexInfo.offset+4);
1942- i = *(long *)&ADY;
1943+ i = *(int *)&ADY;
1944 if (i < 0) {
1945 float *tv;
1946 tv = a; a = b; b = tv;
1947 i ^= 0x80000000; /* ady = -ady; */
1948- (*(long *)&ADY) = i;
1949+ (*(int *)&ADY) = i;
1950 }
1951
1952 DX = FARRAY(b, gc->state.vData.vertexInfo.offset) - FARRAY(a, gc->state.vData.vertexInfo.offset);
1953- j = *(long *)&DX;
1954+ j = *(int *)&DX;
1955 if (j < 0) {
1956 j ^= 0x80000000; /* adx = -adx; */
1957 }
1958@@ -981,7 +986,7 @@
1959 ** compute absolute deltas and draw from low Y to high Y
1960 */
1961 ADY = tmp2 - tmp1;
1962- i = *(long *)&ADY;
1963+ i = *(int *)&ADY;
1964 if (i < 0) {
1965 float *tv;
1966 owa = oowb; owb = oowa;
1967@@ -989,7 +994,7 @@
1968 fby = tmp1;
1969 tv = a; a = b; b = tv;
1970 i ^= 0x80000000; /* ady = -ady; */
1971- (*(long *)&ADY) = i;
1972+ (*(int *)&ADY) = i;
1973 }
1974 fax = FARRAY(a, gc->state.vData.vertexInfo.offset)
1975 *owa*gc->state.Viewport.hwidth+gc->state.Viewport.ox;
1976@@ -997,7 +1002,7 @@
1977 *owb*gc->state.Viewport.hwidth+gc->state.Viewport.ox;
1978
1979 DX = fbx - fax;
1980- j = *(long *)&DX;
1981+ j = *(int *)&DX;
1982 if (j < 0) {
1983 j ^= 0x80000000; /* adx = -adx; */
1984 }
1985@@ -1083,7 +1088,7 @@
1986 #if GLIDE_HW_TRI_SETUP && GLIDE_PACKET3_TRI_SETUP
1987 FxI32
1988 k;
1989- FxI32 stride = mode;
1990+ FxI32 stride;
1991 float *vPtr;
1992
1993 GR_BEGIN_NOFIFOCHECK(FN_NAME, 90);
1994@@ -1097,9 +1102,10 @@
1995 GDBG_INFO(110, "%s: paramMask = 0x%x\n", FN_NAME, gc->cmdTransportInfo.paramMask);
1996 #endif
1997
1998- if (stride == 0)
1999+ if (mode == 0)
2000 stride = gc->state.vData.vStride;
2001-
2002+ else
2003+ stride = sizeof(float *) / sizeof (float);
2004
2005 gc->stats.trisProcessed+=(count/3);
2006
2007--- Glide3/h5/glide3/src/gerror.c.ia64-foo Wed Nov 15 18:32:53 2000
2008+++ Glide3/h5/glide3/src/gerror.c Thu Dec 21 14:27:40 2000
2009@@ -293,7 +293,7 @@
2010
2011 gdbg_printf("Command Fifo:\n");
2012 gdbg_printf("\tSoftware:\n");
2013- gdbg_printf("\t\tfifoPtr: 0x%X\n", (FxU32)gc->cmdTransportInfo.fifoPtr - (FxU32) gc->rawLfb);
2014+ gdbg_printf("\t\tfifoPtr: 0x%X\n", (long)gc->cmdTransportInfo.fifoPtr - (long) gc->rawLfb);
2015 gdbg_printf("\t\tfifoOffset: 0x%X\n", gc->cmdTransportInfo.fifoOffset);
2016 gdbg_printf("\t\tfifoEnd: 0x%X\n", gc->cmdTransportInfo.fifoEnd - gc->rawLfb);
2017 gdbg_printf("\t\tfifoSize: 0x%X\n", gc->cmdTransportInfo.fifoSize);
2018@@ -303,7 +303,7 @@
2019
2020 if ( !gc->windowed ) {
2021 gdbg_printf("\tHardware:\n");
2022- gdbg_printf("\t\treadPtrL: 0x%X\n", HW_FIFO_PTR(FXTRUE) - (FxU32)gc->rawLfb);
2023+ gdbg_printf("\t\treadPtrL: 0x%X\n", HW_FIFO_PTR(FXTRUE) - (long)gc->rawLfb);
2024 gdbg_printf("\t\tdepth: 0x%X\n", GR_CAGP_GET(depth));
2025 gdbg_printf("\t\tholeCount: 0x%X\n", GR_CAGP_GET(holeCount));
2026 gdbg_printf("\t\tbaseAddrL: 0x%X\n", GR_CAGP_GET(baseAddrL));
2027--- Glide3/h5/glide3/src/glide.h.ia64-foo Fri Nov 24 13:36:47 2000
2028+++ Glide3/h5/glide3/src/glide.h Thu Dec 21 14:27:40 2000
2029@@ -56,7 +56,7 @@
2030 typedef FxU32 GrStipplePattern_t;
2031 #endif /* __linux__ */
2032 typedef FxU8 GrFog_t;
2033-typedef FxU32 GrContext_t;
2034+typedef unsigned long GrContext_t;
2035 typedef int (FX_CALL *GrProc)();
2036
2037 /*
2038--- Glide3/h5/glide3/src/gpci.c.ia64-foo Wed Nov 15 18:32:53 2000
2039+++ Glide3/h5/glide3/src/gpci.c Thu Dec 21 14:27:40 2000
2040@@ -588,14 +588,14 @@
2041 {
2042 /* Window coords */
2043 {
2044- { _trisetup_null, _trisetup_null },
2045- { _trisetup_null, _trisetup_null },
2046+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
2047+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
2048 },
2049
2050 /* Clip coordinates */
2051 {
2052- { _trisetup_null, _trisetup_null },
2053- { _trisetup_null, _trisetup_null },
2054+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
2055+ { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null },
2056 },
2057 },
2058 };
2059@@ -1710,7 +1710,7 @@
2060 GR_DCL_GC;
2061
2062 /* If there is no current gc in tls then set the current context. */
2063- if (gc == NULL) setThreadValue((FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst]);
2064+ if (gc == NULL) setThreadValue((long)&_GlideRoot.GCs[_GlideRoot.current_sst]);
2065 }
2066 break;
2067 case DLL_THREAD_DETACH:
2068--- Glide3/h5/glide3/src/gtexdl.c.ia64-foo Wed Nov 15 18:32:53 2000
2069+++ Glide3/h5/glide3/src/gtexdl.c Thu Dec 21 14:27:40 2000
2070@@ -473,7 +473,7 @@
2071 while(i < start + slopCount) {
2072 FxU32 entry;
2073
2074- entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF);
2075+ entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF));
2076
2077 gc->state.shadow.paletteRow[i>>3].data[i&7] = entry;
2078 REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry );
2079@@ -491,7 +491,7 @@
2080 while(i < endIndex) {
2081 FxU32 entry;
2082
2083- entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF);
2084+ entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF));
2085
2086 gc->state.shadow.paletteRow[i>>3].data[i&7] = entry;
2087 REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry );
2088@@ -510,7 +510,7 @@
2089 while(i <= end) {
2090 FxU32 entry;
2091
2092- entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF);
2093+ entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF));
2094
2095 gc->state.shadow.paletteRow[i>>3].data[i&7] = entry;
2096 REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry );
2097--- Glide3/h5/glide3/src/gthread.c.ia64-foo Wed Nov 15 18:32:53 2000
2098+++ Glide3/h5/glide3/src/gthread.c Thu Dec 21 14:27:40 2000
2099@@ -64,13 +64,13 @@
2100
2101 } /* initThreadStorage */
2102
2103-void setThreadValue( FxU32 value ) {
2104+void setThreadValue( long value ) {
2105 GR_CHECK_F( "setThreadValue", !threadInit, "Thread storage not initialized\n" );
2106 TlsSetValue( _GlideRoot.tlsIndex, (void*)value );
2107 }
2108
2109 #pragma warning (4:4035) /* No return value */
2110-FxU32 getThreadValueSLOW( void ) {
2111+long getThreadValueSLOW( void ) {
2112 GR_CHECK_F( "getThreadValue", !threadInit, "Thread storage not initialized\n" );
2113
2114 #if 0
2115@@ -131,7 +131,7 @@
2116 {
2117 }
2118
2119-void setThreadValue( FxU32 value )
2120+void setThreadValue( long value )
2121 {
2122 _threadValueMacOS = value;
2123 }
2124@@ -169,7 +169,7 @@
2125 #include "fxglide.h"
2126 #include "fxcmd.h"
2127
2128-FxU32 threadValueLinux;
2129+long threadValueLinux;
2130
2131 void initThreadStorage(void)
2132 {
2133@@ -177,12 +177,12 @@
2134
2135
2136
2137-void setThreadValue( FxU32 value )
2138+void setThreadValue( long value )
2139 {
2140 threadValueLinux = value;
2141 }
2142
2143-FxU32 getThreadValueSLOW( void )
2144+long getThreadValueSLOW( void )
2145 {
2146 return threadValueLinux;
2147 }
2148--- Glide3/h5/glide3/src/gsst.c.ia64-foo Fri Nov 17 16:31:05 2000
2149+++ Glide3/h5/glide3/src/gsst.c Thu Dec 21 14:27:40 2000
2150@@ -849,30 +849,30 @@
2151
2152 ResEntry
2153 _resTable[] = {
2154- GR_RESOLUTION_320x200, 320, 200, /* 0x0 */
2155- GR_RESOLUTION_320x240, 320, 240, /* 0x1 */
2156- GR_RESOLUTION_400x256, 400, 256, /* 0x2 */
2157- GR_RESOLUTION_512x384, 512, 384, /* 0x3 */
2158- GR_RESOLUTION_640x200, 640, 200, /* 0x4 */
2159- GR_RESOLUTION_640x350, 640, 350, /* 0x5 */
2160- GR_RESOLUTION_640x400, 640, 400, /* 0x6 */
2161- GR_RESOLUTION_640x480, 640, 480, /* 0x7 */
2162- GR_RESOLUTION_800x600, 800, 600, /* 0x8 */
2163- GR_RESOLUTION_960x720, 960, 720, /* 0x9 */
2164- GR_RESOLUTION_856x480, 856, 480, /* 0xa */
2165- GR_RESOLUTION_512x256, 512, 256, /* 0xb */
2166- GR_RESOLUTION_1024x768, 1024, 768, /* 0xC */
2167- GR_RESOLUTION_1280x1024, 1280, 1024, /* 0xD */
2168- GR_RESOLUTION_1600x1200, 1600, 1200, /* 0xE */
2169- GR_RESOLUTION_400x300, 400, 300, /* 0xF */
2170- GR_RESOLUTION_1152x864, 1152, 864, /* 0x10 */
2171- GR_RESOLUTION_1280x960, 1280, 960, /* 0x11 */
2172- GR_RESOLUTION_1600x1024, 1600, 1024, /* 0x12 */
2173- GR_RESOLUTION_1792x1344, 1792, 1344, /* 0x13 */
2174- GR_RESOLUTION_1856x1392, 1856, 1392, /* 0x14 */
2175- GR_RESOLUTION_1920x1440, 1920, 1440, /* 0x15 */
2176- GR_RESOLUTION_2048x1536, 2048, 1536, /* 0x16 */
2177- GR_RESOLUTION_2048x2048, 2048, 2048 /* 0x17 */
2178+ { GR_RESOLUTION_320x200, 320, 200 }, /* 0x0 */
2179+ { GR_RESOLUTION_320x240, 320, 240 }, /* 0x1 */
2180+ { GR_RESOLUTION_400x256, 400, 256 }, /* 0x2 */
2181+ { GR_RESOLUTION_512x384, 512, 384 }, /* 0x3 */
2182+ { GR_RESOLUTION_640x200, 640, 200 }, /* 0x4 */
2183+ { GR_RESOLUTION_640x350, 640, 350 }, /* 0x5 */
2184+ { GR_RESOLUTION_640x400, 640, 400 }, /* 0x6 */
2185+ { GR_RESOLUTION_640x480, 640, 480 }, /* 0x7 */
2186+ { GR_RESOLUTION_800x600, 800, 600 }, /* 0x8 */
2187+ { GR_RESOLUTION_960x720, 960, 720 }, /* 0x9 */
2188+ { GR_RESOLUTION_856x480, 856, 480 }, /* 0xa */
2189+ { GR_RESOLUTION_512x256, 512, 256 }, /* 0xb */
2190+ { GR_RESOLUTION_1024x768, 1024, 768 }, /* 0xC */
2191+ { GR_RESOLUTION_1280x1024, 1280, 1024 }, /* 0xD */
2192+ { GR_RESOLUTION_1600x1200, 1600, 1200 }, /* 0xE */
2193+ { GR_RESOLUTION_400x300, 400, 300 }, /* 0xF */
2194+ { GR_RESOLUTION_1152x864, 1152, 864 }, /* 0x10 */
2195+ { GR_RESOLUTION_1280x960, 1280, 960 }, /* 0x11 */
2196+ { GR_RESOLUTION_1600x1024, 1600, 1024 }, /* 0x12 */
2197+ { GR_RESOLUTION_1792x1344, 1792, 1344 }, /* 0x13 */
2198+ { GR_RESOLUTION_1856x1392, 1856, 1392 }, /* 0x14 */
2199+ { GR_RESOLUTION_1920x1440, 1920, 1440 }, /* 0x15 */
2200+ { GR_RESOLUTION_2048x1536, 2048, 1536 }, /* 0x16 */
2201+ { GR_RESOLUTION_2048x2048, 2048, 2048 } /* 0x17 */
2202 };
2203
2204 /* ---------------------------------------------
2205@@ -1172,8 +1172,8 @@
2206 gc->bufferSwaps[t] = 0xffffffff;
2207 }
2208
2209- gc->bufferSwaps[0] = ((FxU32) gc->cmdTransportInfo.fifoPtr -
2210- (FxU32) gc->cmdTransportInfo.fifoStart);
2211+ gc->bufferSwaps[0] = ((long) gc->cmdTransportInfo.fifoPtr -
2212+ (long) gc->cmdTransportInfo.fifoStart);
2213
2214 gc->swapsPending = 1;
2215
2216@@ -1383,7 +1383,7 @@
2217 * current gc. This gc is valid for all threads in the fullscreen
2218 * context.
2219 */
2220- setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] );
2221+ setThreadValue( (long)&_GlideRoot.GCs[_GlideRoot.current_sst] );
2222
2223 {
2224 /* Partial Argument Validation */
2225@@ -2208,7 +2208,7 @@
2226 for (buffer = 0; buffer < nColBuffers; buffer++) {
2227 gc->buffers0[buffer] = bufInfo->colBuffStart0[buffer];
2228 GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers0[buffer]);
2229- gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer];
2230+ gc->lfbBuffers[buffer] = (long)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer];
2231 if (bInfo->buffInfo.enable2ndbuffer) {
2232 gc->buffers1[buffer] = bufInfo->colBuffStart1[buffer];
2233 GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers1[buffer]);
2234@@ -2217,7 +2217,7 @@
2235 if (nAuxBuffers != 0) {
2236 gc->buffers0[buffer] = bufInfo->auxBuffStart0;
2237 GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers0[buffer]);
2238- gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer];
2239+ gc->lfbBuffers[buffer] = (long)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer];
2240 if (bInfo->buffInfo.enable2ndbuffer) {
2241 gc->buffers1[buffer] = bufInfo->auxBuffStart1;
2242 GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers1[buffer]);
2243@@ -2336,7 +2336,7 @@
2244 GDBG_INFO(1, "autoBump: 0x%x\n", _GlideRoot.environment.autoBump);
2245 /* The logic for this is hosed for PowerPC, where we disable auto-bump even
2246 on PCI. */
2247- if (gc->cmdTransportInfo.autoBump = _GlideRoot.environment.autoBump) {
2248+ if ((gc->cmdTransportInfo.autoBump = _GlideRoot.environment.autoBump) != 0) {
2249 if (!hwcInitFifo( bInfo, gc->cmdTransportInfo.autoBump)) {
2250 hwcRestoreVideo(bInfo);
2251 GrErrorCallback(hwcGetErrorString(), FXFALSE);
2252@@ -2376,7 +2376,7 @@
2253 gc->tmu_state[0].total_mem = gc->tramSize;
2254 #else
2255 /* gc->fbOffset = (FxU32)fxHalFbiGetMemory((SstRegs*)gc->reg_ptr); */
2256- gc->fbOffset = (FxU32)gc->rawLfb;
2257+ gc->fbOffset = (long)gc->rawLfb;
2258 gc->fbOffset = 0;
2259 gc->tmuMemInfo[0].tramOffset =
2260 (pixelformat == GR_PIXFMT_ARGB_8888) ? 0x400000 : 0x200000;
2261@@ -2743,7 +2743,10 @@
2262 gcFifo->fifoPtr );
2263
2264 #ifdef __linux__
2265- _grImportFifo(*driInfo.fifoPtr, *driInfo.fifoRead);
2266+ {
2267+ extern void _grImportFifo(int, int);
2268+ _grImportFifo(*driInfo.fifoPtr, *driInfo.fifoRead);
2269+ }
2270 #endif
2271
2272 /* The hw is now in a usable state from the fifo macros.
2273@@ -3033,7 +3036,7 @@
2274 * the tls gc explicitly otherwise other whacky-ness (read 'random
2275 * crashes' will ensue).
2276 */
2277- setThreadValue((FxU32)gc);
2278+ setThreadValue((long)gc);
2279 if ((gc != NULL) && gc->open) grFlush();
2280
2281 /* Make sure that the user specified gc is not whacked */
2282--- Glide3/h5/glide3/src/glfb.c.ia64-foo Fri Nov 17 16:31:05 2000
2283+++ Glide3/h5/glide3/src/glfb.c Thu Dec 21 14:27:40 2000
2284@@ -1114,7 +1114,7 @@
2285 case GR_LFB_SRC_FMT_ZA16:
2286 dstData = (FxU32*)(((FxU16*)dstData) + dst_x);
2287 length = src_width * 2;
2288- aligned = !((int)dstData&0x2);
2289+ aligned = !((long)dstData&0x2);
2290 srcJump = src_stride - length;
2291 dstJump = info.strideInBytes - length;
2292 if (aligned) {
2293@@ -1404,7 +1404,7 @@
2294 length = src_width * 2;
2295 dstJump = dst_stride - length;
2296 srcJump = info.strideInBytes - length;
2297- aligned = !((int)srcData&0x2);
2298+ aligned = !((long)srcData&0x2);
2299 odd = (src_y+src_height) & 0x1;
2300
2301 #if __POWERPC__
2302--- Glide3/h5/glide3/src/gglide.c.ia64-foo Fri Nov 24 13:36:47 2000
2303+++ Glide3/h5/glide3/src/gglide.c Thu Dec 21 14:27:40 2000
2304@@ -2647,8 +2647,8 @@
2305 for ( i = 0; i < MAX_BUFF_PENDING && j == -1; i++) {
2306 if (gc->bufferSwaps[i] == 0xffffffff) {
2307 gc->bufferSwaps[i] =
2308- (FxU32) gc->cmdTransportInfo.fifoPtr -
2309- (FxU32) gc->cmdTransportInfo.fifoStart;
2310+ (long) gc->cmdTransportInfo.fifoPtr -
2311+ (long) gc->cmdTransportInfo.fifoStart;
2312 j = i;
2313 }
2314 }
2315@@ -2850,7 +2850,7 @@
2316 REG_GROUP_SET_WAX(hw, srcXY, x | ((driInfo.y+(y-driInfo.y))<<16));
2317 REG_GROUP_SET_WAX(hw, dstSize, (w&0x1FFF)|((h&0x1FFF)<<16));
2318 REG_GROUP_SET_WAX(hw, dstXY, (x&0x1FFF) | ((y&0x1FFF)<<16));
2319- REG_GROUP_SET_WAX(hw, command, (0xCC<<24) | 0x1 | BIT(8));
2320+ REG_GROUP_SET_WAX(hw, command, (0xCCu<<24) | 0x1 | BIT(8));
2321 REG_GROUP_END();
2322 } while (cnt);
2323
2324@@ -3903,7 +3903,7 @@
2325 * continuing so that any internal glide calls have a valid
2326 * gc from tls via GR_DCL_GC. F*ck this up at your own peril.
2327 */
2328- setThreadValue((FxU32)gc);
2329+ setThreadValue((long)gc);
2330 #if (GLIDE_PLATFORM & GLIDE_OS_WIN32)
2331 /* Flush any remaining commands and cleanup any per gc state */
2332 grSurfaceReleaseContext((GrContext_t)gc);
2333--- Glide3/h5/glide3/src/makefile.ia64-foo Thu Dec 21 14:39:07 2000
2334+++ Glide3/h5/glide3/src/makefile Thu Dec 21 14:38:51 2000
2335@@ -47,7 +47,13 @@
2336 FX_GLIDE_PACKET_FIFO = 1
2337 !endif
2338
2339+ARCH := $(patsubst sparc64,sparc,$(patsubst i%86,i386,$(shell uname -m)))
2340+
2341+ifeq (i386,$(ARCH))
2342 FX_GLIDE_CTRISETUP = 0
2343+else
2344+FX_GLIDE_CTRISETUP = 1
2345+endif
2346
2347 # Compile for specific hardware
2348 !if "$(HAL_CSIM)" == "1"
2349--- Glide3/h5/glide3/tests/.gdbinit.ia64-foo Thu Dec 21 14:27:40 2000
2350+++ Glide3/h5/glide3/tests/.gdbinit Thu Dec 21 14:27:40 2000
2351@@ -0,0 +1,3 @@
2352+dir /r/erikson/usr/src/redhat/BUILD/Glide_V3-DRI-3.10/h3/glide3/src:/r/erikson/usr/src/redhat/BUILD/Glide_V3-DRI-3.10/h3/minihwc:/r/erikson/usr/src/redhat/BUILD/XFree86-4.0/xc/lib/Xxf86vm
2353+set gdbg_debuglevel[80]=255
2354+set gdbg_debuglevel[280]=255
2355--- Glide3/h5/incsrc/gdebug.h.ia64-foo Wed Nov 15 18:32:58 2000
2356+++ Glide3/h5/incsrc/gdebug.h Thu Dec 21 14:27:40 2000
2357@@ -67,12 +67,21 @@
2358 #pragma disable_message (111, 201, 302)
2359 #endif /* defined(__WATCOMC__) || defined(__WATCOM_CPLUSPLUS__) */
2360
2361-#define GDBG_INFO 0 && (unsigned long)
2362-#define GDBG_INFO_MORE 0 && (unsigned long)
2363-#define GDBG_PRINTF 0 && (unsigned long)
2364+#ifdef __GNUC__
2365+# define GDBG_INFO(x...)
2366+# define GDBG_INFO_MORE(x...)
2367+# define GDBG_PRINTF(x...)
2368
2369-#define GDBG_ERROR_SET_CALLBACK 0 && (unsigned long)
2370-#define GDBG_ERROR_CLEAR_CALLBACK 0 && (unsigned long)
2371+# define GDBG_ERROR_SET_CALLBACK(x...)
2372+# define GDBG_ERROR_CLEAR_CALLBACK(x...)
2373+#else
2374+# define GDBG_INFO 0 && (unsigned long)
2375+# define GDBG_INFO_MORE 0 && (unsigned long)
2376+# define GDBG_PRINTF 0 && (unsigned long)
2377+
2378+# define GDBG_ERROR_SET_CALLBACK 0 && (unsigned long)
2379+# define GDBG_ERROR_CLEAR_CALLBACK 0 && (unsigned long)
2380+#endif
2381
2382 #define GDBG_GET_DEBUGLEVEL(x) 0
2383 #define GDBG_SET_DEBUGLEVEL(a,b)
2384--- Glide3/h5/incsrc/h3defs.h.ia64-foo Thu Nov 16 14:21:27 2000
2385+++ Glide3/h5/incsrc/h3defs.h Thu Dec 21 14:27:40 2000
2386@@ -61,11 +61,21 @@
2387
2388 // this crazy macro tests the sign bit of a float by loading it into
2389 // an integer register and then testing the sign bit of the integer
2390-#define FLOAT_ISNEG(f) ((*(int *)(&(f))) < 0)
2391+#ifdef __ia64__
2392+ /* On IA-64, it's faster to do this the obvious way... --davidm 00/08/09 */
2393+# define FLOAT_ISNEG(f) ((f) < 0.0)
2394+#else
2395+# define FLOAT_ISNEG(f) ((*(int *)(&(f))) < 0)
2396+#endif
2397
2398 // these crazy macros returns the sign of a number (1 if >= 0; -1 if < 0)
2399-#define ISIGN(x) (((x) | 0x40000000L) >> 30)
2400-#define FSIGN(f) ISIGN(*(long *)&f)
2401+#ifdef __ia64__
2402+# define ISIGN(x) ((x) >= 0 ? 1 : -1)
2403+# define FSIGN(f) ((f) >= 0.0 ? 1 : -1)
2404+#else
2405+# define ISIGN(x) (((x) | 0x40000000L) >> 30)
2406+# define FSIGN(f) ISIGN(*(long *)&f)
2407+#endif
2408
2409 #define BIT(n) (1UL<<(n))
2410 #define SST_MASK(n) (0xFFFFFFFFL >> (32-(n)))
2411@@ -2032,9 +2042,9 @@
2412
2413 //----------------- useful addressing macros -----------------------
2414 // return pointer to SST at specified WRAP, CHIP, or TREX
2415-#define SST_WRAP(sst,n) ((SstRegs *)((n)*0x4000+(FxI32)(sst)))
2416-#define SST_CHIP(sst,n) ((SstRegs *)((n)*0x400+(FxI32)(sst)))
2417-#define SST_TMU(sst,n) ((SstRegs *)((0x800<<(n))+(FxI32)(sst)))
2418+#define SST_WRAP(sst,n) ((SstRegs *)((n)*0x4000+(long)(sst)))
2419+#define SST_CHIP(sst,n) ((SstRegs *)((n)*0x400+(long)(sst)))
2420+#define SST_TMU(sst,n) ((SstRegs *)((0x800<<(n))+(long)(sst)))
2421 #define SST_TREX(sst,n) SST_TMU(sst,n)
2422
2423 // offsets from the base of memBaseAddr0
2424@@ -2081,7 +2091,7 @@
2425
2426 #define SST_IS_REGISTER_ADDR(a) ( (a) >= SST_IO_OFFSET && (a) < SST_TEX_OFFSET )
2427
2428-#define SST_BASE_ADDRESS(sst) ((FxI32)(sst)-SST_3D_OFFSET)
2429+#define SST_BASE_ADDRESS(sst) ((long)(sst)-SST_3D_OFFSET)
2430 #define SST_IO_ADDRESS(sst) (SST_IO_OFFSET+SST_BASE_ADDRESS(sst))
2431 #define SST_CMDAGP_ADDRESS(sst) (SST_CMDAGP_OFFSET+SST_BASE_ADDRESS(sst))
2432 #define SST_GUI_ADDRESS(sst) (SST_2D_OFFSET+SST_BASE_ADDRESS(sst))
2433--- Glide3/h5/incsrc/h3info.h.ia64-foo Wed Nov 15 18:32:58 2000
2434+++ Glide3/h5/incsrc/h3info.h Thu Dec 21 14:27:40 2000
2435@@ -28,7 +28,11 @@
2436 // basic data types
2437 #define FxU8 unsigned char
2438 #define FxU16 unsigned short
2439-#define FxU32 unsigned long
2440+# ifdef __LP64__
2441+# define FxU32 unsigned int
2442+# else
2443+# define FxU32 unsigned long
2444+# endif
2445 #define FxBool int
2446 // defn of registers not reqd, treat (SstRegs *) as (void *)
2447 typedef void SstRegs;
2448--- Glide3/h5/incsrc/h3regs.h.ia64-foo Wed Nov 15 18:32:58 2000
2449+++ Glide3/h5/incsrc/h3regs.h Thu Dec 21 14:27:40 2000
2450@@ -112,9 +112,12 @@
2451 */
2452
2453 #ifdef _H2INC
2454+# ifdef __LP64__
2455+typedef unsigned int FxU32;
2456+# else
2457 typedef unsigned long FxU32;
2458+# endif
2459 #endif
2460-
2461 //----------------- SST chip I/O layout -------------------------
2462 // I/O registers remapped into memory space
2463 // Includes init, dac/pll, video, and VGA registers
2464@@ -282,8 +285,8 @@
2465 //----------------- SST chip 3D layout -------------------------
2466 // registers are in groups of 8 for easy decode
2467 typedef struct vertex_Rec {
2468- unsigned long x; // 12.4 format
2469- unsigned long y; // 12.4
2470+ FxU32 x; // 12.4 format
2471+ FxU32 y; // 12.4
2472 } vtxRec;
2473
2474 typedef volatile struct sstregs { // THE 3D CHIP
2475@@ -294,127 +297,127 @@
2476 vtxRec vB;
2477 vtxRec vC;
2478
2479- long r; // 12.12 Parameters
2480- long g; // 12.12
2481- long b; // 12.12
2482- long z; // 20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:")
2483- long a; // 12.12
2484- long s; // 14.18
2485- long t; // 14.18
2486- long w; // 2.30
2487-
2488- long drdx; // X Gradients
2489- long dgdx;
2490- long dbdx;
2491- long dzdx; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:")
2492- long dadx;
2493- long dsdx;
2494- long dtdx;
2495- long dwdx;
2496-
2497- long drdy; // Y Gradients
2498- long dgdy;
2499- long dbdy;
2500- long dzdy; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:")
2501- long dady;
2502- long dsdy;
2503- long dtdy;
2504- long dwdy;
2505+ FxI32 r; // 12.12 Parameters
2506+ FxI32 g; // 12.12
2507+ FxI32 b; // 12.12
2508+ FxI32 z; // 20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:")
2509+ FxI32 a; // 12.12
2510+ FxI32 s; // 14.18
2511+ FxI32 t; // 14.18
2512+ FxI32 w; // 2.30
2513+
2514+ FxI32 drdx; // X Gradients
2515+ FxI32 dgdx;
2516+ FxI32 dbdx;
2517+ FxI32 dzdx; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:")
2518+ FxI32 dadx;
2519+ FxI32 dsdx;
2520+ FxI32 dtdx;
2521+ FxI32 dwdx;
2522+
2523+ FxI32 drdy; // Y Gradients
2524+ FxI32 dgdy;
2525+ FxI32 dbdy;
2526+ FxI32 dzdy; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:")
2527+ FxI32 dady;
2528+ FxI32 dsdy;
2529+ FxI32 dtdy;
2530+ FxI32 dwdy;
2531
2532- unsigned long triangleCMD; // execute a triangle command (float)
2533- unsigned long reservedA;
2534+ FxU32 triangleCMD; // execute a triangle command (float)
2535+ FxU32 reservedA;
2536 vtxRec FvA; // floating point version
2537 vtxRec FvB;
2538 vtxRec FvC;
2539
2540- long Fr; // floating point version
2541- long Fg;
2542- long Fb;
2543- long Fz;
2544- long Fa;
2545- long Fs;
2546- long Ft;
2547- long Fw;
2548-
2549- long Fdrdx;
2550- long Fdgdx;
2551- long Fdbdx;
2552- long Fdzdx;
2553- long Fdadx;
2554- long Fdsdx;
2555- long Fdtdx;
2556- long Fdwdx;
2557-
2558- long Fdrdy;
2559- long Fdgdy;
2560- long Fdbdy;
2561- long Fdzdy;
2562- long Fdady;
2563- long Fdsdy;
2564- long Fdtdy;
2565- long Fdwdy;
2566-
2567- unsigned long FtriangleCMD; // execute a triangle command
2568- unsigned long fbzColorPath; // color select and combine
2569- unsigned long fogMode; // fog Mode
2570- unsigned long alphaMode; // alpha Mode
2571- unsigned long fbzMode; // framebuffer and Z mode
2572- unsigned long lfbMode; // linear framebuffer Mode
2573- unsigned long clipLeftRight; // (6)10(6)10
2574- unsigned long clipBottomTop; // (6)10(6)10
2575-
2576- unsigned long nopCMD; // execute a nop command
2577- unsigned long fastfillCMD; // execute a fast fill command
2578- unsigned long swapbufferCMD;// execute a swapbuffer command
2579- unsigned long fogColor; // (8)888
2580- unsigned long zaColor; // 8.24
2581- unsigned long chromaKey; // (8)888
2582- unsigned long chromaRange;
2583- unsigned long userIntrCmd;
2584-
2585- unsigned long stipple; // 32 bits, MSB masks pixels
2586- unsigned long c0; // 8.8.8.8 (ARGB)
2587- unsigned long c1; // 8.8.8.8 (ARGB)
2588+ FxI32 Fr; // floating point version
2589+ FxI32 Fg;
2590+ FxI32 Fb;
2591+ FxI32 Fz;
2592+ FxI32 Fa;
2593+ FxI32 Fs;
2594+ FxI32 Ft;
2595+ FxI32 Fw;
2596+
2597+ FxI32 Fdrdx;
2598+ FxI32 Fdgdx;
2599+ FxI32 Fdbdx;
2600+ FxI32 Fdzdx;
2601+ FxI32 Fdadx;
2602+ FxI32 Fdsdx;
2603+ FxI32 Fdtdx;
2604+ FxI32 Fdwdx;
2605+
2606+ FxI32 Fdrdy;
2607+ FxI32 Fdgdy;
2608+ FxI32 Fdbdy;
2609+ FxI32 Fdzdy;
2610+ FxI32 Fdady;
2611+ FxI32 Fdsdy;
2612+ FxI32 Fdtdy;
2613+ FxI32 Fdwdy;
2614+
2615+ FxU32 FtriangleCMD; // execute a triangle command
2616+ FxU32 fbzColorPath; // color select and combine
2617+ FxU32 fogMode; // fog Mode
2618+ FxU32 alphaMode; // alpha Mode
2619+ FxU32 fbzMode; // framebuffer and Z mode
2620+ FxU32 lfbMode; // linear framebuffer Mode
2621+ FxU32 clipLeftRight; // (6)10(6)10
2622+ FxU32 clipBottomTop; // (6)10(6)10
2623+
2624+ FxU32 nopCMD; // execute a nop command
2625+ FxU32 fastfillCMD; // execute a fast fill command
2626+ FxU32 swapbufferCMD;// execute a swapbuffer command
2627+ FxU32 fogColor; // (8)888
2628+ FxU32 zaColor; // 8.24
2629+ FxU32 chromaKey; // (8)888
2630+ FxU32 chromaRange;
2631+ FxU32 userIntrCmd;
2632+
2633+ FxU32 stipple; // 32 bits, MSB masks pixels
2634+ FxU32 c0; // 8.8.8.8 (ARGB)
2635+ FxU32 c1; // 8.8.8.8 (ARGB)
2636 struct { // statistic gathering variables
2637- unsigned long fbiPixelsIn;
2638- unsigned long fbiChromaFail;
2639- unsigned long fbiZfuncFail;
2640- unsigned long fbiAfuncFail;
2641- unsigned long fbiPixelsOut;
2642+ FxU32 fbiPixelsIn;
2643+ FxU32 fbiChromaFail;
2644+ FxU32 fbiZfuncFail;
2645+ FxU32 fbiAfuncFail;
2646+ FxU32 fbiPixelsOut;
2647 } stats;
2648
2649- unsigned long fogTable[32]; // 64 entries, 2 per word, 2 bytes each
2650+ FxU32 fogTable[32]; // 64 entries, 2 per word, 2 bytes each
2651
2652- unsigned long renderMode; // new 32bpp and 1555 modes
2653- unsigned long stencilMode;
2654- unsigned long stencilOp;
2655- unsigned long colBufferAddr; //This is the primary colBufferAddr
2656- unsigned long colBufferStride;
2657- unsigned long auxBufferAddr; //This is the primary auxBufferAddr
2658- unsigned long auxBufferStride;
2659- unsigned long fbiStencilFail;
2660-
2661- unsigned long clipLeftRight1;
2662- unsigned long clipBottomTop1;
2663- unsigned long combineMode;
2664- unsigned long sliCtrl;
2665- unsigned long aaCtrl;
2666- unsigned long chipMask;
2667- unsigned long leftDesktopBuf;
2668- unsigned long reservedD[2]; // NOTE: used to store TMUprivate ptr (reservedD[0])
2669+ FxU32 renderMode; // new 32bpp and 1555 modes
2670+ FxU32 stencilMode;
2671+ FxU32 stencilOp;
2672+ FxU32 colBufferAddr; //This is the primary colBufferAddr
2673+ FxU32 colBufferStride;
2674+ FxU32 auxBufferAddr; //This is the primary auxBufferAddr
2675+ FxU32 auxBufferStride;
2676+ FxU32 fbiStencilFail;
2677+
2678+ FxU32 clipLeftRight1;
2679+ FxU32 clipBottomTop1;
2680+ FxU32 combineMode;
2681+ FxU32 sliCtrl;
2682+ FxU32 aaCtrl;
2683+ FxU32 chipMask;
2684+ FxU32 leftDesktopBuf;
2685+ FxU32 reservedD[2]; // NOTE: used to store TMUprivate ptr (reservedD[0])
2686 // NOTE: used to store CSIMprivate ptr (reservedD[1])
2687
2688- unsigned long reservedE[7]; // NOTE: reservedE[0] stores the secondary colBufferAddr
2689+ FxU32 reservedE[7]; // NOTE: reservedE[0] stores the secondary colBufferAddr
2690 // NOTE: reservedE[1] stores the secondary auxBufferAddr
2691 // NOTE: reservedE[2] stores the primary colBufferAddr
2692 // NOTE: reservedE[3] stores the primary auxBufferAddr
2693
2694- unsigned long reservedF[3];
2695- unsigned long swapBufferPend;
2696- unsigned long leftOverlayBuf;
2697- unsigned long rightOverlayBuf;
2698- unsigned long fbiSwapHistory;
2699- unsigned long fbiTrianglesOut; // triangles out counter
2700+ FxU32 reservedF[3];
2701+ FxU32 swapBufferPend;
2702+ FxU32 leftOverlayBuf;
2703+ FxU32 rightOverlayBuf;
2704+ FxU32 fbiSwapHistory;
2705+ FxU32 fbiTrianglesOut; // triangles out counter
2706
2707 FxU32 sSetupMode;
2708 FxU32 sVx;
2709@@ -436,24 +439,24 @@
2710
2711 FxU32 sDrawTriCMD;
2712 FxU32 sBeginTriCMD;
2713- unsigned long reservedG[6];
2714+ FxU32 reservedG[6];
2715
2716- unsigned long reservedH[8];
2717+ FxU32 reservedH[8];
2718
2719- unsigned long reservedI[8];
2720+ FxU32 reservedI[8];
2721
2722- unsigned long textureMode; // texture Mode
2723- unsigned long tLOD; // texture LOD settings
2724- unsigned long tDetail; // texture detail settings
2725- unsigned long texBaseAddr; // current texture base address
2726- unsigned long texBaseAddr1;
2727- unsigned long texBaseAddr2;
2728- unsigned long texBaseAddr38;
2729- unsigned long trexInit0; // hardware init bits
2730- unsigned long trexInit1; // hardware init bits
2731+ FxU32 textureMode; // texture Mode
2732+ FxU32 tLOD; // texture LOD settings
2733+ FxU32 tDetail; // texture detail settings
2734+ FxU32 texBaseAddr; // current texture base address
2735+ FxU32 texBaseAddr1;
2736+ FxU32 texBaseAddr2;
2737+ FxU32 texBaseAddr38;
2738+ FxU32 trexInit0; // hardware init bits
2739+ FxU32 trexInit1; // hardware init bits
2740
2741- unsigned long nccTable0[12]; // NCC decode tables, bits are packed
2742- unsigned long nccTable1[12]; // 4 words Y, 4 words I, 4 words Q
2743+ FxU32 nccTable0[12]; // NCC decode tables, bits are packed
2744+ FxU32 nccTable1[12]; // 4 words Y, 4 words I, 4 words Q
2745
2746 } SstRegs;
2747
2748--- Glide3/h5/minihwc/hwcext.h.ia64-foo Wed Nov 15 18:32:58 2000
2749+++ Glide3/h5/minihwc/hwcext.h Thu Dec 21 14:27:40 2000
2750@@ -255,9 +255,8 @@
2751
2752 /* Returned from HWCEXT_GETLINEARADDR */
2753 typedef struct hwcExtLinearAddrRes_s {
2754- FxU32
2755- numBaseAddrs, /* # base addresses */
2756- baseAddresses[HWCEXT_MAX_BASEADDR]; /* linear Addresses */
2757+ FxU32 numBaseAddrs; /* # base addresses */
2758+ long baseAddresses[HWCEXT_MAX_BASEADDR]; /* linear Addresses */
2759 } hwcExtLinearAddrRes_t;
2760
2761 /*
2762--- Glide3/h5/minihwc/minihwc.c.ia64-foo Thu Nov 16 14:26:03 2000
2763+++ Glide3/h5/minihwc/minihwc.c Thu Dec 21 14:27:40 2000
2764@@ -1660,7 +1660,7 @@
2765 for (bAddr = 0; bAddr < 2; bAddr++) {
2766 if ((bAddrMask & (0x01UL << bAddr)) != 0x00UL) {
2767 bInfo->linearInfo.linearAddress[bAddr] =
2768- (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
2769+ pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
2770 length, &bInfo->deviceNum, bInfo->boardNum, bAddr);
2771 }
2772 }
2773@@ -1669,13 +1669,13 @@
2774 * unconditionally
2775 */
2776 bInfo->linearInfo.linearAddress[2] =
2777- (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
2778+ pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
2779 length, &bInfo->deviceNum, bInfo->boardNum, 2);
2780
2781 /* Does the caller want the rom bios? */
2782 if ((bAddrMask & 0x08UL) != 0x00UL) {
2783 bInfo->linearInfo.linearAddress[3] =
2784- (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
2785+ pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID,
2786 0x1000000, &bInfo->deviceNum, bInfo->boardNum, 3);
2787 }
2788
2789--- Glide3/h5/minihwc/minihwc.h.ia64-foo Wed Nov 15 18:32:58 2000
2790+++ Glide3/h5/minihwc/minihwc.h Thu Dec 21 14:27:40 2000
2791@@ -315,14 +315,14 @@
2792 typedef struct hwcLinearInfo_s {
2793 FxBool
2794 initialized;
2795- FxU32
2796+ long
2797 linearAddress[HWC_NUM_BASE_ADDR];
2798 } hwcLinearInfo;
2799
2800 typedef struct hwcRegInfo_s {
2801 FxBool
2802 initialized;
2803- volatile FxU32
2804+ volatile long
2805 ioMemBase, /* mem base for I/O aliases */
2806 cmdAGPBase, /* CMD/AGP register base */
2807 waxBase, /* 2D register base */
2808--- Glide3/h5/minihwc/linhwc.c.ia64-foo Fri Nov 17 16:31:08 2000
2809+++ Glide3/h5/minihwc/linhwc.c Thu Dec 21 14:27:40 2000
2810@@ -67,7 +67,13 @@
2811 #include "lindri.h"
2812
2813 static FxU32 fenceVar;
2814-#define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
2815+#ifdef __ia64__
2816+# define P6FENCE asm volatile("mf.a" ::: "memory");
2817+#elif defined (__alpha__)
2818+# define P6FENCE asm volatile("mb" ::: "memory");
2819+#else
2820+# define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax");
2821+#endif
2822
2823 #define MAXFIFOSIZE 0x40000
2824 #define FIFOPAD 0x0000
2825@@ -237,8 +243,8 @@
2826 bInfo->linearInfo.initialized = FXTRUE;
2827 bInfo->osNT = FXFALSE;
2828 bInfo->procHandle = getpid();
2829- bInfo->linearInfo.linearAddress[0]=(FxU32)driInfo.pRegs;
2830- bInfo->linearInfo.linearAddress[1]=(FxU32)driInfo.pFB;
2831+ bInfo->linearInfo.linearAddress[0]=(long)driInfo.pRegs;
2832+ bInfo->linearInfo.linearAddress[1]=(long)driInfo.pFB;
2833 return FXTRUE;
2834 }
2835
2836@@ -897,6 +903,10 @@
2837 #undef FN_NAME
2838 } /* hwcResolutionSupported */
2839
2840+extern void _grImportFifo (int, int);
2841+extern void _grInvalidateAll (void);
2842+extern void _grExportFifo (int *, int *);
2843+
2844 /* This two routines hwcSLIRead{Enable,Disable} are currently NOPs XXX */
2845
2846 void hwcSLIReadEnable(hwcBoardInfo *bInfo)
2847@@ -985,6 +995,6 @@
2848
2849 void grDRIResetSAREA()
2850 {
2851- _grExportFifo(driInfo.fifoPtr, driInfo.fifoRead);
2852+ _grExportFifo((int *)driInfo.fifoPtr, driInfo.fifoRead);
2853 }
2854
2855--- Glide3/swlibs/fxmisc/fximg.c.ia64-foo Tue Oct 3 14:31:53 2000
2856+++ Glide3/swlibs/fxmisc/fximg.c Thu Dec 21 14:27:40 2000
2857@@ -1948,7 +1948,7 @@
2858 if (prefix) { // if there's a path prefix
2859 char buf[1024], *p;
2860 strcpy(buf,prefix); // copy and replace semicolon
2861- if ((p = strchr(buf,';'))) *p = '\0';
2862+ if ((p = strchr(buf,';')) != NULL) *p = '\0';
2863 fprintf(stderr,buf);
2864 fprintf(stderr,"/");
2865 }
2866--- Glide3/swlibs/fxmisc/fxos.c.ia64-foo Tue Oct 3 14:31:53 2000
2867+++ Glide3/swlibs/fxmisc/fxos.c Thu Dec 21 14:27:40 2000
2868@@ -98,7 +98,7 @@
2869
2870 // first try and open up the file in the current directory
2871 if (pprefix) *pprefix = NULL;
2872- if ((file = fopen(filename,mode)))
2873+ if ((file = fopen(filename,mode)) != NULL)
2874 return file;
2875 if (path == NULL)
2876 return NULL;
2877@@ -115,7 +115,7 @@
2878 strcat(nameWithPath,"/"); // add directory separator
2879 strcat(nameWithPath,filename); // add filename
2880 if (pprefix) *pprefix = path; // save the prefix
2881- if ((file = fopen(nameWithPath,mode)))
2882+ if ((file = fopen(nameWithPath,mode)) != NULL)
2883 return file;
2884 path = psemi; // advance to next path element
2885 if (path)
2886--- Glide3/swlibs/include/make/3dfx.mak.ia64-foo Tue Oct 3 14:25:35 2000
2887+++ Glide3/swlibs/include/make/3dfx.mak Thu Dec 21 14:27:40 2000
2888@@ -120,7 +120,7 @@
2889 # assembly language in grDrawTriangle. Larger optimization removes
2890 # an extra push in the calling sequence.
2891 #
2892-CNODEBUG = -O6 -m486 -fomit-frame-pointer -funroll-loops \
2893+CNODEBUG = -O3 -fomit-frame-pointer -funroll-loops \
2894 -fexpensive-optimizations -ffast-math -DBIG_OPT
2895
2896 CDEBUG = -g -O
2897--- Glide3/swlibs/include/make/3dfx.linux.mak.ia64-foo Wed Jul 12 17:35:28 2000
2898+++ Glide3/swlibs/include/make/3dfx.linux.mak Thu Dec 21 14:27:40 2000
2899@@ -87,7 +87,7 @@
2900 # assembly language in grDrawTriangle. Larger optimization removes
2901 # an extra push in the calling sequence.
2902 #
2903-CNODEBUG = -O6 -m486 -fomit-frame-pointer -funroll-loops \
2904+CNODEBUG = -O3 -fomit-frame-pointer -funroll-loops \
2905 -fexpensive-optimizations -ffast-math -DBIG_OPT
2906
2907 CDEBUG = -g -O
2908--- Glide3/swlibs/include/make/makefile.autoconf.bottom.ia64-foo Mon Aug 7 11:24:44 2000
2909+++ Glide3/swlibs/include/make/makefile.autoconf.bottom Thu Dec 21 14:27:40 2000
2910@@ -51,7 +51,7 @@
2911 GLIDE_DEBUG_GCFLAGS = -g -O
2912 GLIDE_DEBUG_GDEFS = -DGDBG_INFO_ON -DGLIDE_DEBUG
2913 else
2914-GLIDE_DEBUG_GCFLAGS = -O6 -m486
2915+GLIDE_DEBUG_GCFLAGS = -O3
2916 GLIDE_DEBUG_GDEFS = -fomit-frame-pointer -funroll-loops \
2917 -fexpensive-optimizations -ffast-math -DBIG_OPT
2918 endif
2919--- Glide3/swlibs/newpci/pcilib/fxlinux.c.ia64-foo Wed Jun 14 20:11:40 2000
2920+++ Glide3/swlibs/newpci/pcilib/fxlinux.c Thu Dec 21 14:27:40 2000
2921@@ -35,10 +35,10 @@
2922 static FxBool pciOutputStringLinux(const char *msg);
2923 static FxBool pciInitializeLinux(void);
2924 static FxBool pciShutdownLinux(void);
2925-static FxBool pciMapLinearLinux(FxU32, FxU32 physical_addr, FxU32 *linear_addr,
2926+static FxBool pciMapLinearLinux(FxU32, FxU32 physical_addr, long *linear_addr,
2927 FxU32 *length);
2928-static FxBool pciUnmapLinearLinux(FxU32 linear_addr, FxU32 length);
2929-static FxBool pciSetPermissionLinux(const FxU32, const FxU32, const FxBool);
2930+static FxBool pciUnmapLinearLinux(long linear_addr, FxU32 length);
2931+static FxBool pciSetPermissionLinux(const long, const FxU32, const FxBool);
2932 static FxU8 pciPortInByteLinux(unsigned short port);
2933 static FxU16 pciPortInWordLinux(unsigned short port);
2934 static FxU32 pciPortInLongLinux(unsigned short port);
2935@@ -204,7 +204,7 @@
2936
2937 static FxBool
2938 pciMapLinearLinux(FxU32 bus, FxU32 physical_addr,
2939- FxU32 *linear_addr, FxU32 *length)
2940+ long *linear_addr, FxU32 *length)
2941 {
2942 int fd;
2943 if (linuxDevFd!=-1) {
2944@@ -215,7 +215,7 @@
2945 return FXFALSE;
2946 }
2947 }
2948- if (((*linear_addr)=(FxU32)mmap(0, *length, PROT_READ|PROT_WRITE,
2949+ if (((*linear_addr)=(long)mmap(0, *length, PROT_READ|PROT_WRITE,
2950 MAP_SHARED, fd, physical_addr))<0) {
2951 if (fd!=linuxDevFd) close(fd);
2952 return FXFALSE;
2953@@ -225,14 +225,14 @@
2954 }
2955
2956 static FxBool
2957-pciUnmapLinearLinux(FxU32 linear_addr, FxU32 length)
2958+pciUnmapLinearLinux(long linear_addr, FxU32 length)
2959 {
2960- munmap((void*)linear_addr, length);
2961+ munmap((void *) linear_addr, length);
2962 return FXTRUE;
2963 }
2964
2965 static FxBool
2966-pciSetPermissionLinux(const FxU32 addrBase, const FxU32 addrLen,
2967+pciSetPermissionLinux(const long addrBase, const FxU32 addrLen,
2968 const FxBool writePermP)
2969 {
2970 return FXTRUE;
2971--- Glide3/swlibs/newpci/pcilib/fxpci.c.ia64-foo Mon Nov 27 04:49:33 2000
2972+++ Glide3/swlibs/newpci/pcilib/fxpci.c Thu Dec 21 14:27:40 2000
2973@@ -708,9 +708,8 @@
2974 FxU32 *devNum,
2975 FxU32 cardNum, FxU32 addressNum)
2976 {
2977- FxU32
2978- physAddress,
2979- virtAddress;
2980+ FxU32 physAddress;
2981+ long virtAddress;
2982
2983 /* 1) open the PCI device and scan it for devices
2984 * 2) scan the existing devices for a match
2985@@ -720,7 +719,7 @@
2986
2987 /* 3) find the current physcial address of the card */
2988 pciGetConfigData( baseAddresses[addressNum], *devNum, &physAddress );
2989- if (length <= 0) return (FxU32*)length;
2990+ if (length <= 0) return (FxU32*)(long)length;
2991
2992 /* Mask the memory type information bits off.
2993 * [0]: Memory type indicator (0 memory/1 i/o)
2994@@ -769,7 +768,7 @@
2995 } /* pciMapCard */
2996
2997 FX_EXPORT FxBool FX_CSTYLE
2998-pciMapPhysicalToLinear( FxU32 *linear_addr, FxU32 physical_addr,
2999+pciMapPhysicalToLinear( long *linear_addr, FxU32 physical_addr,
3000 FxU32 *length )
3001 {
3002 return pciMapPhysicalDeviceToLinear(linear_addr,
3003@@ -778,7 +777,7 @@
3004 } /* pciMapPhysicalToLinear */
3005
3006 FX_ENTRY FxBool FX_CALL
3007-pciMapPhysicalDeviceToLinear(FxU32 *linear_addr,
3008+pciMapPhysicalDeviceToLinear(long *linear_addr,
3009 FxU32 busNumber, FxU32 physical_addr,
3010 FxU32 *length)
3011 {
3012@@ -788,7 +787,7 @@
3013
3014
3015 FX_EXPORT void FX_CSTYLE
3016-pciUnmapPhysical( FxU32 linear_addr, FxU32 length )
3017+pciUnmapPhysical( long linear_addr, FxU32 length )
3018 {
3019 int i,j;
3020
3021@@ -828,7 +827,7 @@
3022 }
3023
3024 FX_EXPORT FxBool FX_CSTYLE
3025-pciLinearRangeSetPermission(const FxU32 addrBase, const FxU32 addrLen, const FxBool writeableP)
3026+pciLinearRangeSetPermission(const long addrBase, const FxU32 addrLen, const FxBool writeableP)
3027 {
3028 return pciLinearRangeSetPermissionDD(addrBase, addrLen, writeableP);
3029 }
3030--- Glide3/swlibs/newpci/pcilib/fxpci.h.ia64-foo Wed Jun 14 20:11:40 2000
3031+++ Glide3/swlibs/newpci/pcilib/fxpci.h Thu Dec 21 14:27:40 2000
3032@@ -180,15 +180,15 @@
3033 * on bus0 which would not work across pci bridges or on agp devices.
3034 */
3035 FX_ENTRY FxBool FX_CALL
3036-pciMapPhysicalToLinear(FxU32 *linear_addr, FxU32 physical_addr,FxU32 *length);
3037+pciMapPhysicalToLinear(long *linear_addr, FxU32 physical_addr,FxU32 *length);
3038
3039 FX_ENTRY FxBool FX_CALL
3040-pciMapPhysicalDeviceToLinear(FxU32 *linear_addr,
3041+pciMapPhysicalDeviceToLinear(long *linear_addr,
3042 FxU32 busNumber, FxU32 physical_addr,
3043 FxU32 *length);
3044
3045 FX_ENTRY void FX_CALL
3046-pciUnmapPhysical( FxU32 linear_addr, FxU32 length );
3047+pciUnmapPhysical( long linear_addr, FxU32 length );
3048
3049 const char *
3050 pciGetVendorName( FxU16 vendor_id );
3051@@ -235,7 +235,7 @@
3052 pciOutputDebugString(const char* debugMsg);
3053
3054 FX_ENTRY FxBool FX_CALL
3055-pciLinearRangeSetPermission(const FxU32 addrBase, const FxU32 addrLen, const FxBool writeableP);
3056+pciLinearRangeSetPermission(const long addrBase, const FxU32 addrLen, const FxBool writeableP);
3057
3058 #define PCI_ERR_NOERR 0
3059 #define PCI_ERR_WINRTINIT 1
3060--- Glide3/swlibs/newpci/pcilib/pcilib.h.ia64-foo Wed Jun 14 20:11:40 2000
3061+++ Glide3/swlibs/newpci/pcilib/pcilib.h Thu Dec 21 14:27:40 2000
3062@@ -74,13 +74,13 @@
3063
3064 /* Platform device address management */
3065 FxBool (*addrMap)(FxU32 busNumber, FxU32 physAddr,
3066- FxU32* linearAddr, FxU32* length);
3067- FxBool (*addrUnmap)(FxU32 linearAddr, FxU32 length);
3068+ long* linearAddr, FxU32* length);
3069+ FxBool (*addrUnmap)(long linearAddr, FxU32 length);
3070
3071 /* Optional things that a platform may or maynot support and clients
3072 * should not rely on the call to suceed.
3073 */
3074- FxBool (*addrSetPermission)(const FxU32 addrBase, const FxU32 addrLen,
3075+ FxBool (*addrSetPermission)(const long addrBase, const FxU32 addrLen,
3076 const FxBool writePermP);
3077
3078 FxBool (*msrGet)(MSRInfo* in, MSRInfo* out);
3079--- Glide3/swlibs/texus/lib/dequant.c.ia64-foo Wed Jun 14 20:11:40 2000
3080+++ Glide3/swlibs/texus/lib/dequant.c Thu Dec 21 14:27:40 2000
3081@@ -160,12 +160,12 @@
3082 }
3083
3084 static void
3085-_txImgDequantizeYIQ422(FxU32 *out, FxU8 *in, int w, int h, const long *yabTable)
3086+_txImgDequantizeYIQ422(FxU32 *out, FxU8 *in, int w, int h, const FxU32 *yabTable)
3087 {
3088 int n = w * h;
3089 FxU32 pal[256];
3090
3091- txYABtoPal256((long *)pal, (long *)yabTable);
3092+ txYABtoPal256(pal, yabTable);
3093 out += n;
3094 in += n;
3095 while (n--) *--out = pal[*--in] | 0xff000000;
3096@@ -223,10 +223,10 @@
3097 }
3098
3099 static void
3100-_txImgDequantizeAYIQ8422(FxU32 *out, FxU16 *in, int w, int h, const long *yab)
3101+_txImgDequantizeAYIQ8422(FxU32 *out, FxU16 *in, int w, int h, const FxU32 *yab)
3102 {
3103 int n = w * h;
3104- long pal[256];
3105+ FxU32 pal[256];
3106
3107 txYABtoPal256(pal, yab);
3108 out += n;
3109@@ -348,7 +348,7 @@
3110 case GR_TEXFMT_RGB_332: _txImgDequantizeRGB332(dst, src, w, h);
3111 break;
3112 case GR_TEXFMT_YIQ_422: _txImgDequantizeYIQ422(dst, src, w, h,
3113- (long *)pxMip->pal); break;
3114+ pxMip->pal); break;
3115 case GR_TEXFMT_A_8: _txImgDequantizeA8(dst, src, w, h);
3116 break;
3117 case GR_TEXFMT_I_8: _txImgDequantizeI8(dst, src, w, h);
3118@@ -361,7 +361,7 @@
3119 case GR_TEXFMT_ARGB_8332: _txImgDequantizeARGB8332(dst, src, w, h);
3120 break;
3121 case GR_TEXFMT_AYIQ_8422: _txImgDequantizeAYIQ8422(dst, src, w, h,
3122- (long *)pxMip->pal); break;
3123+ pxMip->pal); break;
3124 case GR_TEXFMT_RGB_565: _txImgDequantizeRGB565(dst, src, w, h);
3125 break;
3126 case GR_TEXFMT_ARGB_1555: _txImgDequantizeARGB1555(dst, src, w, h);
3127--- Glide3/swlibs/texus/lib/mipmap.c.ia64-foo Wed Jun 14 20:11:40 2000
3128+++ Glide3/swlibs/texus/lib/mipmap.c Thu Dec 21 14:27:40 2000
3129@@ -35,7 +35,7 @@
3130 #define B3(x) ((x>>0)&0xFF)
3131
3132 static void
3133-_txImgHalve(long *outdata, int width, int height, long *indata)
3134+_txImgHalve(int *outdata, int width, int height, int *indata)
3135 {
3136 unsigned int i,j,k;
3137 unsigned int w,h, *p,sum,*q;
3138--- Glide3/swlibs/texus/lib/ncc.c.ia64-foo Tue Oct 3 14:31:53 2000
3139+++ Glide3/swlibs/texus/lib/ncc.c Thu Dec 21 14:27:40 2000
3140@@ -124,7 +124,7 @@
3141 }
3142
3143 static void
3144-_txImgNcc(char *odata, unsigned long *idata, int w, int h, int format,
3145+_txImgNcc(char *odata, unsigned int *idata, int w, int h, int format,
3146 int dither)
3147 {
3148 int (*quantizer)(unsigned long argb, int x, int y, int w);
3149@@ -308,7 +308,7 @@
3150
3151
3152 if ((dither & TX_DITHER_MASK) == TX_DITHER_ERR) {
3153- txYABtoPal256((long *)pxMip->pal, (long *) &ncc.y[0]);
3154+ txYABtoPal256(pxMip->pal, &ncc.y[0]);
3155 txDiffuseIndex(pxMip, txMip, pixsize, pxMip->pal, 256);
3156 }
3157 else {
3158--- Glide3/swlibs/texus/lib/nccnnet.c.ia64-foo Tue Oct 3 14:31:53 2000
3159+++ Glide3/swlibs/texus/lib/nccnnet.c Thu Dec 21 14:27:40 2000
3160@@ -88,19 +88,19 @@
3161 #define MAX_NEURONS 256
3162
3163 typedef struct _weight {
3164- long r, g, b; // fixed point, SUBPIXEL precision bits
3165+ int r, g, b; // fixed point, SUBPIXEL precision bits
3166 int ir, ig, ib; // pure integers, maybe -256 to 255.
3167 } Weight;
3168
3169 typedef struct _vector {
3170 Weight *py, *pa, *pb;
3171- long r, g, b; // pure integers, 0 to 255.
3172+ int r, g, b; // pure integers, 0 to 255.
3173 } Neuron;
3174
3175 static Weight Y[16], A[4], B[4];
3176 static Neuron N[MAX_NEURONS];
3177-static long errR, errG, errB, errMax;
3178-static long totR, totG, totB;
3179+static int errR, errG, errB, errMax;
3180+static int totR, totG, totB;
3181
3182
3183 #define SUBPIXEL 22
3184@@ -114,12 +114,12 @@
3185 x = ((256 << SUBPIXEL) -1)
3186
3187 static int
3188-_nn_modifyNeurons(long ir, long ig, long ib)
3189+_nn_modifyNeurons(int ir, int ig, int ib)
3190 {
3191 int i;
3192 int d0, d1; // closest & next closest distance to input
3193 int p0, p1; // index into the 256 color table.
3194- long d, dr, dg, db;
3195+ int d, dr, dg, db;
3196 Weight *py, *pa, *pb;
3197 Neuron *n;
3198
3199@@ -268,10 +268,10 @@
3200 txMapPal256toYAB(FxU32 *YAB, FxU8 *map, int nsamples, FxU32 *samples)
3201 {
3202 int i;
3203- long bstR, bstG, bstB, bstMax;
3204+ int bstR, bstG, bstB, bstMax;
3205 int iterations; // track how many inputs have been fed to NN
3206 int drySpells; // how many inputs since last best case.
3207- long yab2pal[256];
3208+ int yab2pal[256];
3209
3210 _nn_initTables();
3211 /*
3212@@ -367,7 +367,7 @@
3213 * Replace MSB of samples with index to be used with YAB table.
3214 */
3215
3216- txYABtoPal256((long*)yab2pal, (long*)YAB);
3217+ txYABtoPal256(yab2pal, YAB);
3218
3219 for (i=0; i<nsamples; i++) {
3220 int ir, ig, ib;
3221@@ -388,7 +388,7 @@
3222 int i, w, h;
3223 int ncolors;
3224 int pixsize = (pxMip->format == GR_TEXFMT_YIQ_422) ? 1 : 2;
3225- long yabTable[16+12+12];
3226+ int yabTable[16+12+12];
3227 FxU8 map[256];
3228
3229
3230@@ -425,7 +425,7 @@
3231 * the 256 color palette generated from the YAB table. This will be
3232 * useful for error diffusion dithering.
3233 */
3234- txYABtoPal256((long *)pxMip->pal, (long *)yabTable);
3235+ txYABtoPal256(pxMip->pal, yabTable);
3236 txDiffuseIndex(pxMip, txMip, pixsize, pxMip->pal, 256);
3237 }
3238 else {
3239--- Glide3/swlibs/texus/lib/pal256.c.ia64-foo Tue Oct 3 14:31:53 2000
3240+++ Glide3/swlibs/texus/lib/pal256.c Thu Dec 21 14:27:40 2000
3241@@ -83,20 +83,20 @@
3242
3243 typedef struct {
3244 float weightedvar; /* weighted variance */
3245- ulong mean[3]; /* centroid */
3246- ulong weight; /* # of pixels in box */
3247- ulong freq[3][MAXCOLORS]; /* Projected frequencies */
3248+ uint mean[3]; /* centroid */
3249+ uint weight; /* # of pixels in box */
3250+ uint freq[3][MAXCOLORS]; /* Projected frequencies */
3251 int low[3], high[3]; /* Box extent */
3252 } Box;
3253
3254 #define COLORMAXI ( 1 << NBITS )
3255 #if 0
3256-static ulong *Histogram; /* image histogram */
3257+static uint *Histogram; /* image histogram */
3258 #else
3259-static ulong Histogram[COLORMAXI*COLORMAXI*COLORMAXI * sizeof(long)];
3260+static uint Histogram[COLORMAXI*COLORMAXI*COLORMAXI * sizeof(long)];
3261 #endif
3262-static ulong SumPixels; /* total # of pixels */
3263-static ulong ColormaxI; /* # of colors, 2^Bits */
3264+static uint SumPixels; /* total # of pixels */
3265+static uint ColormaxI; /* # of colors, 2^Bits */
3266 static Box _Boxes[MAXCOLORS];
3267 static Box *Boxes; /* Array of color boxes. */
3268
3269@@ -108,7 +108,7 @@
3270 static void BoxStats(Box *box);
3271 static int GreatestVariance(Box *boxes, int n);
3272 static int CutBoxes(Box *boxes, int colors);
3273-static void QuantHistogram(ulong *pixels, int npixels, Box *box);
3274+static void QuantHistogram(uint *pixels, int npixels, Box *box);
3275
3276 /*
3277 * Perform variance-based color quantization on a 24-bit image.
3278@@ -135,16 +135,16 @@
3279
3280 Boxes = _Boxes;
3281 #if 0
3282- Histogram = (ulong *) txMalloc(ColormaxI*ColormaxI*ColormaxI * sizeof(long));
3283+ Histogram = (uint *) txMalloc(ColormaxI*ColormaxI*ColormaxI * sizeof(long));
3284 rgbmap = txMalloc((1<<NBITS)*(1<<NBITS)*(1<<NBITS));
3285 #endif
3286
3287 /*
3288 * Zero-out the projected frequency arrays of the largest box.
3289 */
3290- bzero(Boxes->freq[0], ColormaxI * sizeof(ulong));
3291- bzero(Boxes->freq[1], ColormaxI * sizeof(ulong));
3292- bzero(Boxes->freq[2], ColormaxI * sizeof(ulong));
3293+ bzero(Boxes->freq[0], ColormaxI * sizeof(uint));
3294+ bzero(Boxes->freq[1], ColormaxI * sizeof(uint));
3295+ bzero(Boxes->freq[2], ColormaxI * sizeof(uint));
3296 bzero(Histogram, ColormaxI * ColormaxI * ColormaxI * sizeof(long));
3297
3298 /* Feed all bitmaps & generate histogram */
3299@@ -153,7 +153,7 @@
3300 h = txMip->height;
3301 for (i=0; i< txMip->depth; i++) {
3302 SumPixels += w * h;
3303- QuantHistogram((ulong *)txMip->data[i], w * h, &Boxes[0]);
3304+ QuantHistogram((uint *)txMip->data[i], w * h, &Boxes[0]);
3305 if (w > 1) w >>= 1;
3306 if (h > 1) h >>= 1;
3307 }
3308@@ -166,10 +166,10 @@
3309 * from their 'prequantized' range to 0-FULLINTENSITY.
3310 */
3311 for (i = 0; i < OutColors; i++) {
3312- ulong r, g, b;
3313- r = (ulong)(Boxes[i].mean[REDI] * Cfactor + 0.5);
3314- g = (ulong)(Boxes[i].mean[GREENI] * Cfactor + 0.5);
3315- b = (ulong)(Boxes[i].mean[BLUEI] * Cfactor + 0.5);
3316+ uint r, g, b;
3317+ r = (uint)(Boxes[i].mean[REDI] * Cfactor + 0.5);
3318+ g = (uint)(Boxes[i].mean[GREENI] * Cfactor + 0.5);
3319+ b = (uint)(Boxes[i].mean[BLUEI] * Cfactor + 0.5);
3320
3321 /*
3322 r &= 0xff;
3323@@ -198,11 +198,11 @@
3324 h = txMip->height;
3325
3326 for (i=0; i< txMip->depth; i++) {
3327- ulong *src;
3328+ uint *src;
3329 uchar *dst;
3330 int n;
3331
3332- src = (ulong *) txMip->data[i];
3333+ src = (uint *) txMip->data[i];
3334 dst = (uchar *) pxMip->data[i];
3335 n = w * h;
3336 while (n--) {
3337@@ -242,9 +242,9 @@
3338 * arrays for the first world-encompassing box.
3339 */
3340 static void
3341-QuantHistogram(ulong *pixels, int npixels, Box *box)
3342+QuantHistogram(uint *pixels, int npixels, Box *box)
3343 {
3344- ulong *rf, *gf, *bf;
3345+ uint *rf, *gf, *bf;
3346 uchar rr, gg, bb;
3347 int i;
3348
3349@@ -322,7 +322,7 @@
3350 BoxStats(Box *box)
3351 {
3352 int i, color;
3353- ulong *freq;
3354+ uint *freq;
3355 float mean, var;
3356
3357 if(box->weight == 0) {
3358@@ -407,7 +407,7 @@
3359 {
3360 float u, v, max;
3361 int i, maxindex, minindex, cutpoint;
3362- ulong optweight, curweight;
3363+ uint optweight, curweight;
3364
3365 if (box->low[color] + 1 == box->high[color])
3366 return FALSE; /* Cannot be cut. */
3367@@ -457,13 +457,13 @@
3368 static void
3369 UpdateFrequencies(Box *box1, Box *box2)
3370 {
3371- ulong myfreq, *h;
3372+ uint myfreq, *h;
3373 int b, g, r;
3374 int roff;
3375
3376- bzero(box1->freq[0], ColormaxI * sizeof(ulong));
3377- bzero(box1->freq[1], ColormaxI * sizeof(ulong));
3378- bzero(box1->freq[2], ColormaxI * sizeof(ulong));
3379+ bzero(box1->freq[0], ColormaxI * sizeof(uint));
3380+ bzero(box1->freq[1], ColormaxI * sizeof(uint));
3381+ bzero(box1->freq[2], ColormaxI * sizeof(uint));
3382
3383 for (r = box1->low[0]; r < box1->high[0]; r++) {
3384 roff = r << NBITS;
3385--- Glide3/swlibs/texus/lib/quantize.c.ia64-foo Tue Oct 3 14:31:53 2000
3386+++ Glide3/swlibs/texus/lib/quantize.c Thu Dec 21 14:27:40 2000
3387@@ -39,7 +39,7 @@
3388 static int errR[MAX_TEXWIDTH], errG[MAX_TEXWIDTH], errB[MAX_TEXWIDTH];
3389
3390 static int
3391-_txPixQuantize_RGB332( unsigned long argb, int x, int y, int w)
3392+_txPixQuantize_RGB332( unsigned int argb, int x, int y, int w)
3393 {
3394 return (
3395 (((argb>>16) & 0xE0) |
3396@@ -48,7 +48,7 @@
3397 }
3398
3399 static int
3400-_txPixQuantize_RGB332_D4x4( unsigned long argb, int x, int y, int w)
3401+_txPixQuantize_RGB332_D4x4( unsigned int argb, int x, int y, int w)
3402 {
3403 int d = dithmat[y&3][x&3];
3404 int n, t;
3405@@ -63,7 +63,7 @@
3406 }
3407
3408 static int
3409-_txPixQuantize_RGB332_DErr( unsigned long argb, int x, int y, int w)
3410+_txPixQuantize_RGB332_DErr( unsigned int argb, int x, int y, int w)
3411 {
3412 static unsigned char a3[] = {0x00,0x24,0x49,0x6d,0x92,0xb6,0xdb,0xff};
3413 static unsigned char a2[] = {0x00,0x55,0xaa,0xff};
3414@@ -120,13 +120,13 @@
3415 /* YIQ422 done elsewhere */
3416
3417 static int
3418-_txPixQuantize_A8( unsigned long argb, int x, int y, int w)
3419+_txPixQuantize_A8( unsigned int argb, int x, int y, int w)
3420 {
3421 return (argb >> 24);
3422 }
3423
3424 static int
3425-_txPixQuantize_I8( unsigned long argb, int x, int y, int w)
3426+_txPixQuantize_I8( unsigned int argb, int x, int y, int w)
3427 {
3428 return (
3429 ((int) (((argb >>16) & 0xFF) * .30F +
3430@@ -135,7 +135,7 @@
3431 }
3432
3433 static int
3434-_txPixQuantize_AI44( unsigned long argb, int x, int y, int w)
3435+_txPixQuantize_AI44( unsigned int argb, int x, int y, int w)
3436 {
3437 return(
3438 (int) (( ((argb>>16) & 0xFF) * .30F +
3439@@ -145,7 +145,7 @@
3440 }
3441
3442 static int
3443-_txPixQuantize_AI44_D4x4( unsigned long argb, int x, int y, int w)
3444+_txPixQuantize_AI44_D4x4( unsigned int argb, int x, int y, int w)
3445 {
3446 int d = dithmat[y&3][x&3];
3447 int n, t;
3448@@ -163,7 +163,7 @@
3449 }
3450
3451 static int
3452-_txPixQuantize_AI44_DErr( unsigned long argb, int x, int y, int w)
3453+_txPixQuantize_AI44_DErr( unsigned int argb, int x, int y, int w)
3454 {
3455 int ii, t;
3456 static int qi;
3457@@ -198,7 +198,7 @@
3458
3459
3460 static int
3461-_txPixQuantize_ARGB8332 ( unsigned long argb, int x, int y, int w)
3462+_txPixQuantize_ARGB8332 ( unsigned int argb, int x, int y, int w)
3463 {
3464 return (
3465 ((argb>>16) & 0xE0) |
3466@@ -209,7 +209,7 @@
3467
3468
3469 static int
3470-_txPixQuantize_ARGB8332_D4x4( unsigned long argb, int x, int y, int w)
3471+_txPixQuantize_ARGB8332_D4x4( unsigned int argb, int x, int y, int w)
3472 {
3473 int d = dithmat[y&3][x&3];
3474 int n, t;
3475@@ -225,7 +225,7 @@
3476 }
3477
3478 static int
3479-_txPixQuantize_ARGB8332_DErr( unsigned long argb, int x, int y, int w)
3480+_txPixQuantize_ARGB8332_DErr( unsigned int argb, int x, int y, int w)
3481 {
3482 int t;
3483
3484@@ -237,7 +237,7 @@
3485 /* AYIQ8422 done elsewhere */
3486
3487 static int
3488-_txPixQuantize_RGB565( unsigned long argb, int x, int y, int w)
3489+_txPixQuantize_RGB565( unsigned int argb, int x, int y, int w)
3490 {
3491 return (
3492 ((argb >> 8) & 0xF800) |
3493@@ -246,7 +246,7 @@
3494 }
3495
3496 static int
3497-_txPixQuantize_RGB565_D4x4 ( unsigned long argb, int x, int y, int w)
3498+_txPixQuantize_RGB565_D4x4 ( unsigned int argb, int x, int y, int w)
3499 {
3500 int d = dithmat[y&3][x&3];
3501 int n, t;
3502@@ -262,7 +262,7 @@
3503
3504
3505 static int
3506-_txPixQuantize_RGB565_DErr ( unsigned long argb, int x, int y, int w)
3507+_txPixQuantize_RGB565_DErr ( unsigned int argb, int x, int y, int w)
3508 {
3509 static int qr, qg, qb; // quantized incoming values.
3510 int ir, ig, ib; // incoming values.
3511@@ -318,7 +318,7 @@
3512 }
3513
3514 static int
3515-_txPixQuantize_ARGB1555( unsigned long argb, int x, int y, int w)
3516+_txPixQuantize_ARGB1555( unsigned int argb, int x, int y, int w)
3517 {
3518 return (
3519 ((argb >> 9) & 0x7C00) |
3520@@ -328,7 +328,7 @@
3521 }
3522
3523 static int
3524-_txPixQuantize_ARGB1555_D4x4 ( unsigned long argb, int x, int y, int w)
3525+_txPixQuantize_ARGB1555_D4x4 ( unsigned int argb, int x, int y, int w)
3526 {
3527 int d = dithmat[y&3][x&3];
3528 int n, t;
3529@@ -344,7 +344,7 @@
3530 }
3531
3532 static int
3533-_txPixQuantize_ARGB1555_DErr ( unsigned long argb, int x, int y, int w)
3534+_txPixQuantize_ARGB1555_DErr ( unsigned int argb, int x, int y, int w)
3535 {
3536 static int qr, qg, qb; // quantized incoming values.
3537 int ir, ig, ib; // incoming values.
3538@@ -401,7 +401,7 @@
3539 }
3540
3541 static int
3542-_txPixQuantize_ARGB4444 (unsigned long argb, int x, int y, int w)
3543+_txPixQuantize_ARGB4444 (unsigned int argb, int x, int y, int w)
3544 {
3545 return (
3546 ((argb >> 12) & 0x0F00) |
3547@@ -411,7 +411,7 @@
3548 }
3549
3550 static int
3551-_txPixQuantize_ARGB4444_D4x4 (unsigned long argb, int x, int y, int w)
3552+_txPixQuantize_ARGB4444_D4x4 (unsigned int argb, int x, int y, int w)
3553 {
3554 int d = dithmat[y&3][x&3];
3555 int n, t;
3556@@ -427,7 +427,7 @@
3557 }
3558
3559 static int
3560-_txPixQuantize_ARGB4444_DErr (unsigned long argb, int x, int y, int w)
3561+_txPixQuantize_ARGB4444_DErr (unsigned int argb, int x, int y, int w)
3562 {
3563 static int qr, qg, qb; // quantized incoming values.
3564 int ir, ig, ib; // incoming values.
3565@@ -484,7 +484,7 @@
3566 }
3567
3568 static int
3569-_txPixQuantize_AI88( unsigned long argb, int x, int y, int w)
3570+_txPixQuantize_AI88( unsigned int argb, int x, int y, int w)
3571 {
3572 return (
3573 (((int) (((argb >>16) & 0xFF) * .30F +
3574@@ -498,7 +498,7 @@
3575 static void
3576 _txImgQuantize(char *dst, char *src, int w, int h, FxU32 format, FxU32 dither)
3577 {
3578- int (*quantizer)(unsigned long argb, int x, int y, int w) = NULL;
3579+ int (*quantizer)(unsigned int argb, int x, int y, int w) = NULL;
3580 int x, y;
3581
3582 dither &= TX_DITHER_MASK;
3583@@ -589,7 +589,7 @@
3584 // 8 bit dst
3585 for (y=0; y<h; y++) {
3586 for (x=0; x<w; x++) {
3587- *dst++ = (*quantizer)(*(unsigned long *)src, x, y, w);
3588+ *dst++ = (*quantizer)(*(unsigned int *)src, x, y, w);
3589 src += 4;
3590 }
3591 }
3592@@ -599,7 +599,7 @@
3593
3594 for (y=0; y<h; y++) {
3595 for (x=0; x<w; x++) {
3596- *dst16++ = (*quantizer)(*(unsigned long *)src, x, y, w);
3597+ *dst16++ = (*quantizer)(*(unsigned int *)src, x, y, w);
3598 src += 4;
3599 }
3600 }
3601--- Glide3/swlibs/texus/lib/rgt.c.ia64-foo Wed Jun 14 20:11:40 2000
3602+++ Glide3/swlibs/texus/lib/rgt.c Thu Dec 21 14:27:40 2000
3603@@ -52,7 +52,7 @@
3604
3605
3606
3607-static void swapShorts(unsigned short *array, long length)
3608+static void swapShorts(unsigned short *array, int length)
3609 {
3610 unsigned short s;
3611 while (length--) {
3612@@ -61,7 +61,7 @@
3613 }
3614 }
3615
3616-static void swapLongs(unsigned int *array, long length)
3617+static void swapLongs(unsigned int *array, int length)
3618 {
3619 unsigned int s;
3620 while (length--) {
3621@@ -72,7 +72,7 @@
3622 }
3623
3624 // just swap RGB into BGR (leave MSB undefined)
3625-static void swapRGB(unsigned int *array, long length)
3626+static void swapRGB(unsigned int *array, int length)
3627 {
3628 unsigned int s;
3629 while (length--) {
3630@@ -164,7 +164,7 @@
3631
3632 #if 1
3633 if (swap) {
3634- swapRGB((unsigned int *)data32, (long)info->width);
3635+ swapRGB((unsigned int *)data32, (int)info->width);
3636 }
3637 #endif
3638
3639--- Glide3/swlibs/texus/lib/texus.h.ia64-foo Wed Jun 14 20:11:40 2000
3640+++ Glide3/swlibs/texus/lib/texus.h Thu Dec 21 14:27:40 2000
3641@@ -38,8 +38,13 @@
3642 typedef unsigned char FxU8;
3643 typedef unsigned short FxU16;
3644 typedef short FxI16;
3645+#ifdef __LP64__
3646+typedef unsigned int FxU32;
3647+typedef int FxI32;
3648+#else
3649 typedef unsigned long FxU32;
3650 typedef long FxI32;
3651+#endif
3652 typedef int FxBool;
3653
3654 /*
3655--- Glide3/swlibs/texus/lib/texusint.h.ia64-foo Wed Jun 14 20:11:40 2000
3656+++ Glide3/swlibs/texus/lib/texusint.h Thu Dec 21 14:27:40 2000
3657@@ -67,7 +67,7 @@
3658 int txAspectRatio(int w, int h);
3659 void txPanic(char *);
3660 void txError(char *);
3661-void txYABtoPal256(long *palette, const long* yabTable);
3662+void txYABtoPal256(int *palette, const int* yabTable);
3663 void txRectCopy(FxU8 *dst, int dstStride, const FxU8 *src, int srcStride,
3664 int width, int height);
3665 FxBool txMipAlloc(TxMip *txMip);
3666@@ -90,7 +90,7 @@
3667
3668 void txDiffuseIndex(TxMip *pxMip, TxMip *txMip, int pixsize,
3669 const FxU32 *palette, int ncolors);
3670-int txNearestColor(long ir, long ig, long ib, const FxU32 *pal, int npal);
3671+int txNearestColor(int ir, int ig, int ib, const FxU32 *pal, int npal);
3672
3673 FxBool _txReadTGAHeader( FILE *stream, FxU32 cookie, TxMip *info);
3674 FxBool _txReadTGAData( FILE *stream, TxMip *info);
3675--- Glide3/swlibs/texus/lib/util.c.ia64-foo Wed Jun 14 20:11:40 2000
3676+++ Glide3/swlibs/texus/lib/util.c Thu Dec 21 14:27:40 2000
3677@@ -133,14 +133,14 @@
3678 }
3679
3680 void
3681-txYABtoPal256(long *palette, const long* yabTable)
3682+txYABtoPal256(int *palette, const int* yabTable)
3683 {
3684 // Convert YAB table to a 256 color palette
3685 // Assume yabTable[] has first 16Y's, 12 A's, 12 B's
3686
3687- const long *Y = yabTable;
3688- const long *A = yabTable + 16;
3689- const long *B = yabTable + 16 + 12;
3690+ const int *Y = yabTable;
3691+ const int *A = yabTable + 16;
3692+ const int *B = yabTable + 16 + 12;
3693 int i;
3694
3695 for (i=0; i<256; i++) {
3696@@ -265,7 +265,7 @@
3697 int *explode3 = &_explode3[255];
3698
3699 int
3700-txNearestColor(long ir, long ig, long ib, const FxU32 *pal, int ncolors)
3701+txNearestColor(int ir, int ig, int ib, const FxU32 *pal, int ncolors)
3702 {
3703 int i, d;
3704 int mindist, minpos; // closest distance to input
3705--- Glide3/swlibs/texus2/cmd/makefile.autoconf.am.ia64-foo Mon Aug 7 11:24:44 2000
3706+++ Glide3/swlibs/texus2/cmd/makefile.autoconf.am Thu Dec 21 14:27:40 2000
3707@@ -24,5 +24,5 @@
3708 noinst_PROGRAMS = texus
3709 texus_SOURCES = cmd.c
3710 texus_LDADD = $(top_builddir)/swlibs/fxmisc/libfxmisc.la \
3711- $(top_builddir)/swlibs/texus2/lib/libtexus.la
3712+ $(top_builddir)/swlibs/texus2/lib/libtexus.la -lm
3713
3714--- Glide3/set-for-dri.ia64-foo Thu Dec 21 14:27:40 2000
3715+++ Glide3/set-for-dri Thu Dec 21 14:27:40 2000
3716@@ -0,0 +1,7 @@
3717+for n in ./h3/glide3/src/gglide.c ./h3/glide3/src/glfb.c ./h3/glide3/src/gsst.c ./h3/minihwc/linhwc.c
3718+do
3719+ rn=$(basename $n).dri
3720+ echo ln -sf $rn $n
3721+ ln -sf $rn $n
3722+done
3723+
3724--- Glide3/set-for-standalone.ia64-foo Thu Dec 21 14:27:40 2000
3725+++ Glide3/set-for-standalone Thu Dec 21 14:27:40 2000
3726@@ -0,0 +1,7 @@
3727+for n in ./h3/glide3/src/gglide.c ./h3/glide3/src/glfb.c ./h3/glide3/src/gsst.c ./h3/minihwc/linhwc.c
3728+do
3729+ rn=$(basename $n).save
3730+ echo ln -sf $rn $n
3731+ ln -sf $rn $n
3732+done
3733+
3734--- Glide3/configure.in.ia64-foo Thu Dec 21 14:39:25 2000
3735+++ Glide3/configure.in Thu Dec 21 16:41:57 2000
3736@@ -171,7 +171,12 @@
3737 GLIDE_SANITY_SIZE=false
3738 FX_DLL_BUILD=false
3739 FX_GLIDE_HW_CULL=false
3740-FX_GLIDE_CTRISETUP=false
3741+ARCH=`uname -m | sed "s|[456]86|386|g"`
3742+if test "$ARCH" = "i386" ; then
3743+ FX_GLIDE_CTRISETUP=false
3744+else
3745+ FX_GLIDE_CTRISETUP=true
3746+fi
3747 # Next, we read some configuration options
3748 # statically. This is to avoid creating a bunch of
3749 # not-terribly-useful --enable options.
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