From: Jan Rękorajski Date: Wed, 20 Nov 2013 17:47:35 +0000 (+0100) Subject: - just revert the changes that seem to introduce black screen problems X-Git-Tag: auto/th/kernel-3.10.20-1^2 X-Git-Url: http://git.pld-linux.org/?a=commitdiff_plain;h=bb2ee0f1750dbcbe76a5c74cd73e6281401d6212;p=packages%2Fkernel.git - just revert the changes that seem to introduce black screen problems --- diff --git a/kernel-i915-eDP-bpp-clamping.patch b/kernel-i915-eDP-bpp-clamping.patch index e8a1d453..3e6e6442 100644 --- a/kernel-i915-eDP-bpp-clamping.patch +++ b/kernel-i915-eDP-bpp-clamping.patch @@ -1,83 +1,62 @@ -From c6cd2ee2d59111a07cd9199564c9bdcb2d11e5cf Mon Sep 17 00:00:00 2001 -From: Jani Nikula -Date: Mon, 21 Oct 2013 07:52:07 +0000 -Subject: drm/i915/dp: workaround BIOS eDP bpp clamping issue +This patch reverts the following change: -This isn't a real fix to the problem, but rather a stopgap measure while -trying to find a proper solution. +From 657445fe8660100ad174600ebfa61536392b7624 Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Sat, 04 May 2013 08:09:18 +0000 +Subject: Revert "drm/i915: revert eDP bpp clamping code changes" -There are several laptops out there that fail to light up the eDP panel -in UEFI boot mode. They seem to be mostly IVB machines, including but -apparently not limited to Dell XPS 13, Asus TX300, Asus UX31A, Asus -UX32VD, Acer Aspire S7. They seem to work in CSM or legacy boot. +This reverts commit 57c219633275c7e7413f8bc7be250dc092887458. -The difference between UEFI and CSM is that the BIOS provides a -different VBT to the kernel. The UEFI VBT typically specifies 18 bpp and -1.62 GHz link for eDP, while CSM VBT has 24 bpp and 2.7 GHz link. We end -up clamping to 18 bpp in UEFI mode, which we can fit in the 1.62 Ghz -link, and for reasons yet unknown fail to light up the panel. +It's an ugly hack for a Haswell SDV platform where the vbt doesn't +seem to fully agree with the panel. Since it seems to cause issues on +real eDP platform let's just kill this hack again. -Dithering from 24 to 18 bpp itself seems to work; if we use 18 bpp with -2.7 GHz link, the eDP panel lights up. So essentially this is a link -speed issue, and *not* a bpp clamping issue. - -The bug raised its head since -commit 657445fe8660100ad174600ebfa61536392b7624 -Author: Daniel Vetter -Date: Sat May 4 10:09:18 2013 +0200 - - Revert "drm/i915: revert eDP bpp clamping code changes" - -which started clamping bpp *before* computing the link requirements, and -thus affecting the required bandwidth. Clamping after the computations -kept the link at 2.7 GHz. - -Even though the BIOS tells us to use 18 bpp through the VBT, it happily -boots up at 24 bpp and 2.7 GHz itself! Use this information to -selectively ignore the VBT provided value. +Reported-and-tested-by: Josh Boyer +References: https://lkml.org/lkml/2013/5/3/467 +Cc: Paulo Zanoni +Signed-off-by: Daniel Vetter -We can't ignore the VBT eDP bpp altogether, as there are other laptops -that do require the clamping to be used due to EDID reporting higher bpp -than the panel can support. -Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=59841 -Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67950 -Tested-by: Ulf Winkelvos -Tested-by: jkp -CC: stable@vger.kernel.org -Signed-off-by: Jani Nikula -Signed-off-by: Daniel Vetter ---- diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c -index 2c555f9..1a43137 100644 +index fc3bd9b..0ab9813 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c -@@ -755,6 +755,26 @@ static void intel_dp_get_config(struct intel_encoder *encoder, +@@ -702,9 +702,6 @@ intel_dp_compute_config(struct intel_encoder *encoder, + /* Walk through all bpp values. Luckily they're all nicely spaced with 2 + * bpc in between. */ + bpp = min_t(int, 8*3, pipe_config->pipe_bpp); +- if (is_edp(intel_dp) && dev_priv->edp.bpp) +- bpp = min_t(int, bpp, dev_priv->edp.bpp); +- + for (; bpp >= 6*3; bpp -= 2*3) { + mode_rate = intel_dp_link_required(target_clock, bpp); + +@@ -739,7 +742,6 @@ found: + intel_dp->link_bw = bws[clock]; + intel_dp->lane_count = lane_count; adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); - pipe_config->pipe_bpp = bpp; +- pipe_config->pipe_bpp = bpp; pipe_config->pixel_target_clock = target_clock; -+ -+ if (is_edp(intel_dp) && dev_priv->edp.bpp && -+ pipe_config->pipe_bpp > dev_priv->edp.bpp) { -+ /* -+ * This is a big fat ugly hack. -+ * -+ * Some machines in UEFI boot mode provide us a VBT that has 18 -+ * bpp and 1.62 GHz link bandwidth for eDP, which for reasons -+ * unknown we fail to light up. Yet the same BIOS boots up with -+ * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as -+ * max, not what it tells us to use. -+ * -+ * Note: This will still be broken if the eDP panel is not lit -+ * up by the BIOS, and thus we can't get the mode at module -+ * load. -+ */ -+ DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n", -+ pipe_config->pipe_bpp, dev_priv->edp.bpp); -+ dev_priv->edp.bpp = pipe_config->pipe_bpp; -+ } DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n", - intel_dp->link_bw, intel_dp->lane_count, --- -cgit v0.9.2 +@@ -751,6 +755,20 @@ found: + target_clock, adjusted_mode->clock, + &pipe_config->dp_m_n); + ++ /* ++ * XXX: We have a strange regression where using the vbt edp bpp value ++ * for the link bw computation results in black screens, the panel only ++ * works when we do the computation at the usual 24bpp (but still ++ * requires us to use 18bpp). Until that's fully debugged, stay ++ * bug-for-bug compatible with the old code. ++ */ ++ if (is_edp(intel_dp) && dev_priv->edp.bpp) { ++ DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", ++ bpp, dev_priv->edp.bpp); ++ bpp = min_t(int, bpp, dev_priv->edp.bpp); ++ } ++ pipe_config->pipe_bpp = bpp; ++ + return true; + } +