--- /dev/null
+diff -Naurp gcc/gcc.c gcc/gcc.c
+--- gcc/gcc.c 2012-08-06 20:04:27.000000000 +0530
++++ gcc/gcc.c 2013-03-21 12:13:51.000000000 +0530
+@@ -267,6 +267,7 @@ static const char *compare_debug_dump_op
+ static const char *compare_debug_self_opt_spec_function (int, const char **);
+ static const char *compare_debug_auxbase_opt_spec_function (int, const char **);
+ static const char *pass_through_libs_spec_func (int, const char **);
++static char *convert_white_space (char *);
+ \f
+ /* The Specs Language
+
+@@ -6475,6 +6476,7 @@ main (int argc, char **argv)
+ X_OK, false);
+ if (lto_wrapper_file)
+ {
++ lto_wrapper_file = convert_white_space (lto_wrapper_file);
+ lto_wrapper_spec = lto_wrapper_file;
+ obstack_init (&collect_obstack);
+ obstack_grow (&collect_obstack, "COLLECT_LTO_WRAPPER=",
+@@ -6876,12 +6878,13 @@ warranty; not even for MERCHANTABILITY o
+ + strlen (fuse_linker_plugin), 0))
+ #endif
+ {
+- linker_plugin_file_spec = find_a_file (&exec_prefixes,
+- LTOPLUGINSONAME, R_OK,
+- false);
+- if (!linker_plugin_file_spec)
++ char *temp_spec = find_a_file (&exec_prefixes,
++ LTOPLUGINSONAME, R_OK,
++ false);
++ if (!temp_spec)
+ fatal_error ("-fuse-linker-plugin, but %s not found",
+ LTOPLUGINSONAME);
++ linker_plugin_file_spec = convert_white_space (temp_spec);
+ }
+ #endif
+ lto_gcc_spec = argv[0];
+@@ -8318,3 +8321,51 @@ pass_through_libs_spec_func (int argc, c
+ }
+ return prepended;
+ }
++
++/* Insert backslash before spaces in ORIG (usually a file path), to
++ avoid being broken by spec parser.
++
++ This function is needed as do_spec_1 treats white space (' ' and '\t')
++ as the end of an argument. But in case of -plugin /usr/gcc install/xxx.so,
++ the file name should be treated as a single argument rather than being
++ broken into multiple. Solution is to insert '\\' before the space in a
++ file name.
++
++ This function converts and only converts all occurrence of ' '
++ to '\\' + ' ' and '\t' to '\\' + '\t'. For example:
++ "a b" -> "a\\ b"
++ "a b" -> "a\\ \\ b"
++ "a\tb" -> "a\\\tb"
++ "a\\ b" -> "a\\\\ b"
++
++ orig: input null-terminating string that was allocated by xalloc. The
++ memory it points to might be freed in this function. Behavior undefined
++ if ORIG wasn't xalloced or was freed already at entry.
++
++ Return: ORIG if no conversion needed. Otherwise a newly allocated string
++ that was converted from ORIG. */
++
++static char *
++convert_white_space (char *orig)
++{
++ int len, number_of_space = 0;
++
++ for (len = 0; orig[len]; len++)
++ if (orig[len] == ' ' || orig[len] == '\t') number_of_space++;
++
++ if (number_of_space)
++ {
++ char *new_spec = (char *) xmalloc (len + number_of_space + 1);
++ int j, k;
++ for (j = 0, k = 0; j <= len; j++, k++)
++ {
++ if (orig[j] == ' ' || orig[j] == '\t')
++ new_spec[k++] = '\\';
++ new_spec[k] = orig[j];
++ }
++ free (orig);
++ return new_spec;
++ }
++ else
++ return orig;
++}
+++ /dev/null
-diff -aurp libiberty/Makefile.in libiberty/Makefile.in
---- libiberty/Makefile.in 2010-11-21 01:07:08.000000000 +0530
-+++ libiberty/Makefile.in 2011-06-21 12:26:09.000000000 +0530
-@@ -340,7 +340,8 @@ libiberty.html : $(srcdir)/libiberty.tex
- @MAINT@ echo stamp > stamp-functions
-
- INSTALL_DEST = @INSTALL_DEST@
--install: install_to_$(INSTALL_DEST) install-subdir
-+#install: install_to_$(INSTALL_DEST) install-subdir
-+install:
- install-strip: install
-
- .PHONY: install install-strip
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 16:55:55.000000000 +0530
-@@ -236,6 +236,19 @@ static const struct default_options avr_
- #undef TARGET_EXCEPT_UNWIND_INFO
- #define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
-
-+#undef TARGET_SCALAR_MODE_SUPPORTED_P
-+#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
-+
-+ /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
-+ static bool
-+ avr_scalar_mode_supported_p (enum machine_mode mode)
-+ {
-+ if (ALL_FIXED_POINT_MODE_P (mode))
-+ return true;
-+
-+ return default_scalar_mode_supported_p (mode);
-+ }
-+
- struct gcc_target targetm = TARGET_INITIALIZER;
- \f
- static void
-@@ -1767,9 +1780,9 @@ output_movqi (rtx insn, rtx operands[],
-
- *l = 1;
-
-- if (register_operand (dest, QImode))
-+ if (register_operand (dest, VOIDmode))
- {
-- if (register_operand (src, QImode)) /* mov r,r */
-+ if (register_operand (src, VOIDmode)) /* mov r,r */
- {
- if (test_hard_reg_class (STACK_REG, dest))
- return AS2 (out,%0,%1);
-@@ -1857,9 +1870,9 @@ output_movhi (rtx insn, rtx operands[],
- if (!l)
- l = &dummy;
-
-- if (register_operand (dest, HImode))
-+ if (register_operand (dest, VOIDmode))
- {
-- if (register_operand (src, HImode)) /* mov r,r */
-+ if (register_operand (src, VOIDmode)) /* mov r,r */
- {
- if (test_hard_reg_class (STACK_REG, dest))
- {
-@@ -2582,6 +2595,14 @@ output_movsisf(rtx insn, rtx operands[],
- {
- if (test_hard_reg_class (LD_REGS, dest)) /* ldi d,i */
- {
-+ if (AVR_HAVE_MOVW
-+ && (UINTVAL (src) >> 16) == (UINTVAL (src) & 0xffff))
-+ {
-+ *l = 3;
-+ return (AS2 (ldi,%A0,lo8(%1)) CR_TAB
-+ AS2 (ldi,%B0,hi8(%1)) CR_TAB
-+ AS2 (movw,%C0,%A0));
-+ }
- *l = 4;
- return (AS2 (ldi,%A0,lo8(%1)) CR_TAB
- AS2 (ldi,%B0,hi8(%1)) CR_TAB
-@@ -4527,6 +4548,196 @@ avr_rotate_bytes (rtx operands[])
- return true;
- }
-
-+/* Outputs instructions needed for fixed point conversion. */
-+
-+const char *
-+fract_out (rtx insn ATTRIBUTE_UNUSED, rtx operands[], int intsigned, int *len)
-+{
-+ int i, k = 0;
-+ int sbit[2], ilen[2], flen[2], tlen[2];
-+ int rdest, rsource, offset;
-+ int start, end, dir;
-+ int hadbst = 0, hadlsl = 0;
-+ int clrword = -1, lastclr = 0, clr = 0;
-+ char buf[20];
-+
-+ if (!len)
-+ len = &k;
-+
-+ for (i = 0; i < 2; i++)
-+ {
-+ enum machine_mode mode = GET_MODE (operands[i]);
-+ tlen[i] = GET_MODE_SIZE (mode);
-+ if (SCALAR_INT_MODE_P (mode))
-+ {
-+ sbit[i] = intsigned;
-+ ilen[i] = GET_MODE_BITSIZE(mode) / 8;
-+ flen[i] = 0;
-+ }
-+ else if (ALL_SCALAR_FIXED_POINT_MODE_P (mode))
-+ {
-+ sbit[i] = SIGNED_SCALAR_FIXED_POINT_MODE_P (mode);
-+ ilen[i] = (GET_MODE_IBIT (mode) + 1) / 8;
-+ flen[i] = (GET_MODE_FBIT (mode) + 1) / 8;
-+ }
-+ else
-+ fatal_insn ("unsupported fixed-point conversion", insn);
-+ }
-+
-+ rdest = true_regnum (operands[0]);
-+ rsource = true_regnum (operands[1]);
-+ offset = flen[1] - flen[0];
-+
-+ /* Store the sign bit if the destination is a signed
-+ fract and the source has a sign in the integer part. */
-+ if (sbit[0] && !ilen[0] && sbit[1] && ilen[1])
-+ {
-+ /* To avoid using bst and bld if the source and
-+ destination registers overlap we can use a single lsl
-+ since we don't care about preserving the source register. */
-+ if (rdest < rsource + tlen[1] && rdest + tlen[0] > rsource)
-+ {
-+ sprintf (buf, "lsl r%d", rsource + tlen[1] - 1);
-+ hadlsl = 1;
-+ }
-+ else
-+ {
-+ sprintf (buf, "bst r%d, 7", rsource + tlen[1] - 1);
-+ hadbst = 1;
-+ }
-+ output_asm_insn (buf, operands);
-+ ++*len;
-+ }
-+
-+ /* Pick the correct direction. */
-+ if (rdest < rsource + offset)
-+ {
-+ dir = 1;
-+ start = 0;
-+ end = tlen[0];
-+ }
-+ else
-+ {
-+ dir = -1;
-+ start = tlen[0] - 1;
-+ end = -1;
-+ }
-+
-+ /* Move registers into place, clearing registers that do not overlap. */
-+ for (i = start; i != end; i += dir)
-+ {
-+ int destloc = rdest + i, sourceloc = rsource + i + offset;
-+ if (sourceloc < rsource || sourceloc >= rsource + tlen[1])
-+ {
-+ if (AVR_HAVE_MOVW && i+dir != end
-+ && (sourceloc+dir < rsource || sourceloc+dir >= rsource + tlen[1])
-+ && ((dir == 1 && !(destloc%2) && !(sourceloc%2))
-+ || (dir == -1 && (destloc%2) && (sourceloc%2)))
-+ && clrword != -1)
-+ {
-+ sprintf (buf, "movw r%d, r%d", destloc&0xfe, clrword&0xfe);
-+ i += dir;
-+ }
-+ else
-+ {
-+ /* Do not clear the register if it is going to get
-+ sign extended with a mov later. */
-+ if (sbit[0] && sbit[1] && i != tlen[0] - 1 && i >= flen[0])
-+ continue;
-+
-+ sprintf (buf, "clr r%d", destloc);
-+ if (lastclr)
-+ clrword = destloc;
-+ clr=1;
-+ }
-+ }
-+ else if (destloc == sourceloc)
-+ continue;
-+ else
-+ if (AVR_HAVE_MOVW && i+dir != end
-+ && sourceloc+dir >= rsource && sourceloc+dir < rsource + tlen[1]
-+ && ((dir == 1 && !(destloc%2) && !(sourceloc%2))
-+ || (dir == -1 && (destloc%2) && (sourceloc%2))))
-+ {
-+ sprintf (buf, "movw r%d, r%d", destloc&0xfe, sourceloc&0xfe);
-+ i += dir;
-+ }
-+ else
-+ sprintf (buf, "mov r%d, r%d", destloc, sourceloc);
-+
-+ output_asm_insn (buf, operands);
-+ ++*len;
-+
-+ lastclr = clr;
-+ clr = 0;
-+ }
-+
-+ /* Perform sign extension if needed. */
-+ if (sbit[0] && sbit[1] && ilen[0] > ilen[1])
-+ {
-+ sprintf (buf, "sbrc r%d, 7", rdest+tlen[1]-1-offset);
-+ output_asm_insn (buf, operands);
-+ sprintf (buf, "com r%d", rdest+tlen[0]-1);
-+ output_asm_insn (buf, operands);
-+ *len += 2;
-+ /* Sign extend additional bytes. */
-+ start = rdest + tlen[0] - 2;
-+ end = rdest + flen[0] + ilen[1] - 1;
-+ for (i = start; i != end; i--)
-+ {
-+ if (AVR_HAVE_MOVW && i != start && i-1 != end)
-+ sprintf (buf, "movw r%d, r%d", --i, rdest+tlen[0]-2);
-+ else
-+ sprintf (buf, "mov r%d, r%d", i, rdest+tlen[0]-1);
-+ output_asm_insn (buf, operands);
-+ ++*len;
-+ }
-+ }
-+
-+ /* Perform shifts, only needed if one operand
-+ is a signed fract, and the other is not. */
-+ if (sbit[0] && !ilen[0] && (!sbit[1] || ilen[1]))
-+ {
-+ start = rdest+flen[0]-1;
-+ end = rdest + flen[0] - flen[1];
-+ if (end < rdest)
-+ end = rdest;
-+ for (i = start; i >= end; i--)
-+ {
-+ if (i == start && !hadlsl)
-+ sprintf (buf, "lsr r%d", i);
-+ else
-+ sprintf (buf, "ror r%d", i);
-+ output_asm_insn (buf, operands);
-+ ++*len;
-+ }
-+
-+ if (hadbst)
-+ {
-+ sprintf (buf, "bld r%d, 7", rdest + tlen[0] - 1);
-+ output_asm_insn (buf, operands);
-+ ++*len;
-+ }
-+ }
-+ else if (sbit[1] && !ilen[1] && (!sbit[0] || ilen[0]))
-+ {
-+ start = rdest + flen[0] - flen[1];
-+ if (start < rdest)
-+ start = rdest;
-+ for (i = start; i<rdest+flen[0]; i++)
-+ {
-+ if (i == start)
-+ sprintf (buf, "lsl r%d", i);
-+ else
-+ sprintf (buf, "rol r%d", i);
-+ output_asm_insn (buf, operands);
-+ ++*len;
-+ }
-+ }
-+
-+ return "";
-+}
-+
- /* Modifies the length assigned to instruction INSN
- LEN is the initially computed length of the insn. */
-
-diff -Naurp gcc/config/avr/avr-fixed.md gcc/config/avr/avr-fixed.md
---- gcc/config/avr/avr-fixed.md 1970-01-01 05:30:00.000000000 +0530
-+++ gcc/config/avr/avr-fixed.md 2011-10-27 16:55:55.000000000 +0530
-@@ -0,0 +1,338 @@
-+;; -*- Mode: Scheme -*-
-+;; This file contains instructions that support fixed-point operations
-+;; for ATMEL AVR micro controllers.
-+;; Copyright (C) 2009
-+;; Free Software Foundation, Inc.
-+;; Contributed by Sean D'Epagnier (sean@depagnier.com)
-+
-+;; This file is part of GCC.
-+
-+;; GCC is free software; you can redistribute it and/or modify
-+;; it under the terms of the GNU General Public License as published by
-+;; the Free Software Foundation; either version 3, or (at your option)
-+;; any later version.
-+
-+;; GCC is distributed in the hope that it will be useful,
-+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+;; GNU General Public License for more details.
-+
-+;; You should have received a copy of the GNU General Public License
-+;; along with GCC; see the file COPYING3. If not see
-+;; <http://www.gnu.org/licenses/>.
-+
-+(define_mode_iterator ALLQQ [(QQ "") (UQQ "")])
-+(define_mode_iterator ALLHQ [(HQ "") (UHQ "")])
-+(define_mode_iterator ALLHA [(HA "") (UHA "")])
-+(define_mode_iterator ALLHQHA [(HQ "") (UHQ "") (HA "") (UHA "")])
-+(define_mode_iterator ALLSA [(SA "") (USA "")])
-+
-+;;; Conversions
-+
-+(define_mode_iterator FIXED1 [(QQ "") (UQQ "") (HQ "") (UHQ "")
-+ (SQ "") (USQ "") (DQ "") (UDQ "")
-+ (HA "") (UHA "") (SA "") (USA "")
-+ (DA "") (UDA "") (TA "") (UTA "")
-+ (QI "") (HI "") (SI "") (DI "")])
-+(define_mode_iterator FIXED2 [(QQ "") (UQQ "") (HQ "") (UHQ "")
-+ (SQ "") (USQ "") (DQ "") (UDQ "")
-+ (HA "") (UHA "") (SA "") (USA "")
-+ (DA "") (UDA "") (TA "") (UTA "")
-+ (QI "") (HI "") (SI "") (DI "")])
-+
-+(define_insn "fract<FIXED2:mode><FIXED1:mode>2"
-+ [(set (match_operand:FIXED1 0 "register_operand" "=r")
-+ (fract_convert:FIXED1 (match_operand:FIXED2 1 "register_operand" "r")))]
-+ ""
-+ "* return fract_out (insn, operands, 1, NULL);"
-+ [(set_attr "cc" "clobber")])
-+
-+(define_insn "fractuns<FIXED2:mode><FIXED1:mode>2"
-+ [(set (match_operand:FIXED1 0 "register_operand" "=r")
-+ (unsigned_fract_convert:FIXED1 (match_operand:FIXED2 1 "register_operand" "r")))]
-+ ""
-+ "* return fract_out (insn, operands, 0, NULL);"
-+ [(set_attr "cc" "clobber")])
-+
-+;;; Addition/Subtraction, mostly identical to integer versions
-+
-+(define_insn "add<ALLQQ:mode>3"
-+ [(set (match_operand:ALLQQ 0 "register_operand" "=r,d")
-+ (plus:ALLQQ (match_operand:ALLQQ 1 "register_operand" "%0,0")
-+ (match_operand:ALLQQ 2 "nonmemory_operand" "r,i")))]
-+ ""
-+ "@
-+ add %0,%2
-+ subi %0,lo8(-(%2))"
-+ [(set_attr "length" "1,1")
-+ (set_attr "cc" "set_czn,set_czn")])
-+
-+(define_insn "sub<ALLQQ:mode>3"
-+ [(set (match_operand:ALLQQ 0 "register_operand" "=r,d")
-+ (minus:ALLQQ (match_operand:ALLQQ 1 "register_operand" "0,0")
-+ (match_operand:ALLQQ 2 "nonmemory_operand" "r,i")))]
-+ ""
-+ "@
-+ sub %0,%2
-+ subi %0,lo8(%2)"
-+ [(set_attr "length" "1,1")
-+ (set_attr "cc" "set_czn,set_czn")])
-+
-+
-+(define_insn "add<ALLHQHA:mode>3"
-+ [(set (match_operand:ALLHQHA 0 "register_operand" "=r,d")
-+ (plus:ALLHQHA (match_operand:ALLHQHA 1 "register_operand" "%0,0")
-+ (match_operand:ALLHQHA 2 "nonmemory_operand" "r,i")))]
-+ ""
-+ "@
-+ add %A0,%A2\;adc %B0,%B2
-+ subi %A0,lo8(-(%2))\;sbci %B0,hi8(-(%2))"
-+ [(set_attr "length" "2,2")
-+ (set_attr "cc" "set_n,set_czn")])
-+
-+(define_insn "sub<ALLHQHA:mode>3"
-+ [(set (match_operand:ALLHQHA 0 "register_operand" "=r,d")
-+ (minus:ALLHQHA (match_operand:ALLHQHA 1 "register_operand" "0,0")
-+ (match_operand:ALLHQHA 2 "nonmemory_operand" "r,i")))]
-+ ""
-+ "@
-+ sub %A0,%A2\;sbc %B0,%B2
-+ subi %A0,lo8(%2)\;sbci %B0,hi8(%2)"
-+ [(set_attr "length" "2,2")
-+ (set_attr "cc" "set_czn,set_czn")])
-+
-+(define_insn "add<ALLSA:mode>3"
-+ [(set (match_operand:ALLSA 0 "register_operand" "=r,d")
-+ (plus:ALLSA (match_operand:ALLSA 1 "register_operand" "%0,0")
-+ (match_operand:ALLSA 2 "nonmemory_operand" "r,i")))]
-+ ""
-+ "@
-+ add %A0,%A2\;adc %B0,%B2\;adc %C0,%C2\;adc %D0,%D2
-+ subi %0,lo8(-(%2))\;sbci %B0,hi8(-(%2))\;sbci %C0,hlo8(-(%2))\;sbci %D0,hhi8(-(%2))"
-+ [(set_attr "length" "4,4")
-+ (set_attr "cc" "set_n,set_czn")])
-+
-+(define_insn "sub<ALLSA:mode>3"
-+ [(set (match_operand:ALLSA 0 "register_operand" "=r,d")
-+ (minus:ALLSA (match_operand:ALLSA 1 "register_operand" "0,0")
-+ (match_operand:ALLSA 2 "nonmemory_operand" "r,i")))]
-+ ""
-+ "@
-+ sub %0,%2\;sbc %B0,%B2\;sbc %C0,%C2\;sbc %D0,%D2
-+ subi %A0,lo8(%2)\;sbci %B0,hi8(%2)\;sbci %C0,hlo8(%2)\;sbci %D0,hhi8(%2)"
-+ [(set_attr "length" "4,4")
-+ (set_attr "cc" "set_czn,set_czn")])
-+
-+;******************************************************************************
-+; mul
-+
-+(define_insn "mulqq3"
-+ [(set (match_operand:QQ 0 "register_operand" "=r")
-+ (mult:QQ (match_operand:QQ 1 "register_operand" "a")
-+ (match_operand:QQ 2 "register_operand" "a")))]
-+ "AVR_HAVE_MUL"
-+ "fmuls %1,%2\;mov %0,r1\;clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+(define_insn "muluqq3"
-+ [(set (match_operand:UQQ 0 "register_operand" "=r")
-+ (mult:UQQ (match_operand:UQQ 1 "register_operand" "r")
-+ (match_operand:UQQ 2 "register_operand" "r")))]
-+ "AVR_HAVE_MUL"
-+ "mul %1,%2\;mov %0,r1\;clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+;; (reg:ALLHQ 20) not clobbered on the enhanced core.
-+;; use registers from 16-23 so we can use fmuls
-+;; All call-used registers clobbered otherwise - normal library call.
-+(define_expand "mul<ALLHQ:mode>3"
-+ [(set (reg:ALLHQ 22) (match_operand:ALLHQ 1 "register_operand" ""))
-+ (set (reg:ALLHQ 20) (match_operand:ALLHQ 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLHQ 18) (mult:ALLHQ (reg:ALLHQ 22) (reg:ALLHQ 20)))
-+ (clobber (reg:ALLHQ 22))])
-+ (set (match_operand:ALLHQ 0 "register_operand" "") (reg:ALLHQ 18))]
-+ "AVR_HAVE_MUL"
-+ "")
-+
-+(define_insn "*mul<ALLHQ:mode>3_enh_call"
-+ [(set (reg:ALLHQ 18) (mult:ALLHQ (reg:ALLHQ 22) (reg:ALLHQ 20)))
-+ (clobber (reg:ALLHQ 22))]
-+ "AVR_HAVE_MUL"
-+ "%~call __mul<ALLHQ:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+; Special calls for with and without mul.
-+(define_expand "mul<ALLHA:mode>3"
-+ [(set (reg:ALLHA 22) (match_operand:ALLHA 1 "register_operand" ""))
-+ (set (reg:ALLHA 20) (match_operand:ALLHA 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLHA 18) (mult:ALLHA (reg:ALLHA 22) (reg:ALLHA 20)))
-+ (clobber (reg:ALLHA 22))])
-+ (set (match_operand:ALLHA 0 "register_operand" "") (reg:ALLHA 18))]
-+ ""
-+ "
-+{
-+ if (!AVR_HAVE_MUL)
-+ {
-+ emit_insn (gen_mul<ALLHA:mode>3_call (operands[0], operands[1], operands[2]));
-+ DONE;
-+ }
-+}")
-+
-+(define_insn "*mul<ALLHA:mode>3_enh"
-+ [(set (reg:ALLHA 18) (mult:ALLHA (reg:ALLHA 22) (reg:ALLHA 20)))
-+ (clobber (reg:ALLHA 22))]
-+ "AVR_HAVE_MUL"
-+ "%~call __mul<ALLHA:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+; Without multiplier, clobbers both inputs, and needs a separate output register
-+(define_expand "mul<ALLHA:mode>3_call"
-+ [(set (reg:ALLHA 24) (match_operand:ALLHA 1 "register_operand" ""))
-+ (set (reg:ALLHA 22) (match_operand:ALLHA 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLHA 18) (mult:ALLHA (reg:ALLHA 22) (reg:ALLHA 24)))
-+ (clobber (reg:ALLHA 22))
-+ (clobber (reg:ALLHA 24))])
-+ (set (match_operand:ALLHA 0 "register_operand" "") (reg:ALLHA 18))]
-+ "!AVR_HAVE_MUL"
-+ "")
-+
-+(define_insn "*mul<ALLHA:mode>3_call"
-+ [(set (reg:ALLHA 18) (mult:ALLHA (reg:ALLHA 22) (reg:ALLHA 24)))
-+ (clobber (reg:ALLHA 22))
-+ (clobber (reg:ALLHA 24))]
-+ "!AVR_HAVE_MUL"
-+ "%~call __mul<ALLHA:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+;; On the enhanced core, don't clobber either input, and use a separate output,
-+;; r2 is needed as a zero register since r1 is used for mul
-+(define_expand "mul<ALLSA:mode>3"
-+ [(set (reg:ALLSA 16) (match_operand:ALLSA 1 "register_operand" ""))
-+ (set (reg:ALLSA 20) (match_operand:ALLSA 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLSA 24) (mult:ALLSA (reg:ALLSA 16) (reg:ALLSA 20)))
-+ (clobber (reg:QI 15))])
-+ (set (match_operand:ALLSA 0 "register_operand" "") (reg:ALLSA 24))]
-+ ""
-+ "
-+{
-+ if (!AVR_HAVE_MUL)
-+ {
-+ emit_insn (gen_mul<ALLSA:mode>3_call (operands[0], operands[1], operands[2]));
-+ DONE;
-+ }
-+}")
-+
-+(define_insn "*mul<ALLSA:mode>3_enh"
-+ [(set (reg:ALLSA 24) (mult:ALLSA (reg:ALLSA 16) (reg:ALLSA 20)))
-+ (clobber (reg:QI 15))]
-+ "AVR_HAVE_MUL"
-+ "%~call __mul<ALLSA:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+; Without multiplier, clobbers both inputs, needs a separate output, and also
-+; needs two more scratch registers
-+(define_expand "mul<ALLSA:mode>3_call"
-+ [(set (reg:ALLSA 18) (match_operand:ALLSA 1 "register_operand" ""))
-+ (set (reg:ALLSA 24) (match_operand:ALLSA 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLSA 14) (mult:ALLSA (reg:ALLSA 18) (reg:ALLSA 24)))
-+ (clobber (reg:ALLSA 18))
-+ (clobber (reg:ALLSA 24))
-+ (clobber (reg:HI 22))])
-+ (set (match_operand:ALLSA 0 "register_operand" "") (reg:ALLSA 14))]
-+ "!AVR_HAVE_MUL"
-+ "")
-+
-+(define_insn "*mul<ALLSA:mode>3_call"
-+ [(set (reg:ALLSA 14) (mult:ALLSA (reg:ALLSA 18) (reg:ALLSA 24)))
-+ (clobber (reg:ALLSA 18))
-+ (clobber (reg:ALLSA 24))
-+ (clobber (reg:HI 22))]
-+ "!AVR_HAVE_MUL"
-+ "%~call __mul<ALLSA:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+; / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / /
-+; div
-+
-+(define_code_iterator usdiv [udiv div]) ; do signed and unsigned in one shot
-+
-+(define_expand "<usdiv:code><ALLQQ:mode>3"
-+ [(set (reg:ALLQQ 25) (match_operand:ALLQQ 1 "register_operand" ""))
-+ (set (reg:ALLQQ 22) (match_operand:ALLQQ 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLQQ 24) (usdiv:ALLQQ (reg:ALLQQ 25) (reg:ALLQQ 22)))
-+ (clobber (reg:ALLQQ 25))
-+ (clobber (reg:QI 23))])
-+ (set (match_operand:ALLQQ 0 "register_operand" "") (reg:ALLQQ 24))]
-+ ""
-+ "")
-+
-+(define_insn "*<usdiv:code><ALLQQ:mode>3_call"
-+ [(set (reg:ALLQQ 24) (usdiv:ALLQQ (reg:ALLQQ 25) (reg:ALLQQ 22)))
-+ (clobber (reg:ALLQQ 25))
-+ (clobber (reg:QI 23))]
-+ ""
-+ "%~call __<usdiv:code><ALLQQ:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+(define_expand "<usdiv:code><ALLHQHA:mode>3"
-+ [(set (reg:ALLHQHA 26) (match_operand:ALLHQHA 1 "register_operand" ""))
-+ (set (reg:ALLHQHA 22) (match_operand:ALLHQHA 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLHQHA 24) (usdiv:ALLHQHA (reg:ALLHQHA 26) (reg:ALLHQHA 22)))
-+ (clobber (reg:ALLHQHA 26))
-+ (clobber (reg:QI 21))])
-+ (set (match_operand:ALLHQHA 0 "register_operand" "") (reg:ALLHQHA 24))]
-+ ""
-+ "")
-+
-+(define_insn "*<usdiv:code><ALLHQHA:mode>3_call"
-+ [(set (reg:ALLHQHA 24) (usdiv:ALLHQHA (reg:ALLHQHA 26) (reg:ALLHQHA 22)))
-+ (clobber (reg:ALLHQHA 26))
-+ (clobber (reg:QI 21))]
-+ ""
-+ "%~call __<usdiv:code><ALLHQHA:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+; note the first parameter gets passed in already offset by 2 bytes
-+(define_expand "<usdiv:code><ALLSA:mode>3"
-+ [(set (reg:ALLSA 24) (match_operand:ALLSA 1 "register_operand" ""))
-+ (set (reg:ALLSA 18) (match_operand:ALLSA 2 "register_operand" ""))
-+ (parallel [(set (reg:ALLSA 22) (usdiv:ALLSA (reg:ALLSA 24) (reg:ALLSA 18)))
-+ (clobber (reg:HI 26))
-+ (clobber (reg:HI 30))])
-+ (set (match_operand:ALLSA 0 "register_operand" "") (reg:ALLSA 22))]
-+ ""
-+ "")
-+
-+(define_insn "*<usdiv:code><ALLSA:mode>3_call"
-+ [(set (reg:ALLSA 22) (usdiv:ALLSA (reg:ALLSA 24) (reg:ALLSA 18)))
-+ (clobber (reg:HI 26))
-+ (clobber (reg:HI 30))]
-+ ""
-+ "%~call __<usdiv:code><ALLSA:mode>3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+
-+;; abs must be defined for fixed types for correct operation
-+
-+;; abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x)
-+
-+;; abs
-+
-+(define_insn "abs<ALLQQ:mode>2"
-+ [(set (match_operand:ALLQQ 0 "register_operand" "=r")
-+ (abs:ALLQQ (match_operand:ALLQQ 1 "register_operand" "0")))]
-+ ""
-+ "sbrc %0,7
-+ neg %0"
-+ [(set_attr "length" "2")
-+ (set_attr "cc" "clobber")])
-diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/config/avr/avr.md 2011-10-27 16:55:55.000000000 +0530
-@@ -65,6 +65,15 @@
- (include "predicates.md")
- (include "constraints.md")
-
-+; fixed-point instructions.
-+(include "avr-fixed.md")
-+(define_mode_iterator ALLQ [(QI "") (QQ "") (UQQ "")])
-+(define_mode_iterator ALLH [(HI "") (HQ "") (UHQ "") (HA "") (UHA "")])
-+(define_mode_iterator ALLS [(SI "") (SA "") (USA "")])
-+(define_mode_iterator ALLQS [(QI "") (QQ "") (UQQ "")
-+ (HI "") (HQ "") (UHQ "") (HA "") (UHA "")
-+ (SI "") (SA "") (USA "")])
-+
- ;; Condition code settings.
- (define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber"
- (const_string "none"))
-@@ -179,28 +188,27 @@
- DONE;
- })
-
--
--(define_insn "*pushqi"
-- [(set (mem:QI (post_dec:HI (reg:HI REG_SP)))
-- (match_operand:QI 0 "reg_or_0_operand" "r,L"))]
-+(define_insn "*push<ALLQ:mode>"
-+ [(set (mem:ALLQ (post_dec:HI (reg:HI REG_SP)))
-+ (match_operand:ALLQ 0 "reg_or_0_operand" "r,L"))]
- ""
- "@
- push %0
- push __zero_reg__"
- [(set_attr "length" "1,1")])
-
--(define_insn "*pushhi"
-- [(set (mem:HI (post_dec:HI (reg:HI REG_SP)))
-- (match_operand:HI 0 "reg_or_0_operand" "r,L"))]
-+(define_insn "*push<ALLH:mode>"
-+ [(set (mem:ALLH (post_dec:HI (reg:HI REG_SP)))
-+ (match_operand:ALLH 0 "reg_or_0_operand" "r,L"))]
- ""
- "@
- push %B0\;push %A0
- push __zero_reg__\;push __zero_reg__"
- [(set_attr "length" "2,2")])
-
--(define_insn "*pushsi"
-- [(set (mem:SI (post_dec:HI (reg:HI REG_SP)))
-- (match_operand:SI 0 "reg_or_0_operand" "r,L"))]
-+(define_insn "*push<ALLS:mode>"
-+ [(set (mem:ALLS (post_dec:HI (reg:HI REG_SP)))
-+ (match_operand:ALLS 0 "reg_or_0_operand" "r,L"))]
- ""
- "@
- push %D0\;push %C0\;push %B0\;push %A0
-@@ -226,21 +234,21 @@
- ;; are call-saved registers, and most of LD_REGS are call-used registers,
- ;; so this may still be a win for registers live across function calls.
-
--(define_expand "movqi"
-- [(set (match_operand:QI 0 "nonimmediate_operand" "")
-- (match_operand:QI 1 "general_operand" ""))]
-+(define_expand "mov<ALLQ:mode>"
-+ [(set (match_operand:ALLQ 0 "nonimmediate_operand" "")
-+ (match_operand:ALLQ 1 "general_operand" ""))]
- ""
- "/* One of the ops has to be in a register. */
-- if (!register_operand(operand0, QImode)
-- && ! (register_operand(operand1, QImode) || const0_rtx == operand1))
-- operands[1] = copy_to_mode_reg(QImode, operand1);
-+ if (!register_operand(operand0, <ALLQ:MODE>mode)
-+ && ! (register_operand(operand1, <ALLQ:MODE>mode) || const0_rtx == operand1))
-+ operands[1] = copy_to_mode_reg(<ALLQ:MODE>mode, operand1);
- ")
-
--(define_insn "*movqi"
-- [(set (match_operand:QI 0 "nonimmediate_operand" "=r,d,Qm,r,q,r,*r")
-- (match_operand:QI 1 "general_operand" "rL,i,rL,Qm,r,q,i"))]
-- "(register_operand (operands[0],QImode)
-- || register_operand (operands[1], QImode) || const0_rtx == operands[1])"
-+(define_insn "*mov<ALLQ:mode>"
-+ [(set (match_operand:ALLQ 0 "nonimmediate_operand" "=r,d,Qm,r,q,r,*r")
-+ (match_operand:ALLQ 1 "general_operand" "r,i,rL,Qm,r,q,i"))]
-+ "(register_operand (operands[0],<ALLQ:MODE>mode)
-+ || register_operand (operands[1], <ALLQ:MODE>mode) || const0_rtx == operands[1])"
- "* return output_movqi (insn, operands, NULL);"
- [(set_attr "length" "1,1,5,5,1,1,4")
- (set_attr "cc" "none,none,clobber,clobber,none,none,clobber")])
-@@ -272,17 +280,17 @@
- ;;============================================================================
- ;; move word (16 bit)
-
--(define_expand "movhi"
-- [(set (match_operand:HI 0 "nonimmediate_operand" "")
-- (match_operand:HI 1 "general_operand" ""))]
-+(define_expand "mov<ALLH:mode>"
-+ [(set (match_operand:ALLH 0 "nonimmediate_operand" "")
-+ (match_operand:ALLH 1 "general_operand" ""))]
- ""
- "
- {
- /* One of the ops has to be in a register. */
-- if (!register_operand(operand0, HImode)
-- && !(register_operand(operand1, HImode) || const0_rtx == operands[1]))
-+ if (!register_operand(operand0, <ALLH:MODE>mode)
-+ && !(register_operand(operand1, <ALLH:MODE>mode) || const0_rtx == operands[1]))
- {
-- operands[1] = copy_to_mode_reg(HImode, operand1);
-+ operands[1] = copy_to_mode_reg(<ALLH:MODE>mode, operand1);
- }
- }")
-
-@@ -337,20 +345,20 @@
- [(set_attr "length" "4")
- (set_attr "cc" "none")])
-
--(define_insn "*movhi"
-- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,d,*r,q,r")
-- (match_operand:HI 1 "general_operand" "rL,m,rL,i,i,r,q"))]
-- "(register_operand (operands[0],HImode)
-- || register_operand (operands[1],HImode) || const0_rtx == operands[1])"
-+(define_insn "*mov<ALLH:mode>"
-+ [(set (match_operand:ALLH 0 "nonimmediate_operand" "=r,r,m,d,*r,q,r")
-+ (match_operand:ALLH 1 "general_operand" "r,m,rL,i,i,r,q"))]
-+ "(register_operand (operands[0],<ALLH:MODE>mode)
-+ || register_operand (operands[1],<ALLH:MODE>mode) || const0_rtx == operands[1])"
- "* return output_movhi (insn, operands, NULL);"
- [(set_attr "length" "2,6,7,2,6,5,2")
- (set_attr "cc" "none,clobber,clobber,none,clobber,none,none")])
-
- (define_peephole2 ; movw
-- [(set (match_operand:QI 0 "even_register_operand" "")
-- (match_operand:QI 1 "even_register_operand" ""))
-- (set (match_operand:QI 2 "odd_register_operand" "")
-- (match_operand:QI 3 "odd_register_operand" ""))]
-+ [(set (match_operand:ALLQ 0 "even_register_operand" "")
-+ (match_operand:ALLQ 1 "even_register_operand" ""))
-+ (set (match_operand:ALLQ 2 "odd_register_operand" "")
-+ (match_operand:ALLQ 3 "odd_register_operand" ""))]
- "(AVR_HAVE_MOVW
- && REGNO (operands[0]) == REGNO (operands[2]) - 1
- && REGNO (operands[1]) == REGNO (operands[3]) - 1)"
-@@ -361,10 +369,10 @@
- })
-
- (define_peephole2 ; movw_r
-- [(set (match_operand:QI 0 "odd_register_operand" "")
-- (match_operand:QI 1 "odd_register_operand" ""))
-- (set (match_operand:QI 2 "even_register_operand" "")
-- (match_operand:QI 3 "even_register_operand" ""))]
-+ [(set (match_operand:ALLQ 0 "odd_register_operand" "")
-+ (match_operand:ALLQ 1 "odd_register_operand" ""))
-+ (set (match_operand:ALLQ 2 "even_register_operand" "")
-+ (match_operand:ALLQ 3 "even_register_operand" ""))]
- "(AVR_HAVE_MOVW
- && REGNO (operands[2]) == REGNO (operands[0]) - 1
- && REGNO (operands[3]) == REGNO (operands[1]) - 1)"
-@@ -377,26 +385,24 @@
- ;;==========================================================================
- ;; move double word (32 bit)
-
--(define_expand "movsi"
-- [(set (match_operand:SI 0 "nonimmediate_operand" "")
-- (match_operand:SI 1 "general_operand" ""))]
-+(define_expand "mov<ALLS:mode>"
-+ [(set (match_operand:ALLS 0 "nonimmediate_operand" "")
-+ (match_operand:ALLS 1 "general_operand" ""))]
- ""
- "
- {
- /* One of the ops has to be in a register. */
-- if (!register_operand (operand0, SImode)
-- && !(register_operand (operand1, SImode) || const0_rtx == operand1))
-+ if (!register_operand (operand0, <ALLS:MODE>mode)
-+ && !(register_operand (operand1, <ALLS:MODE>mode) || const0_rtx == operand1))
- {
-- operands[1] = copy_to_mode_reg (SImode, operand1);
-+ operands[1] = copy_to_mode_reg (<ALLS:MODE>mode, operand1);
- }
- }")
-
--
--
- (define_peephole2 ; movsi_lreg_const
- [(match_scratch:QI 2 "d")
-- (set (match_operand:SI 0 "l_register_operand" "")
-- (match_operand:SI 1 "immediate_operand" ""))
-+ (set (match_operand:ALLS 0 "l_register_operand" "")
-+ (match_operand:ALLS 1 "immediate_operand" ""))
- (match_dup 2)]
- "(operands[1] != const0_rtx
- && operands[1] != constm1_rtx)"
-@@ -406,8 +412,8 @@
-
- ;; '*' because it is not used in rtl generation.
- (define_insn "*reload_insi"
-- [(set (match_operand:SI 0 "register_operand" "=r")
-- (match_operand:SI 1 "immediate_operand" "i"))
-+ [(set (match_operand:ALLS 0 "register_operand" "=r")
-+ (match_operand:ALLS 1 "immediate_operand" "i"))
- (clobber (match_operand:QI 2 "register_operand" "=&d"))]
- "reload_completed"
- "* return output_reload_insisf (insn, operands, NULL);"
-@@ -415,11 +421,11 @@
- (set_attr "cc" "none")])
-
-
--(define_insn "*movsi"
-- [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
-- (match_operand:SI 1 "general_operand" "r,L,Qm,rL,i,i"))]
-- "(register_operand (operands[0],SImode)
-- || register_operand (operands[1],SImode) || const0_rtx == operands[1])"
-+(define_insn "*mov<ALLS:mode>"
-+ [(set (match_operand:ALLS 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
-+ (match_operand:ALLS 1 "general_operand" "r,L,Qm,rL,i,i"))]
-+ "(register_operand (operands[0],<ALLS:MODE>mode)
-+ || register_operand (operands[1],<ALLS:MODE>mode) || const0_rtx == operands[1])"
- "* return output_movsisf (insn, operands, NULL);"
- [(set_attr "length" "4,4,8,9,4,10")
- (set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")])
-@@ -956,23 +962,54 @@
- [(set_attr "type" "xcall")
- (set_attr "cc" "clobber")])
-
--(define_insn "mulqihi3"
-+;; Define code iterators
-+(define_code_iterator any_extend [sign_extend zero_extend])
-+(define_code_attr s [(sign_extend "s") (zero_extend "")])
-+(define_code_attr u [(sign_extend "") (zero_extend "u")])
-+(define_code_attr su [(sign_extend "s") (zero_extend "u")])
-+
-+(define_insn "<any_extend:su>mulqi3_highpart"
-+ [(set (match_operand:QI 0 "register_operand" "=r")
-+ (truncate:QI
-+ (lshiftrt:HI
-+ (mult:HI (any_extend:HI (match_operand:QI 1 "register_operand" "d"))
-+ (any_extend:HI (match_operand:QI 2 "register_operand" "d")))
-+ (const_int 8))))]
-+ "AVR_HAVE_MUL && !optimize_size"
-+ "mul<any_extend:s> %1,%2
-+ mov %0,r1
-+ clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+(define_insn "<any_extend:u>mulqihi3"
- [(set (match_operand:HI 0 "register_operand" "=r")
-- (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "d"))
-- (sign_extend:HI (match_operand:QI 2 "register_operand" "d"))))]
-+ (mult:HI (any_extend:HI (match_operand:QI 1 "register_operand" "d"))
-+ (any_extend:HI (match_operand:QI 2 "register_operand" "d"))))]
- "AVR_HAVE_MUL"
-- "muls %1,%2
-+ "mul<any_extend:s> %1,%2
- movw %0,r0
- clr r1"
- [(set_attr "length" "3")
- (set_attr "cc" "clobber")])
-
--(define_insn "umulqihi3"
-+(define_insn "*sumulqihi3"
- [(set (match_operand:HI 0 "register_operand" "=r")
-- (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
-- (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
-+ (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a"))
-+ (zero_extend:HI (match_operand:QI 2 "register_operand" "a"))))]
- "AVR_HAVE_MUL"
-- "mul %1,%2
-+ "mulsu %1,%2
-+ movw %0,r0
-+ clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+(define_insn "*usmulqihi3"
-+ [(set (match_operand:HI 0 "register_operand" "=r")
-+ (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "a"))
-+ (sign_extend:HI (match_operand:QI 2 "register_operand" "a"))))]
-+ "AVR_HAVE_MUL"
-+ "mulsu %2,%1
- movw %0,r0
- clr r1"
- [(set_attr "length" "3")
-@@ -1026,6 +1063,50 @@
- [(set_attr "type" "xcall")
- (set_attr "cc" "clobber")])
-
-+(define_expand "<any_extend:u>mulhisi3"
-+ [(set (reg:HI 18) (match_operand:SI 1 "register_operand" ""))
-+ (set (reg:HI 20) (match_operand:SI 2 "register_operand" ""))
-+ (set (reg:SI 22)
-+ (mult:SI (any_extend:SI (reg:HI 18))
-+ (any_extend:SI (reg:HI 20))))
-+ (set (match_operand:SI 0 "register_operand" "") (reg:SI 22))]
-+ "!optimize_size"
-+ "")
-+
-+(define_insn "*<any_extend:u>mulhisi3_call"
-+ [(set (reg:SI 22)
-+ (mult:SI (any_extend:SI (reg:HI 18))
-+ (any_extend:SI (reg:HI 20))))]
-+ "!optimize_size"
-+ "%~call __<any_extend:u>mulhisi3"
-+ [(set_attr "type" "xcall")
-+ (set_attr "cc" "clobber")])
-+
-+(define_expand "<any_extend:su>mulhi3_highpart"
-+ [(set (reg:HI 18) (match_operand:HI 1 "register_operand" ""))
-+ (set (reg:HI 20) (match_operand:HI 2 "register_operand" ""))
-+ (set (reg:HI 24) (truncate:HI (lshiftrt:SI
-+ (mult:SI (any_extend:SI (reg:HI 18))
-+ (any_extend:SI (reg:HI 20)))
-+ (const_int 16))))
-+ (set (match_operand:SI 0 "register_operand" "") (reg:HI 24))]
-+ "AVR_HAVE_MUL"
-+ "")
-+
-+(define_insn_and_split "*<any_extend:su>mulhi3_highpart_call"
-+ [(set (reg:HI 24) (truncate:HI (lshiftrt:SI
-+ (mult:SI (any_extend:SI (reg:HI 18))
-+ (any_extend:SI (reg:HI 20)))
-+ (const_int 16))))]
-+ "AVR_HAVE_MUL"
-+ ""
-+ ""
-+ [(set (reg:SI 22)
-+ (mult:SI (any_extend:SI (reg:HI 18))
-+ (any_extend:SI (reg:HI 20))))
-+ (clobber (reg:HI 22))]
-+ "")
-+
- ;; Operand 2 (reg:SI 18) not clobbered on the enhanced core.
- ;; All call-used registers clobbered otherwise - normal library call.
- (define_expand "mulsi3"
-@@ -1574,9 +1655,9 @@
- ;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
- ;; arithmetic shift left
-
--(define_expand "ashlqi3"
-- [(set (match_operand:QI 0 "register_operand" "")
-- (ashift:QI (match_operand:QI 1 "register_operand" "")
-+(define_expand "ashl<ALLQ:mode>3"
-+ [(set (match_operand:ALLQ 0 "register_operand" "")
-+ (ashift:ALLQ (match_operand:ALLQ 1 "register_operand" "")
- (match_operand:QI 2 "general_operand" "")))]
- ""
- "")
-@@ -1610,27 +1691,27 @@
- (set (match_dup 0) (and:QI (match_dup 0) (const_int -64)))]
- "")
-
--(define_insn "*ashlqi3"
-- [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
-- (ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
-+(define_insn "*ashl<ALLQ:mode>3"
-+ [(set (match_operand:ALLQ 0 "register_operand" "=r,r,r,r,!d,r,r")
-+ (ashift:ALLQ (match_operand:ALLQ 1 "register_operand" "0,0,0,0,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
- ""
- "* return ashlqi3_out (insn, operands, NULL);"
- [(set_attr "length" "5,0,1,2,4,6,9")
- (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
-
--(define_insn "ashlhi3"
-- [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
-- (ashift:HI (match_operand:HI 1 "register_operand" "0,0,0,r,0,0,0")
-+(define_insn "ashl<ALLH:mode>3"
-+ [(set (match_operand:ALLH 0 "register_operand" "=r,r,r,r,r,r,r")
-+ (ashift:ALLH (match_operand:ALLH 1 "register_operand" "0,0,0,r,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
- ""
- "* return ashlhi3_out (insn, operands, NULL);"
- [(set_attr "length" "6,0,2,2,4,10,10")
- (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
-
--(define_insn "ashlsi3"
-- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r")
-- (ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
-+(define_insn "ashl<ALLS:mode>3"
-+ [(set (match_operand:ALLS 0 "register_operand" "=r,r,r,r,r,r,r")
-+ (ashift:ALLS (match_operand:ALLS 1 "register_operand" "0,0,0,r,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
- ""
- "* return ashlsi3_out (insn, operands, NULL);"
-@@ -1676,17 +1757,17 @@
-
- (define_peephole2
- [(match_scratch:QI 3 "d")
-- (set (match_operand:HI 0 "register_operand" "")
-- (ashift:HI (match_operand:HI 1 "register_operand" "")
-+ (set (match_operand:ALLH 0 "register_operand" "")
-+ (ashift:ALLH (match_operand:ALLH 1 "register_operand" "")
- (match_operand:QI 2 "const_int_operand" "")))]
- ""
-- [(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2)))
-+ [(parallel [(set (match_dup 0) (ashift:ALLH (match_dup 1) (match_dup 2)))
- (clobber (match_dup 3))])]
- "")
-
--(define_insn "*ashlhi3_const"
-- [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r")
-- (ashift:HI (match_operand:HI 1 "register_operand" "0,0,r,0,0")
-+(define_insn "*ashl<ALLH:mode>3_const"
-+ [(set (match_operand:ALLH 0 "register_operand" "=r,r,r,r,r")
-+ (ashift:ALLH (match_operand:ALLH 1 "register_operand" "0,0,r,0,0")
- (match_operand:QI 2 "const_int_operand" "L,P,O,K,n")))
- (clobber (match_scratch:QI 3 "=X,X,X,X,&d"))]
- "reload_completed"
-@@ -1696,17 +1777,17 @@
-
- (define_peephole2
- [(match_scratch:QI 3 "d")
-- (set (match_operand:SI 0 "register_operand" "")
-- (ashift:SI (match_operand:SI 1 "register_operand" "")
-+ (set (match_operand:ALLS 0 "register_operand" "")
-+ (ashift:ALLS (match_operand:ALLS 1 "register_operand" "")
- (match_operand:QI 2 "const_int_operand" "")))]
- ""
-- [(parallel [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))
-+ [(parallel [(set (match_dup 0) (ashift:ALLS (match_dup 1) (match_dup 2)))
- (clobber (match_dup 3))])]
- "")
-
--(define_insn "*ashlsi3_const"
-- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
-- (ashift:SI (match_operand:SI 1 "register_operand" "0,0,r,0")
-+(define_insn "*ashl<ALLS:mode>3_const"
-+ [(set (match_operand:ALLS 0 "register_operand" "=r,r,r,r")
-+ (ashift:ALLS (match_operand:ALLS 1 "register_operand" "0,0,r,0")
- (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
- (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
- "reload_completed"
-@@ -1717,27 +1798,27 @@
- ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
- ;; arithmetic shift right
-
--(define_insn "ashrqi3"
-- [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r,r")
-- (ashiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0")
-+(define_insn "ashr<ALLQ:mode>3"
-+ [(set (match_operand:ALLQ 0 "register_operand" "=r,r,r,r,r,r")
-+ (ashiftrt:ALLQ (match_operand:ALLQ 1 "register_operand" "0,0,0,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,K,n,Qm")))]
- ""
- "* return ashrqi3_out (insn, operands, NULL);"
- [(set_attr "length" "5,0,1,2,5,9")
- (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber")])
-
--(define_insn "ashrhi3"
-- [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
-- (ashiftrt:HI (match_operand:HI 1 "register_operand" "0,0,0,r,0,0,0")
-+(define_insn "ashr<ALLH:mode>3"
-+ [(set (match_operand:ALLH 0 "register_operand" "=r,r,r,r,r,r,r")
-+ (ashiftrt:ALLH (match_operand:ALLH 1 "register_operand" "0,0,0,r,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
- ""
- "* return ashrhi3_out (insn, operands, NULL);"
- [(set_attr "length" "6,0,2,4,4,10,10")
- (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")])
-
--(define_insn "ashrsi3"
-- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r")
-- (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
-+(define_insn "ashr<ALLS:mode>3"
-+ [(set (match_operand:ALLS 0 "register_operand" "=r,r,r,r,r,r,r")
-+ (ashiftrt:ALLS (match_operand:ALLS 1 "register_operand" "0,0,0,r,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
- ""
- "* return ashrsi3_out (insn, operands, NULL);"
-@@ -1748,17 +1829,17 @@
-
- (define_peephole2
- [(match_scratch:QI 3 "d")
-- (set (match_operand:HI 0 "register_operand" "")
-- (ashiftrt:HI (match_operand:HI 1 "register_operand" "")
-+ (set (match_operand:ALLH 0 "register_operand" "")
-+ (ashiftrt:ALLH (match_operand:ALLH 1 "register_operand" "")
- (match_operand:QI 2 "const_int_operand" "")))]
- ""
-- [(parallel [(set (match_dup 0) (ashiftrt:HI (match_dup 1) (match_dup 2)))
-+ [(parallel [(set (match_dup 0) (ashiftrt:ALLH (match_dup 1) (match_dup 2)))
- (clobber (match_dup 3))])]
- "")
-
- (define_insn "*ashrhi3_const"
-- [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r")
-- (ashiftrt:HI (match_operand:HI 1 "register_operand" "0,0,r,0,0")
-+ [(set (match_operand:ALLH 0 "register_operand" "=r,r,r,r,r")
-+ (ashiftrt:ALLH (match_operand:ALLH 1 "register_operand" "0,0,r,0,0")
- (match_operand:QI 2 "const_int_operand" "L,P,O,K,n")))
- (clobber (match_scratch:QI 3 "=X,X,X,X,&d"))]
- "reload_completed"
-@@ -1768,17 +1849,17 @@
-
- (define_peephole2
- [(match_scratch:QI 3 "d")
-- (set (match_operand:SI 0 "register_operand" "")
-- (ashiftrt:SI (match_operand:SI 1 "register_operand" "")
-+ (set (match_operand:ALLS 0 "register_operand" "")
-+ (ashiftrt:ALLS (match_operand:ALLS 1 "register_operand" "")
- (match_operand:QI 2 "const_int_operand" "")))]
- ""
-- [(parallel [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (match_dup 2)))
-+ [(parallel [(set (match_dup 0) (ashiftrt:ALLS (match_dup 1) (match_dup 2)))
- (clobber (match_dup 3))])]
- "")
-
- (define_insn "*ashrsi3_const"
-- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
-- (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0")
-+ [(set (match_operand:ALLS 0 "register_operand" "=r,r,r,r")
-+ (ashiftrt:ALLS (match_operand:ALLS 1 "register_operand" "0,0,r,0")
- (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
- (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
- "reload_completed"
-@@ -1789,54 +1870,54 @@
- ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
- ;; logical shift right
-
--(define_expand "lshrqi3"
-- [(set (match_operand:QI 0 "register_operand" "")
-- (lshiftrt:QI (match_operand:QI 1 "register_operand" "")
-- (match_operand:QI 2 "general_operand" "")))]
-+(define_expand "lshr<ALLQ:mode>3"
-+ [(set (match_operand:ALLQ 0 "register_operand" "")
-+ (lshiftrt:ALLQ (match_operand:ALLQ 1 "register_operand" "")
-+ (match_operand:ALLQ 2 "general_operand" "")))]
- ""
- "")
-
- (define_split ; lshrqi3_const4
-- [(set (match_operand:QI 0 "d_register_operand" "")
-- (lshiftrt:QI (match_dup 0)
-+ [(set (match_operand:ALLQ 0 "d_register_operand" "")
-+ (lshiftrt:ALLQ (match_dup 0)
- (const_int 4)))]
- ""
-- [(set (match_dup 0) (rotate:QI (match_dup 0) (const_int 4)))
-- (set (match_dup 0) (and:QI (match_dup 0) (const_int 15)))]
-+ [(set (match_dup 0) (rotate:ALLQ (match_dup 0) (const_int 4)))
-+ (set (match_dup 0) (and:ALLQ (match_dup 0) (const_int 15)))]
- "")
-
- (define_split ; lshrqi3_const5
-- [(set (match_operand:QI 0 "d_register_operand" "")
-- (lshiftrt:QI (match_dup 0)
-+ [(set (match_operand:ALLQ 0 "d_register_operand" "")
-+ (lshiftrt:ALLQ (match_dup 0)
- (const_int 5)))]
- ""
-- [(set (match_dup 0) (rotate:QI (match_dup 0) (const_int 4)))
-- (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
-- (set (match_dup 0) (and:QI (match_dup 0) (const_int 7)))]
-+ [(set (match_dup 0) (rotate:ALLQ (match_dup 0) (const_int 4)))
-+ (set (match_dup 0) (lshiftrt:ALLQ (match_dup 0) (const_int 1)))
-+ (set (match_dup 0) (and:ALLQ (match_dup 0) (const_int 7)))]
- "")
-
- (define_split ; lshrqi3_const6
-- [(set (match_operand:QI 0 "d_register_operand" "")
-- (lshiftrt:QI (match_dup 0)
-+ [(set (match_operand:ALLQ 0 "d_register_operand" "")
-+ (lshiftrt:ALLQ (match_dup 0)
- (const_int 6)))]
- ""
-- [(set (match_dup 0) (rotate:QI (match_dup 0) (const_int 4)))
-- (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
-- (set (match_dup 0) (and:QI (match_dup 0) (const_int 3)))]
-+ [(set (match_dup 0) (rotate:ALLQ (match_dup 0) (const_int 4)))
-+ (set (match_dup 0) (lshiftrt:ALLQ (match_dup 0) (const_int 2)))
-+ (set (match_dup 0) (and:ALLQ (match_dup 0) (const_int 3)))]
- "")
-
- (define_insn "*lshrqi3"
-- [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
-- (lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
-- (match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
-+ [(set (match_operand:ALLQ 0 "register_operand" "=r,r,r,r,!d,r,r")
-+ (lshiftrt:ALLQ (match_operand:ALLQ 1 "register_operand" "0,0,0,0,0,0,0")
-+ (match_operand:ALLQ 2 "general_operand" "r,L,P,K,n,n,Qm")))]
- ""
- "* return lshrqi3_out (insn, operands, NULL);"
- [(set_attr "length" "5,0,1,2,4,6,9")
- (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
-
--(define_insn "lshrhi3"
-- [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
-- (lshiftrt:HI (match_operand:HI 1 "register_operand" "0,0,0,r,0,0,0")
-+(define_insn "lshr<ALLH:mode>3"
-+ [(set (match_operand:ALLH 0 "register_operand" "=r,r,r,r,r,r,r")
-+ (lshiftrt:ALLH (match_operand:ALLH 1 "register_operand" "0,0,0,r,0,0,0")
- (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
- ""
- "* return lshrhi3_out (insn, operands, NULL);"
-@@ -1891,17 +1972,17 @@
-
- (define_peephole2
- [(match_scratch:QI 3 "d")
-- (set (match_operand:HI 0 "register_operand" "")
-- (lshiftrt:HI (match_operand:HI 1 "register_operand" "")
-+ (set (match_operand:ALLH 0 "register_operand" "")
-+ (lshiftrt:ALLH (match_operand:ALLH 1 "register_operand" "")
- (match_operand:QI 2 "const_int_operand" "")))]
- ""
-- [(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2)))
-+ [(parallel [(set (match_dup 0) (lshiftrt:ALLH (match_dup 1) (match_dup 2)))
- (clobber (match_dup 3))])]
- "")
-
--(define_insn "*lshrhi3_const"
-- [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r")
-- (lshiftrt:HI (match_operand:HI 1 "register_operand" "0,0,r,0,0")
-+(define_insn "*lshr<ALLH:mode>3_const"
-+ [(set (match_operand:ALLH 0 "register_operand" "=r,r,r,r,r")
-+ (lshiftrt:ALLH (match_operand:ALLH 1 "register_operand" "0,0,r,0,0")
- (match_operand:QI 2 "const_int_operand" "L,P,O,K,n")))
- (clobber (match_scratch:QI 3 "=X,X,X,X,&d"))]
- "reload_completed"
-@@ -1919,9 +2000,9 @@
- (clobber (match_dup 3))])]
- "")
-
--(define_insn "*lshrsi3_const"
-- [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
-- (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0")
-+(define_insn "*lshr<ALLS:mode>3_const"
-+ [(set (match_operand:ALLS 0 "register_operand" "=r,r,r,r")
-+ (lshiftrt:ALLS (match_operand:ALLS 1 "register_operand" "0,0,r,0")
- (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
- (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
- "reload_completed"
-@@ -2171,27 +2252,27 @@
- ;; compare
-
- ; Optimize negated tests into reverse compare if overflow is undefined.
--(define_insn "*negated_tstqi"
-+(define_insn "*negated_tst<ALLQ:mode>"
- [(set (cc0)
-- (compare (neg:QI (match_operand:QI 0 "register_operand" "r"))
-+ (compare (neg:ALLQ (match_operand:ALLQ 0 "register_operand" "r"))
- (const_int 0)))]
- "(!flag_wrapv && !flag_trapv && flag_strict_overflow)"
- "cp __zero_reg__,%0"
- [(set_attr "cc" "compare")
- (set_attr "length" "1")])
-
--(define_insn "*reversed_tstqi"
-+(define_insn "*reversed_tst<ALLQ:mode>"
- [(set (cc0)
- (compare (const_int 0)
-- (match_operand:QI 0 "register_operand" "r")))]
-+ (match_operand:ALLQ 0 "register_operand" "r")))]
- ""
- "cp __zero_reg__,%0"
- [(set_attr "cc" "compare")
- (set_attr "length" "2")])
-
--(define_insn "*negated_tsthi"
-+(define_insn "*negated_tst<ALLH:mode>"
- [(set (cc0)
-- (compare (neg:HI (match_operand:HI 0 "register_operand" "r"))
-+ (compare (neg:ALLH (match_operand:ALLH 0 "register_operand" "r"))
- (const_int 0)))]
- "(!flag_wrapv && !flag_trapv && flag_strict_overflow)"
- "cp __zero_reg__,%A0
-@@ -2201,10 +2282,10 @@
-
- ;; Leave here the clobber used by the cmphi pattern for simplicity, even
- ;; though it is unused, because this pattern is synthesized by avr_reorg.
--(define_insn "*reversed_tsthi"
-+(define_insn "*reversed_tst<ALLH:mode>"
- [(set (cc0)
- (compare (const_int 0)
-- (match_operand:HI 0 "register_operand" "r")))
-+ (match_operand:ALLH 0 "register_operand" "r")))
- (clobber (match_scratch:QI 1 "=X"))]
- ""
- "cp __zero_reg__,%A0
-@@ -2212,9 +2293,9 @@
- [(set_attr "cc" "compare")
- (set_attr "length" "2")])
-
--(define_insn "*negated_tstsi"
-+(define_insn "*negated_tst<ALLS:mode>"
- [(set (cc0)
-- (compare (neg:SI (match_operand:SI 0 "register_operand" "r"))
-+ (compare (neg:ALLS (match_operand:ALLS 0 "register_operand" "r"))
- (const_int 0)))]
- "(!flag_wrapv && !flag_trapv && flag_strict_overflow)"
- "cp __zero_reg__,%A0
-@@ -2224,10 +2305,10 @@
- [(set_attr "cc" "compare")
- (set_attr "length" "4")])
-
--(define_insn "*reversed_tstsi"
-+(define_insn "*reversed_tst<ALLS:mode>"
- [(set (cc0)
- (compare (const_int 0)
-- (match_operand:SI 0 "register_operand" "r")))
-+ (match_operand:ALLS 0 "register_operand" "r")))
- (clobber (match_scratch:QI 1 "=X"))]
- ""
- "cp __zero_reg__,%A0
-@@ -2238,10 +2319,10 @@
- (set_attr "length" "4")])
-
-
--(define_insn "*cmpqi"
-+(define_insn "*cmp<ALLQ:mode>"
- [(set (cc0)
-- (compare (match_operand:QI 0 "register_operand" "r,r,d")
-- (match_operand:QI 1 "nonmemory_operand" "L,r,i")))]
-+ (compare (match_operand:ALLQ 0 "register_operand" "r,r,d")
-+ (match_operand:ALLQ 1 "nonmemory_operand" "L,r,i")))]
- ""
- "@
- tst %0
-@@ -2260,10 +2341,10 @@
- [(set_attr "cc" "compare")
- (set_attr "length" "1")])
-
--(define_insn "*cmphi"
-+(define_insn "*cmp<ALLH:mode>"
- [(set (cc0)
-- (compare (match_operand:HI 0 "register_operand" "!w,r,r,d,d,r,r")
-- (match_operand:HI 1 "nonmemory_operand" "L,L,r,M,i,M,i")))
-+ (compare (match_operand:ALLH 0 "register_operand" "!w,r,r,d,d,r,r")
-+ (match_operand:ALLH 1 "nonmemory_operand" "L,L,r,M,i,M,i")))
- (clobber (match_scratch:QI 2 "=X,X,X,X,&d,&d,&d"))]
- ""
- "*{
-@@ -2308,10 +2389,10 @@
- (set_attr "length" "1,2,2,2,3,3,4")])
-
-
--(define_insn "*cmpsi"
-+(define_insn "*cmp<ALLS:mode>"
- [(set (cc0)
-- (compare (match_operand:SI 0 "register_operand" "r,r,d,d,r,r")
-- (match_operand:SI 1 "nonmemory_operand" "L,r,M,i,M,i")))
-+ (compare (match_operand:ALLS 0 "register_operand" "r,r,d,d,r,r")
-+ (match_operand:ALLS 1 "nonmemory_operand" "L,r,M,i,M,i")))
- (clobber (match_scratch:QI 2 "=X,X,X,&d,&d,&d"))]
- ""
- "*{
-diff -Naurp gcc/config/avr/avr-modes.def gcc/config/avr/avr-modes.def
---- gcc/config/avr/avr-modes.def 1970-01-01 05:30:00.000000000 +0530
-+++ gcc/config/avr/avr-modes.def 2011-10-27 16:55:55.000000000 +0530
-@@ -0,0 +1,34 @@
-+/* Definitions of target machine for GCC for AVR.
-+ Copyright (C) 2009 Free Software Foundation, Inc.
-+
-+This file is part of GCC.
-+
-+GCC is free software; you can redistribute it and/or modify
-+it under the terms of the GNU General Public License as published by
-+the Free Software Foundation; either version 3, or (at your option)
-+any later version.
-+
-+GCC is distributed in the hope that it will be useful,
-+but WITHOUT ANY WARRANTY; without even the implied warranty of
-+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+GNU General Public License for more details.
-+
-+You should have received a copy of the GNU General Public License
-+along with GCC; see the file COPYING3. If not see
-+<http://www.gnu.org/licenses/>. */
-+
-+/* On 8 bit machines it requires fewer instructions for fixed point
-+ routines if the decimal place is on a byte boundary which is not
-+ the default for signed accum types. */
-+
-+ADJUST_IBIT (HA, 7);
-+ADJUST_FBIT (HA, 8);
-+
-+ADJUST_IBIT (SA, 15);
-+ADJUST_FBIT (SA, 16);
-+
-+ADJUST_IBIT (DA, 31);
-+ADJUST_FBIT (DA, 32);
-+
-+ADJUST_IBIT (TA, 63);
-+ADJUST_FBIT (TA, 64);
-diff -Naurp gcc/config/avr/avr-protos.h gcc/config/avr/avr-protos.h
---- gcc/config/avr/avr-protos.h 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/config/avr/avr-protos.h 2011-10-27 16:55:55.000000000 +0530
-@@ -75,6 +75,8 @@ extern const char *lshrhi3_out (rtx insn
- extern const char *lshrsi3_out (rtx insn, rtx operands[], int *len);
- extern bool avr_rotate_bytes (rtx operands[]);
-
-+extern const char *fract_out (rtx insn, rtx operands[], int intsigned, int *l);
-+
- extern void expand_prologue (void);
- extern void expand_epilogue (void);
- extern int avr_epilogue_uses (int regno);
-diff -Naurp gcc/config/avr/libgcc-fixed.S gcc/config/avr/libgcc-fixed.S
---- gcc/config/avr/libgcc-fixed.S 1970-01-01 05:30:00.000000000 +0530
-+++ gcc/config/avr/libgcc-fixed.S 2011-10-27 16:55:55.000000000 +0530
-@@ -0,0 +1,1123 @@
-+/* -*- Mode: Asm -*- */
-+/* Copyright (C) 2009
-+ Free Software Foundation, Inc.
-+ Contributed by Sean D'Epagnier
-+
-+This file is free software; you can redistribute it and/or modify it
-+under the terms of the GNU General Public License as published by the
-+Free Software Foundation; either version 3, or (at your option) any
-+later version.
-+
-+In addition to the permissions in the GNU General Public License, the
-+Free Software Foundation gives you unlimited permission to link the
-+compiled version of this file into combinations with other programs,
-+and to distribute those combinations without any restriction coming
-+from the use of this file. (The General Public License restrictions
-+do apply in other respects; for example, they cover modification of
-+the file, and distribution when not linked into a combine
-+executable.)
-+
-+This file is distributed in the hope that it will be useful, but
-+WITHOUT ANY WARRANTY; without even the implied warranty of
-+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+General Public License for more details.
-+
-+You should have received a copy of the GNU General Public License
-+along with this program; see the file COPYING. If not, write to
-+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-+Boston, MA 02110-1301, USA. */
-+
-+/* Fixed point library routines for avr. */
-+
-+#define __zero_reg__ r1
-+#define __tmp_reg__ r0
-+#define __SREG__ 0x3f
-+#define __SP_H__ 0x3e
-+#define __SP_L__ 0x3d
-+#define __RAMPZ__ 0x3B
-+
-+/* Conversions to float. */
-+#if defined (L_fractqqsf)
-+ .global __fractqqsf
-+ .func __fractqqsf
-+__fractqqsf:
-+ clr r25
-+ sbrc r24, 7 ; if negative
-+ ser r25 ; sign extend
-+ mov r23, r24 ; move in place
-+ mov r24, r25 ; sign extend lower byte
-+ lsl r23
-+ clr r22
-+ rjmp __fractsasf ; call larger conversion
-+.endfunc
-+#endif /* defined (L_fractqqsf) */
-+
-+#if defined (L_fractuqqsf)
-+ .global __fractuqqsf
-+ .func __fractuqqsf
-+__fractuqqsf:
-+ clr r22
-+ mov r23, r24
-+ clr r24
-+ clr r25
-+ rjmp __fractsasf ; call larger conversion
-+.endfunc
-+#endif /* defined (L_fractuqqsf) */
-+
-+#if defined (L_fracthqsf)
-+ .global __fracthqsf
-+ .func __fracthqsf
-+__fracthqsf:
-+ mov_l r22, r24 ; put fractional part in place
-+ mov_h r23, r25
-+ clr r25
-+ sbrc r23, 7 ; if negative
-+ ser r25 ; sign extend
-+ mov r24, r25 ; sign extend lower byte
-+ lsl r22
-+ rol r23
-+ rjmp __fractsasf ; call larger conversion
-+.endfunc
-+#endif /* defined (L_fracthqsf) */
-+
-+#if defined (L_fractuhqsf)
-+ .global __fractuhqsf
-+ .func __fractuhqsf
-+__fractuhqsf:
-+ mov_l r22, r24 ; put fractional part in place
-+ mov_h r23, r25
-+ clr r24
-+ clr r25
-+ rjmp __fractsasf ; call larger conversion
-+.endfunc
-+#endif /* defined (L_fractuhqsf) */
-+
-+#if defined (L_fracthasf)
-+ .global __fracthasf
-+ .func __fracthasf
-+__fracthasf:
-+ clr r22
-+ mov r23, r24 ; move into place
-+ mov r24, r25
-+ clr r25
-+ sbrc r24, 7 ; if negative
-+ ser r25 ; sign extend
-+ rjmp __fractsasf ; call larger conversion
-+#endif /* defined (L_fracthasf) */
-+
-+#if defined (L_fractuhasf)
-+ .global __fractuhasf
-+ .func __fractuhasf
-+__fractuhasf:
-+ clr r22
-+ mov r23, r24 ; move into place
-+ rjmp __fractsasf ; call larger conversion
-+.endfunc
-+#endif /* defined (L_fractuhasf) */
-+
-+#if defined (L_fractsasf)
-+ .global __fractsasf
-+ .func __fractsasf
-+__fractsasf:
-+ rcall __floatsisf
-+ tst r25
-+ breq __fractsasf_exit ; skip if zero
-+ subi r25, 0x08 ; adjust exponent
-+__fractsasf_exit:
-+ ret
-+.endfunc
-+#endif /* defined (L_fractsasf) */
-+
-+#if defined (L_fractusasf)
-+ .global __fractusasf
-+ .func __fractusasf
-+__fractusasf:
-+ rcall __floatunsisf
-+ tst r25
-+ breq __fractusasf_exit ; skip if zero
-+ subi r25, 0x08 ; adjust exponent
-+__fractusasf_exit:
-+ ret
-+.endfunc
-+#endif /* defined (L_fractusasf) */
-+
-+#if defined (L_fractsfqq) /* Conversions from float. */
-+ .global __fractsfqq
-+ .func __fractsfqq
-+__fractsfqq:
-+ subi r25, -11 ; adjust exponent
-+ subi r24, 128
-+ rjmp __fixsfsi
-+.endfunc
-+#endif /* defined (L_fractqq) */
-+
-+#if defined (L_fractsfuqq)
-+ .global __fractsfuqq
-+ .func __fractsfuqq
-+__fractsfuqq:
-+ subi r25, -12 ; adjust exponent
-+ rjmp __fixsfsi
-+.endfunc
-+#endif /* defined (L_fractuqq) */
-+
-+#if defined (L_fractsfhq)
-+ .global __fractsfhq
-+ .func __fractsfhq
-+__fractsfhq:
-+ subi r25, -15 ; adjust exponent
-+ subi r24, 128
-+ rjmp __fixsfsi
-+.endfunc
-+#endif /* defined (L_fractsfhq) */
-+
-+#if defined (L_fractsfuhq)
-+ .global __fractsfuhq
-+ .func __fractsfuhq
-+__fractsfuhq:
-+ subi r25, -16 ; adjust exponent
-+ rjmp __fixsfsi
-+.endfunc
-+#endif /* defined (L_fractsfuhq) */
-+
-+#if defined (L_fractsfha)
-+ .global __fractsfha
-+ .func __fractsfha
-+__fractsfha:
-+.endfunc
-+ .global __fractsfuha
-+ .func __fractsfuha
-+__fractsfuha:
-+ subi r25, -12 ; adjust exponent
-+ rjmp __fixsfsi
-+.endfunc
-+#endif /* defined (L_fractsfha) */
-+
-+#if defined (L_fractsfsa)
-+ .global __fractsfsa
-+ .func __fractsfsa
-+__fractsfsa:
-+.endfunc
-+ .global __fractsfusa
-+ .func __fractsfusa
-+__fractsfusa:
-+ subi r25, -8 ; adjust exponent
-+ rjmp __fixsfsi
-+.endfunc
-+#endif /* defined (L_fractsfsa) */
-+
-+/* For multiplication the functions here are called directly from
-+ avr-fixed.md patterns, instead of using the standard libcall mechanisms.
-+ This can make better code because GCC knows exactly which
-+ of the call-used registers (not all of them) are clobbered. */
-+
-+/* mulqq and muluqq open coded on the enhanced core */
-+#if !defined (__AVR_HAVE_MUL__)
-+/*******************************************************
-+ Fractional Multiplication 8 x 8
-+*******************************************************/
-+#define r_arg2 r22 /* multiplicand */
-+#define r_arg1 r24 /* multiplier */
-+#define r_res __tmp_reg__ /* result */
-+
-+#if defined (L_mulqq3)
-+ .global __mulqq3
-+ .func __mulqq3
-+__mulqq3:
-+ mov r_res, r_arg1
-+ eor r_res, r_arg2
-+ bst r_res, 7
-+ lsl r_arg1
-+ lsl r_arg2
-+ brcc __mulqq3_skipneg
-+ neg r_arg2
-+__mulqq3_skipneg:
-+ rcall __muluqq3
-+ lsr r_arg1
-+ brtc __mulqq3_exit
-+ neg r_arg1
-+__mulqq3_exit:
-+ ret
-+
-+.endfunc
-+#endif /* defined (L_mulqq3) */
-+
-+#if defined (L_muluqq3)
-+ .global __muluqq3
-+ .func __muluqq3
-+__muluqq3:
-+ clr r_res ; clear result
-+__muluqq3_loop:
-+ lsr r_arg2 ; shift multiplicand
-+ sbrc r_arg1,7
-+ add r_res,r_arg2
-+ breq __muluqq3_exit ; while multiplicand != 0
-+ lsl r_arg1
-+ brne __muluqq3_loop ; exit if multiplier = 0
-+__muluqq3_exit:
-+ mov r_arg1,r_res ; result to return register
-+ ret
-+#undef r_arg2
-+#undef r_arg1
-+#undef r_res
-+
-+.endfunc
-+#endif /* defined (L_muluqq3) */
-+#endif /* !defined (__AVR_HAVE_MUL__) */
-+
-+/*******************************************************
-+ Fractional Multiplication 16 x 16
-+*******************************************************/
-+
-+#if defined (__AVR_HAVE_MUL__)
-+#define r_arg1L r22 /* multiplier Low */
-+#define r_arg1H r23 /* multiplier High */
-+#define r_arg2L r20 /* multiplicand Low */
-+#define r_arg2H r21 /* multiplicand High */
-+#define r_resL r18 /* result Low */
-+#define r_resH r19 /* result High */
-+
-+#if defined (L_mulhq3)
-+ .global __mulhq3
-+ .func __mulhq3
-+__mulhq3:
-+ fmuls r_arg1H, r_arg2H
-+ movw r_resL, r0
-+ fmulsu r_arg2H, r_arg1L
-+ clr r_arg1L
-+ sbc r_resH, r_arg1L
-+ add r_resL, r1
-+ adc r_resH, r_arg1L
-+ fmulsu r_arg1H, r_arg2L
-+ sbc r_resH, r_arg1L
-+ add r_resL, r1
-+ adc r_resH, r_arg1L
-+ clr __zero_reg__
-+ ret
-+.endfunc
-+#endif /* defined (L_mulhq3) */
-+
-+#if defined (L_muluhq3)
-+ .global __muluhq3
-+ .func __muluhq3
-+__muluhq3:
-+ mul r_arg1H, r_arg2H
-+ movw r_resL, r0
-+ mul r_arg1H, r_arg2L
-+ add r_resL, r1
-+ clr __zero_reg__
-+ adc r_resH, __zero_reg__
-+ mul r_arg1L, r_arg2H
-+ add r_resL, r1
-+ clr __zero_reg__
-+ adc r_resH, __zero_reg__
-+ ret
-+.endfunc
-+#endif /* defined (L_muluhq3) */
-+
-+#else
-+#define r_arg1L r24 /* multiplier Low */
-+#define r_arg1H r25 /* multiplier High */
-+#define r_arg2L r22 /* multiplicand Low */
-+#define r_arg2H r23 /* multiplicand High */
-+#define r_resL __tmp_reg__ /* result Low */
-+#define r_resH __zero_reg__ /* result High */
-+
-+#if defined (L_mulhq3)
-+ .global __mulhq3
-+ .func __mulhq3
-+__mulhq3:
-+ mov r_resL, r_arg1H
-+ eor r_resL, r_arg2H
-+ bst r_resL, 7
-+ lsl r_arg1L
-+ rol r_arg1H
-+ lsl r_arg2L
-+ rol r_arg2H
-+ brcc mulhq3_skipneg
-+ com r_arg2H
-+ neg r_arg2L
-+ sbci r_arg2H, -1
-+mulhq3_skipneg:
-+ rcall __muluhq3
-+ lsr r_arg1H
-+ ror r_arg1L
-+ brtc mulhq3_exit
-+ com r_arg1H
-+ neg r_arg1L
-+ sbci r_arg1H, -1
-+mulhq3_exit:
-+ ret
-+.endfunc
-+#endif /* defined (L_mulhq3) */
-+
-+#if defined (L_muluhq3)
-+ .global __muluhq3
-+ .func __muluhq3
-+__muluhq3:
-+ clr r_resL ; clear result
-+__muluhq3_loop:
-+ lsr r_arg2H ; shift multiplicand
-+ ror r_arg2L
-+ sbrs r_arg1H,7
-+ rjmp __muluhq3_skip
-+ add r_resL,r_arg2L ; result + multiplicand
-+ adc r_resH,r_arg2H
-+__muluhq3_skip:
-+ lsl r_arg1L ; shift multiplier
-+ rol r_arg1H
-+ brne __muluhq3_loop
-+ cpi r_arg1L, 0
-+ brne __muluhq3_loop ; exit multiplier = 0
-+ mov_l r_arg1L,r_resL
-+ mov_h r_arg1H,r_resH ; result to return register
-+ clr __zero_reg__ ; zero the zero reg
-+ ret
-+.endfunc
-+#endif /* defined (L_muluhq3) */
-+
-+#endif /* defined (__AVR_HAVE_MUL__) */
-+
-+#undef r_arg1L
-+#undef r_arg1H
-+#undef r_arg2L
-+#undef r_arg2H
-+#undef r_resL
-+#undef r_resH
-+
-+/*******************************************************
-+ Fixed Multiplication 8.8 x 8.8
-+*******************************************************/
-+
-+#if defined (__AVR_HAVE_MUL__)
-+#define r_arg1L r22 /* multiplier Low */
-+#define r_arg1H r23 /* multiplier High */
-+#define r_arg2L r20 /* multiplicand Low */
-+#define r_arg2H r21 /* multiplicand High */
-+#define r_resL r18 /* result Low */
-+#define r_resH r19 /* result High */
-+
-+#if defined (L_mulha3)
-+ .global __mulha3
-+ .func __mulha3
-+__mulha3:
-+ mul r_arg1L, r_arg2L
-+ mov r_resL, r1
-+ muls r_arg1H, r_arg2H
-+ mov r_resH, r0
-+ mulsu r_arg1H, r_arg2L
-+ add r_resL, r0
-+ adc r_resH, r1
-+ mulsu r_arg2H, r_arg1L
-+ add r_resL, r0
-+ adc r_resH, r1
-+ clr __zero_reg__
-+ ret
-+.endfunc
-+#endif /* defined (L_mulha3) */
-+
-+#if defined (L_muluha3)
-+ .global __muluha3
-+ .func __muluha3
-+__muluha3:
-+ mul r_arg1L, r_arg2L
-+ mov r_resL, r1
-+ mul r_arg1H, r_arg2H
-+ mov r_resH, r0
-+ mul r_arg1H, r_arg2L
-+ add r_resL, r0
-+ adc r_resH, r1
-+ mul r_arg1L, r_arg2H
-+ add r_resL, r0
-+ adc r_resH, r1
-+ clr __zero_reg__
-+ ret
-+.endfunc
-+#endif /* defined (L_muluha3) */
-+
-+#else
-+
-+#define r_arg1L r24 /* multiplier Low */
-+#define r_arg1H r25 /* multiplier High */
-+#define r_arg2L r22 /* multiplicand Low */
-+#define r_arg2H r23 /* multiplicand High */
-+#define r_resL r18 /* result Low */
-+#define r_resH r19 /* result High */
-+#define r_scratchL r0 /* scratch Low */
-+#define r_scratchH r1
-+
-+#if defined (L_mulha3)
-+ .global __mulha3
-+ .func __mulha3
-+__mulha3:
-+ mov r_resL, r_arg1H
-+ eor r_resL, r_arg2H
-+ bst r_resL, 7
-+ sbrs r_arg1H, 7
-+ rjmp __mulha3_arg1pos
-+ com r_arg1H
-+ neg r_arg1L
-+ sbci r_arg1H,-1
-+__mulha3_arg1pos:
-+ sbrs r_arg2H, 7
-+ rjmp __mulha3_arg2pos
-+ com r_arg2H
-+ neg r_arg2L
-+ sbci r_arg2H,-1
-+__mulha3_arg2pos:
-+ rcall __muluha3
-+ brtc __mulha3_exit
-+ com r_resH
-+ neg r_resL
-+ sbci r_resH,-1
-+__mulha3_exit:
-+ ret
-+.endfunc
-+#endif /* defined (L_mulha3) */
-+
-+#if defined (L_muluha3)
-+ .global __muluha3
-+ .func __muluha3
-+__muluha3:
-+ clr r_resL ; clear result
-+ clr r_resH
-+ mov_l r0, r_arg1L ; save multiplicand
-+ mov_h r1, r_arg1H
-+__muluha3_loop1:
-+ sbrs r_arg2H,0
-+ rjmp __muluha3_skip1
-+ add r_resL,r_arg1L ; result + multiplicand
-+ adc r_resH,r_arg1H
-+__muluha3_skip1:
-+ lsl r_arg1L ; shift multiplicand
-+ rol r_arg1H
-+ sbiw r_arg1L,0
-+ breq __muluha3_loop1_done ; exit multiplicand = 0
-+ lsr r_arg2H
-+ brne __muluha3_loop1 ; exit multiplier = 0
-+__muluha3_loop1_done:
-+ mov_l r_arg1L, r_scratchL ; restore multiplicand
-+ mov_h r_arg1H, r_scratchH
-+__muluha3_loop2:
-+ lsr r_arg1H ; shift multiplicand
-+ ror r_arg1L
-+ sbiw r_arg1L,0
-+ breq __muluha3_exit ; exit if multiplicand = 0
-+ sbrs r_arg2L,7
-+ rjmp __muluha3_skip2
-+ add r_resL,r_arg1L ; result + multiplicand
-+ adc r_resH,r_arg1H
-+__muluha3_skip2:
-+ lsl r_arg2L
-+ brne __muluha3_loop2 ; exit if multiplier = 0
-+__muluha3_exit:
-+ clr __zero_reg__ ; got clobbered
-+ ret
-+.endfunc
-+#endif /* defined (L_muluha3) */
-+
-+#endif /* defined (__AVR_HAVE_MUL__) */
-+
-+#undef r_arg1L
-+#undef r_arg1H
-+#undef r_arg2L
-+#undef r_arg2H
-+#undef r_resL
-+#undef r_resH
-+
-+/*******************************************************
-+ Fixed Multiplication 16.16 x 16.16
-+*******************************************************/
-+
-+#if defined (__AVR_HAVE_MUL__)
-+/* uses nonstandard registers because mulus only works from 16-23 */
-+#define r_clr r15
-+
-+#define r_arg1L r16 /* multiplier Low */
-+#define r_arg1H r17
-+#define r_arg1HL r18
-+#define r_arg1HH r19 /* multiplier High */
-+
-+#define r_arg2L r20 /* multiplicand Low */
-+#define r_arg2H r21
-+#define r_arg2HL r22
-+#define r_arg2HH r23 /* multiplicand High */
-+
-+#define r_resL r24 /* result Low */
-+#define r_resH r25
-+#define r_resHL r26
-+#define r_resHH r27 /* result High */
-+
-+#if defined (L_mulsa3)
-+ .global __mulsa3
-+ .func __mulsa3
-+__mulsa3:
-+ clr r_clr
-+ clr r_resH
-+ clr r_resHL
-+ clr r_resHH
-+ mul r_arg1H, r_arg2L
-+ mov r_resL, r1
-+ mul r_arg1L, r_arg2H
-+ add r_resL, r1
-+ adc r_resH, r_clr
-+ mul r_arg1L, r_arg2HL
-+ add r_resL, r0
-+ adc r_resH, r1
-+ adc r_resHL, r_clr
-+ mul r_arg1H, r_arg2H
-+ add r_resL, r0
-+ adc r_resH, r1
-+ adc r_resHL, r_clr
-+ mul r_arg1HL, r_arg2L
-+ add r_resL, r0
-+ adc r_resH, r1
-+ adc r_resHL, r_clr
-+ mulsu r_arg2HH, r_arg1L
-+ sbc r_resHH, r_clr
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mul r_arg1H, r_arg2HL
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mul r_arg1HL, r_arg2H
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mulsu r_arg1HH, r_arg2L
-+ sbc r_resHH, r_clr
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mulsu r_arg2HH, r_arg1H
-+ add r_resHL, r0
-+ adc r_resHH, r1
-+ mul r_arg1HL, r_arg2HL
-+ add r_resHL, r0
-+ adc r_resHH, r1
-+ mulsu r_arg1HH, r_arg2H
-+ add r_resHL, r0
-+ adc r_resHH, r1
-+ mulsu r_arg2HH, r_arg1HL
-+ add r_resHH, r0
-+ mulsu r_arg1HH, r_arg2HL
-+ add r_resHH, r0
-+ clr __zero_reg__
-+ ret
-+.endfunc
-+#endif
-+
-+#if defined (L_mulusa3)
-+ .global __mulusa3
-+ .func __mulusa3
-+__mulusa3:
-+ clr r_clr
-+ clr r_resH
-+ clr r_resHL
-+ clr r_resHH
-+ mul r_arg1H, r_arg2L
-+ mov r_resL, r1
-+ mul r_arg1L, r_arg2H
-+ add r_resL, r1
-+ adc r_resH, r_clr
-+ mul r_arg1L, r_arg2HL
-+ add r_resL, r0
-+ adc r_resH, r1
-+ adc r_resHL, r_clr
-+ mul r_arg1H, r_arg2H
-+ add r_resL, r0
-+ adc r_resH, r1
-+ adc r_resHL, r_clr
-+ mul r_arg1HL, r_arg2L
-+ add r_resL, r0
-+ adc r_resH, r1
-+ adc r_resHL, r_clr
-+ mul r_arg1L, r_arg2HH
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mul r_arg1H, r_arg2HL
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mul r_arg1HL, r_arg2H
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mul r_arg1HH, r_arg2L
-+ add r_resH, r0
-+ adc r_resHL, r1
-+ adc r_resHH, r_clr
-+ mul r_arg1H, r_arg2HH
-+ add r_resHL, r0
-+ adc r_resHH, r1
-+ mul r_arg1HL, r_arg2HL
-+ add r_resHL, r0
-+ adc r_resHH, r1
-+ mul r_arg1HH, r_arg2H
-+ add r_resHL, r0
-+ adc r_resHH, r1
-+ mul r_arg1HL, r_arg2HH
-+ add r_resHH, r0
-+ mul r_arg1HH, r_arg2HL
-+ add r_resHH, r0
-+ clr __zero_reg__
-+ ret
-+.endfunc
-+#endif
-+
-+#else
-+
-+#define r_arg1L r18 /* multiplier Low */
-+#define r_arg1H r19
-+#define r_arg1HL r20
-+#define r_arg1HH r21 /* multiplier High */
-+
-+/* these registers needed for sbiw */
-+#define r_arg2L r24 /* multiplicand Low */
-+#define r_arg2H r25
-+#define r_arg2HL r26
-+#define r_arg2HH r27 /* multiplicand High */
-+
-+#define r_resL r14 /* result Low */
-+#define r_resH r15
-+#define r_resHL r16
-+#define r_resHH r17 /* result High */
-+
-+#define r_scratchL r0 /* scratch Low */
-+#define r_scratchH r1
-+#define r_scratchHL r22
-+#define r_scratchHH r23 /* scratch High */
-+
-+#if defined (L_mulsa3)
-+ .global __mulsa3
-+ .func __mulsa3
-+__mulsa3:
-+ mov r_resL, r_arg1HH
-+ eor r_resL, r_arg2HH
-+ bst r_resL, 7
-+ sbrs r_arg1HH, 7
-+ rjmp __mulsa3_arg1pos
-+ com r_arg1HH
-+ com r_arg1HL
-+ com r_arg1H
-+ neg r_arg1L
-+ sbci r_arg1H,-1
-+ sbci r_arg1HL,-1
-+ sbci r_arg1HH,-1
-+__mulsa3_arg1pos:
-+ sbrs r_arg2HH, 7
-+ rjmp __mulsa3_arg2pos
-+ com r_arg2HH
-+ com r_arg2HL
-+ com r_arg2H
-+ neg r_arg2L
-+ sbci r_arg2H,-1
-+ sbci r_arg2HL,-1
-+ sbci r_arg2HH,-1
-+__mulsa3_arg2pos:
-+ rcall __mulusa3
-+ brtc __mulsa3_exit
-+ com r_resHH
-+ com r_resHL
-+ com r_resH
-+ com r_resL
-+ adc r_resL,__zero_reg__
-+ adc r_resH,__zero_reg__
-+ adc r_resHL,__zero_reg__
-+ adc r_resHH,__zero_reg__
-+__mulsa3_exit:
-+ ret
-+.endfunc
-+#endif /* defined (L_mulsa3) */
-+
-+#if defined (L_mulusa3)
-+ .global __mulusa3
-+ .func __mulusa3
-+__mulusa3:
-+ clr r_resL ; clear result
-+ clr r_resH
-+ mov_l r_resHL, r_resL
-+ mov_h r_resHH, r_resH
-+ mov_l r_scratchL, r_arg1L ; save multiplicand
-+ mov_h r_scratchH, r_arg1H
-+ mov_l r_scratchHL, r_arg1HL
-+ mov_h r_scratchHH, r_arg1HH
-+__mulusa3_loop1:
-+ sbrs r_arg2HL,0
-+ rjmp __mulusa3_skip1
-+ add r_resL,r_arg1L ; result + multiplicand
-+ adc r_resH,r_arg1H
-+ adc r_resHL,r_arg1HL
-+ adc r_resHH,r_arg1HH
-+__mulusa3_skip1:
-+ lsl r_arg1L ; shift multiplicand
-+ rol r_arg1H
-+ rol r_arg1HL
-+ rol r_arg1HH
-+ lsr r_arg2HH
-+ ror r_arg2HL
-+ sbiw r_arg2HL,0
-+ brne __mulusa3_loop1 ; exit multiplier = 0
-+__mulusa3_loop1_done:
-+ mov_l r_arg1L, r_scratchL ; restore multiplicand
-+ mov_h r_arg1H, r_scratchH
-+ mov_l r_arg1HL, r_scratchHL
-+ mov_h r_arg1HH, r_scratchHH
-+__mulusa3_loop2:
-+ lsr r_arg1HH ; shift multiplicand
-+ ror r_arg1HL
-+ ror r_arg1H
-+ ror r_arg1L
-+ sbrs r_arg2H,7
-+ rjmp __mulusa3_skip2
-+ add r_resL,r_arg1L ; result + multiplicand
-+ adc r_resH,r_arg1H
-+ adc r_resHL,r_arg1HL
-+ adc r_resHH,r_arg1HH
-+__mulusa3_skip2:
-+ lsl r_arg2L
-+ rol r_arg2H
-+ sbiw r_arg2L,0
-+ brne __mulusa3_loop2 ; exit if multiplier = 0
-+__mulusa3_exit:
-+ clr __zero_reg__ ; got clobbered
-+ ret
-+.endfunc
-+#endif /* defined (L_mulusa3) */
-+
-+#undef r_scratchL
-+#undef r_scratchH
-+#undef r_scratchHL
-+#undef r_scratchHH
-+
-+#endif
-+
-+#undef r_arg1L
-+#undef r_arg1H
-+#undef r_arg1HL
-+#undef r_arg1HH
-+
-+#undef r_arg2L
-+#undef r_arg2H
-+#undef r_arg2HL
-+#undef r_arg2HH
-+
-+#undef r_resL
-+#undef r_resH
-+#undef r_resHL
-+#undef r_resHH
-+
-+/*******************************************************
-+ Fractional Division 8 / 8
-+*******************************************************/
-+#define r_divd r25 /* dividend */
-+#define r_quo r24 /* quotient */
-+#define r_div r22 /* divisor */
-+#define r_cnt r23 /* loop count */
-+
-+#if defined (L_divqq3)
-+ .global __divqq3
-+ .func __divqq3
-+__divqq3:
-+ mov r0, r_divd
-+ eor r0, r_div
-+ sbrc r_div, 7
-+ neg r_div
-+ sbrc r_divd, 7
-+ neg r_divd
-+ cp r_divd, r_div
-+ breq __divqq3_minus1 ; if equal return -1
-+ rcall __udivuqq3
-+ lsr r_quo
-+ sbrc r0, 7 ; negate result if needed
-+ neg r_quo
-+ ret
-+__divqq3_minus1:
-+ ldi r_quo, 0x80
-+ ret
-+.endfunc
-+#endif /* defined (L_divqq3) */
-+
-+#if defined (L_udivuqq3)
-+ .global __udivuqq3
-+ .func __udivuqq3
-+__udivuqq3:
-+ clr r_quo ; clear quotient
-+ ldi r_cnt,8 ; init loop counter
-+__udivuqq3_loop:
-+ lsl r_divd ; shift dividend
-+ brcs __udivuqq3_ep ; dividend overflow
-+ cp r_divd,r_div ; compare dividend & divisor
-+ brcc __udivuqq3_ep ; dividend >= divisor
-+ rol r_quo ; shift quotient (with CARRY)
-+ rjmp __udivuqq3_cont
-+__udivuqq3_ep:
-+ sub r_divd,r_div ; restore dividend
-+ lsl r_quo ; shift quotient (without CARRY)
-+__udivuqq3_cont:
-+ dec r_cnt ; decrement loop counter
-+ brne __udivuqq3_loop
-+ com r_quo ; complement result
-+ ; because C flag was complemented in loop
-+ ret
-+.endfunc
-+#endif /* defined (L_udivuqq3) */
-+
-+#undef r_divd
-+#undef r_quo
-+#undef r_div
-+#undef r_cnt
-+
-+
-+/*******************************************************
-+ Fractional Division 16 / 16
-+*******************************************************/
-+#define r_divdL r26 /* dividend Low */
-+#define r_divdH r27 /* dividend Hig */
-+#define r_quoL r24 /* quotient Low */
-+#define r_quoH r25 /* quotient High */
-+#define r_divL r22 /* divisor */
-+#define r_divH r23 /* divisor */
-+#define r_cnt 21
-+
-+#if defined (L_divhq3)
-+ .global __divhq3
-+ .func __divhq3
-+__divhq3:
-+ mov r0, r_divdH
-+ eor r0, r_divH
-+ sbrs r_divH, 7
-+ rjmp __divhq3_divpos
-+ com r_divH
-+ neg r_divL
-+ sbci r_divH,-1
-+__divhq3_divpos:
-+ sbrs r_divdH, 7
-+ rjmp __divhq3_divdpos
-+ com r_divdH
-+ neg r_divdL
-+ sbci r_divdH,-1
-+__divhq3_divdpos:
-+ cp r_divdL, r_divL
-+ cpc r_divdH, r_divH
-+ breq __divhq3_minus1 ; if equal return -1
-+ rcall __udivuhq3
-+ lsr r_quoH
-+ ror r_quoL
-+ sbrs r0, 7 ; negate result if needed
-+ ret
-+ com r_quoH
-+ neg r_quoL
-+ sbci r_quoH,-1
-+ ret
-+__divhq3_minus1:
-+ ldi r_quoH, 0x80
-+ clr r_quoL
-+ ret
-+.endfunc
-+#endif /* defined (L_divhq3) */
-+
-+#if defined (L_udivuhq3)
-+ .global __udivuhq3
-+ .func __udivuhq3
-+__udivuhq3:
-+ sub r_quoH,r_quoH ; clear quotient and carry
-+ .global __udivuha3_entry
-+__udivuha3_entry:
-+ clr r_quoL ; clear quotient
-+ ldi r_cnt,16 ; init loop counter
-+__udivuhq3_loop:
-+ rol r_divdL ; shift dividend (with CARRY)
-+ rol r_divdH
-+ brcs __udivuhq3_ep ; dividend overflow
-+ cp r_divdL,r_divL ; compare dividend & divisor
-+ cpc r_divdH,r_divH
-+ brcc __udivuhq3_ep ; dividend >= divisor
-+ rol r_quoL ; shift quotient (with CARRY)
-+ rjmp __udivuhq3_cont
-+__udivuhq3_ep:
-+ sub r_divdL,r_divL ; restore dividend
-+ sbc r_divdH,r_divH
-+ lsl r_quoL ; shift quotient (without CARRY)
-+__udivuhq3_cont:
-+ rol r_quoH ; shift quotient
-+ dec r_cnt ; decrement loop counter
-+ brne __udivuhq3_loop
-+ com r_quoL ; complement result
-+ com r_quoH ; because C flag was complemented in loop
-+ ret
-+.endfunc
-+#endif /* defined (L_udivuhq3) */
-+
-+/*******************************************************
-+ Fixed Division 8.8 / 8.8
-+*******************************************************/
-+#if defined (L_divha3)
-+ .global __divha3
-+ .func __divha3
-+__divha3:
-+ mov r0, r_divdH
-+ eor r0, r_divH
-+ sbrs r_divH, 7
-+ rjmp __divha3_divpos
-+ com r_divH
-+ neg r_divL
-+ sbci r_divH,-1
-+__divha3_divpos:
-+ sbrs r_divdH, 7
-+ rjmp __divha3_divdpos
-+ com r_divdH
-+ neg r_divdL
-+ sbci r_divdH,-1
-+__divha3_divdpos:
-+ rcall __udivuha3
-+ sbrs r0, 7 ; negate result if needed
-+ ret
-+ com r_quoH
-+ neg r_quoL
-+ sbci r_quoH,-1
-+ ret
-+.endfunc
-+#endif /* defined (L_divha3) */
-+
-+#if defined (L_udivuha3)
-+ .global __udivuha3
-+ .func __udivuha3
-+__udivuha3:
-+ mov r_quoH, r_divdL
-+ mov r_divdL, r_divdH
-+ clr r_divdH
-+ lsl r_quoH ; shift quotient into carry
-+ rjmp __udivuha3_entry ; same as fractional after rearrange
-+.endfunc
-+#endif /* defined (L_udivuha3) */
-+
-+#undef r_divdL
-+#undef r_divdH
-+#undef r_quoL
-+#undef r_quoH
-+#undef r_divL
-+#undef r_divH
-+#undef r_cnt
-+
-+/*******************************************************
-+ Fixed Division 16.16 / 16.16
-+*******************************************************/
-+#define r_arg1L r24 /* arg1 gets passed already in place */
-+#define r_arg1H r25
-+#define r_arg1HL r26
-+#define r_arg1HH r27
-+#define r_divdL r26 /* dividend Low */
-+#define r_divdH r27
-+#define r_divdHL r30
-+#define r_divdHH r31 /* dividend High */
-+#define r_quoL r22 /* quotient Low */
-+#define r_quoH r23
-+#define r_quoHL r24
-+#define r_quoHH r25 /* quotient High */
-+#define r_divL r18 /* divisor Low */
-+#define r_divH r19
-+#define r_divHL r20
-+#define r_divHH r21 /* divisor High */
-+#define r_cnt __zero_reg__ /* loop count (0 after the loop!) */
-+
-+#if defined (L_divsa3)
-+ .global __divsa3
-+ .func __divsa3
-+__divsa3:
-+ mov r0, r27
-+ eor r0, r_divHH
-+ sbrs r_divHH, 7
-+ rjmp __divsa3_divpos
-+ com r_divHH
-+ com r_divHL
-+ com r_divH
-+ neg r_divL
-+ sbci r_divH,-1
-+ sbci r_divHL,-1
-+ sbci r_divHH,-1
-+__divsa3_divpos:
-+ sbrs r_arg1HH, 7
-+ rjmp __divsa3_arg1pos
-+ com r_arg1HH
-+ com r_arg1HL
-+ com r_arg1H
-+ neg r_arg1L
-+ sbci r_arg1H,-1
-+ sbci r_arg1HL,-1
-+ sbci r_arg1HH,-1
-+__divsa3_arg1pos:
-+ rcall __udivusa3
-+ sbrs r0, 7 ; negate result if needed
-+ ret
-+ com r_quoHH
-+ com r_quoHL
-+ com r_quoH
-+ neg r_quoL
-+ sbci r_quoH,-1
-+ sbci r_quoHL,-1
-+ sbci r_quoHH,-1
-+ ret
-+.endfunc
-+#endif /* defined (L_divsa3) */
-+
-+#if defined (L_udivusa3)
-+ .global __udivusa3
-+ .func __udivusa3
-+__udivusa3:
-+ ldi r_divdHL, 32 ; init loop counter
-+ mov r_cnt, r_divdHL
-+ clr r_divdHL
-+ clr r_divdHH
-+ mov_l r_quoL, r_divdHL
-+ mov_h r_quoH, r_divdHH
-+ lsl r_quoHL ; shift quotient into carry
-+ rol r_quoHH
-+__udivusa3_loop:
-+ rol r_divdL ; shift dividend (with CARRY)
-+ rol r_divdH
-+ rol r_divdHL
-+ rol r_divdHH
-+ brcs __udivusa3_ep ; dividend overflow
-+ cp r_divdL,r_divL ; compare dividend & divisor
-+ cpc r_divdH,r_divH
-+ cpc r_divdHL,r_divHL
-+ cpc r_divdHH,r_divHH
-+ brcc __udivusa3_ep ; dividend >= divisor
-+ rol r_quoL ; shift quotient (with CARRY)
-+ rjmp __udivusa3_cont
-+__udivusa3_ep:
-+ sub r_divdL,r_divL ; restore dividend
-+ sbc r_divdH,r_divH
-+ sbc r_divdHL,r_divHL
-+ sbc r_divdHH,r_divHH
-+ lsl r_quoL ; shift quotient (without CARRY)
-+__udivusa3_cont:
-+ rol r_quoH ; shift quotient
-+ rol r_quoHL
-+ rol r_quoHH
-+ dec r_cnt ; decrement loop counter
-+ brne __udivusa3_loop
-+ com r_quoL ; complement result
-+ com r_quoH ; because C flag was complemented in loop
-+ com r_quoHL
-+ com r_quoHH
-+ ret
-+.endfunc
-+#endif /* defined (L_udivusa3) */
-+
-+#undef r_divdL
-+#undef r_divdH
-+#undef r_divdHL
-+#undef r_divdHH
-+#undef r_quoL
-+#undef r_quoH
-+#undef r_quoHL
-+#undef r_quoHH
-+#undef r_divL
-+#undef r_divH
-+#undef r_divHL
-+#undef r_divHH
-+#undef r_cnt
-diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
---- gcc/config/avr/libgcc.S 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/config/avr/libgcc.S 2011-10-27 16:55:55.000000000 +0530
-@@ -163,6 +163,23 @@ __mulhi3_exit:
- .global __mulhisi3
- .func __mulhisi3
- __mulhisi3:
-+#if defined (__AVR_HAVE_MUL__)
-+ muls r21, r19
-+ movw r24, r0
-+ mul r20, r18
-+ movw r22, r0
-+ mulsu r21, r18
-+ add r23, r0
-+ adc r24, r1
-+ clr r1
-+ adc r25, r1
-+ mulsu r19, r20
-+ add r23, r0
-+ adc r24, r1
-+ clr r1
-+ adc r25, r1
-+ ret
-+#else
- mov_l r18, r24
- mov_h r19, r25
- clr r24
-@@ -174,6 +191,7 @@ __mulhisi3:
- dec r20
- mov r21, r20
- rjmp __mulsi3
-+#endif /* defined (__AVR_HAVE_MUL__) */
- .endfunc
- #endif /* defined (L_mulhisi3) */
-
-@@ -181,13 +199,31 @@ __mulhisi3:
- .global __umulhisi3
- .func __umulhisi3
- __umulhisi3:
-- mov_l r18, r24
-- mov_h r19, r25
-+#if defined (__AVR_HAVE_MUL__)
-+ mul r21, r19
-+ movw r24, r0
-+ mul r20, r18
-+ movw r22, r0
-+ mul r21, r18
-+ add r23, r0
-+ adc r24, r1
-+ clr r1
-+ adc r25, r1
-+ mul r19, r20
-+ add r23, r0
-+ adc r24, r1
-+ clr r1
-+ adc r25, r1
-+ ret
-+#else
-+ mov_l r22, r20
-+ mov_h r23, r21
- clr r24
- clr r25
- clr r20
- clr r21
- rjmp __mulsi3
-+#endif
- .endfunc
- #endif /* defined (L_umulhisi3) */
-
-@@ -200,7 +236,6 @@ __umulhisi3:
- #define r_arg1HL r24
- #define r_arg1HH r25 /* multiplier High */
-
--
- #define r_arg2L r18 /* multiplicand Low */
- #define r_arg2H r19
- #define r_arg2HL r20
-@@ -556,6 +591,23 @@ __divmodsi4_neg1:
- .endfunc
- #endif /* defined (L_divmodsi4) */
-
-+#undef r_remHH
-+#undef r_remHL
-+#undef r_remH
-+#undef r_remL
-+
-+#undef r_arg1HH
-+#undef r_arg1HL
-+#undef r_arg1H
-+#undef r_arg1L
-+
-+#undef r_arg2HH
-+#undef r_arg2HL
-+#undef r_arg2H
-+#undef r_arg2L
-+
-+#undef r_cnt
-+
- /**********************************
- * This is a prologue subroutine
- **********************************/
-@@ -899,3 +951,4 @@ __tablejump_elpm__:
- .endfunc
- #endif /* defined (L_tablejump_elpm) */
-
-+#include "libgcc-fixed.S"
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-27 16:55:55.000000000 +0530
-@@ -36,6 +36,8 @@ LIB1ASMSRC = avr/libgcc.S
- LIB1ASMFUNCS = \
- _mulqi3 \
- _mulhi3 \
-+ _mulhisi3 \
-+ _umulhisi3 \
- _mulsi3 \
- _udivmodqi4 \
- _divmodqi4 \
-@@ -54,6 +56,39 @@ LIB1ASMFUNCS = \
- _ctors \
- _dtors
-
-+# Fixed point routines
-+LIB1ASMFUNCS += \
-+ _fractqqsf \
-+ _fractuqqsf \
-+ _fracthqsf \
-+ _fractuhqsf \
-+ _fracthasf \
-+ _fractuhasf \
-+ _fractsasf \
-+ _fractusasf \
-+ _fractsfqq \
-+ _fractsfuqq \
-+ _fractsfhq \
-+ _fractsfuhq \
-+ _fractsfha \
-+ _fractsfsa \
-+ _mulqq3 \
-+ _muluqq3 \
-+ _mulhq3 \
-+ _muluhq3 \
-+ _mulha3 \
-+ _muluha3 \
-+ _mulsa3 \
-+ _mulusa3 \
-+ _divqq3 \
-+ _udivuqq3 \
-+ _divhq3 \
-+ _udivuhq3 \
-+ _divha3 \
-+ _udivuha3 \
-+ _divsa3 \
-+ _udivusa3
-+
- # We do not have the DF type.
- # Most of the C functions in libgcc2 use almost all registers,
- # so use -mcall-prologues for smaller code size.
-diff -Naurp gcc/cse.c gcc/cse.c
---- gcc/cse.c 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/cse.c 2011-10-27 16:55:55.000000000 +0530
-@@ -3702,9 +3702,10 @@ fold_rtx (rtx x, rtx insn)
- && exact_log2 (- INTVAL (const_arg1)) >= 0)))
- break;
-
-- /* ??? Vector mode shifts by scalar
-+ /* ??? Vector and Fixed Point shifts by scalar
- shift operand are not supported yet. */
-- if (is_shift && VECTOR_MODE_P (mode))
-+ if (is_shift && (VECTOR_MODE_P (mode)
-+ || ALL_FIXED_POINT_MODE_P (mode)))
- break;
-
- if (is_shift
-diff -Naurp gcc/dwarf2out.c gcc/dwarf2out.c
---- gcc/dwarf2out.c 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/dwarf2out.c 2011-10-27 16:55:55.000000000 +0530
-@@ -12790,6 +12790,12 @@ base_type_die (tree type)
-
- add_AT_unsigned (base_type_result, DW_AT_byte_size,
- int_size_in_bytes (type));
-+
-+ /* version 3 dwarf specifies that for fixed-point types DW_AT_binary_scale
-+ describes the location of the decimal place */
-+ if (TREE_CODE (type) == FIXED_POINT_TYPE)
-+ add_AT_int (base_type_result, DW_AT_binary_scale, -TYPE_FBIT (type));
-+
- add_AT_unsigned (base_type_result, DW_AT_encoding, encoding);
-
- return base_type_result;
-@@ -16561,7 +16567,11 @@ add_const_value_attribute (dw_die_ref di
-
- case HIGH:
- case CONST_FIXED:
-- return false;
-+ {
-+ add_AT_double (die, DW_AT_const_value,
-+ CONST_FIXED_VALUE_HIGH (rtl), CONST_FIXED_VALUE_LOW (rtl));
-+ }
-+ break;
-
- case MEM:
- if (GET_CODE (XEXP (rtl, 0)) == CONST_STRING
-diff -Naurp gcc/fold-const.c gcc/fold-const.c
---- gcc/fold-const.c 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/fold-const.c 2011-10-27 16:55:55.000000000 +0530
-@@ -11782,6 +11782,11 @@ fold_binary_loc (location_t loc,
- if (TREE_CODE (arg1) == INTEGER_CST && tree_int_cst_sgn (arg1) < 0)
- return NULL_TREE;
-
-+ /* Since fixed point types cannot perform bitwise and, or, etc..
-+ don't try to convert to an expression with them. */
-+ if (TREE_CODE(type) == FIXED_POINT_TYPE)
-+ return NULL_TREE;
-+
- /* Turn (a OP c1) OP c2 into a OP (c1+c2). */
- if (TREE_CODE (op0) == code && host_integerp (arg1, false)
- && TREE_INT_CST_LOW (arg1) < TYPE_PRECISION (type)
-diff -Naurp gcc/varasm.c gcc/varasm.c
---- gcc/varasm.c 2011-10-27 16:45:17.000000000 +0530
-+++ gcc/varasm.c 2011-10-27 16:55:55.000000000 +0530
-@@ -2504,7 +2504,7 @@ assemble_integer (rtx x, unsigned int si
- else
- mclass = MODE_INT;
-
-- omode = mode_for_size (subsize * BITS_PER_UNIT, mclass, 0);
-+ omode = mode_for_size (subsize * BITS_PER_UNIT, MODE_INT, 0);
- imode = mode_for_size (size * BITS_PER_UNIT, mclass, 0);
-
- for (i = 0; i < size; i += subsize)
--- /dev/null
+diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
+--- gcc/config/avr/avr.c 2012-09-04 15:08:42.000000000 +0530
++++ gcc/config/avr/avr.c 2012-11-09 19:01:17.000000000 +0530
+@@ -490,6 +490,15 @@ avr_interrupt_function_p (tree func)
+ return avr_lookup_function_attribute1 (func, "interrupt");
+ }
+
++/* Return nonzero if FUNC is an nmi function as specified
++ by the "nmi" attribute. */
++
++static int
++avr_nmi_function_p (tree func)
++{
++ return avr_lookup_function_attribute1 (func, "nmi");
++}
++
+ /* Return nonzero if FUNC is a signal function as specified
+ by the "signal" attribute. */
+
+@@ -536,15 +545,22 @@ avr_set_current_function (tree decl)
+ cfun->machine->is_naked = avr_naked_function_p (decl);
+ cfun->machine->is_signal = avr_signal_function_p (decl);
+ cfun->machine->is_interrupt = avr_interrupt_function_p (decl);
++ cfun->machine->is_nmi = avr_nmi_function_p (decl);
+ cfun->machine->is_OS_task = avr_OS_task_function_p (decl);
+ cfun->machine->is_OS_main = avr_OS_main_function_p (decl);
+
+- isr = cfun->machine->is_interrupt ? "interrupt" : "signal";
++ if (cfun->machine->is_interrupt)
++ isr = "interrupt";
++ else if (cfun->machine->is_nmi)
++ isr = "nmi";
++ else
++ isr = "signal";
+
+ /* Too much attributes make no sense as they request conflicting features. */
+
+ if (cfun->machine->is_OS_task + cfun->machine->is_OS_main
+- + (cfun->machine->is_signal || cfun->machine->is_interrupt) > 1)
++ + (cfun->machine->is_signal || cfun->machine->is_interrupt
++ || cfun->machine->is_nmi) > 1)
+ error_at (loc, "function attributes %qs, %qs and %qs are mutually"
+ " exclusive", "OS_task", "OS_main", isr);
+
+@@ -555,7 +571,8 @@ avr_set_current_function (tree decl)
+ warning_at (loc, OPT_Wattributes, "function attributes %qs and %qs have"
+ " no effect on %qs function", "OS_task", "OS_main", "naked");
+
+- if (cfun->machine->is_interrupt || cfun->machine->is_signal)
++ if (cfun->machine->is_interrupt || cfun->machine->is_signal
++ || cfun->machine->is_nmi)
+ {
+ tree args = TYPE_ARG_TYPES (TREE_TYPE (decl));
+ tree ret = TREE_TYPE (TREE_TYPE (decl));
+@@ -6827,6 +6844,8 @@ avr_attribute_table[] =
+ false },
+ { "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute,
+ false },
++ { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute,
++ false },
+ { "naked", 0, 0, false, true, true, avr_handle_fntype_attribute,
+ false },
+ { "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute,
+diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
+--- gcc/config/avr/avr.h 2012-06-28 19:28:32.000000000 +0530
++++ gcc/config/avr/avr.h 2012-11-09 19:01:17.000000000 +0530
+@@ -683,6 +683,10 @@ struct GTY(()) machine_function
+ /* 'true' - if current function is a signal function
+ as specified by the "signal" attribute. */
+ int is_signal;
++
++ /* 'true' - if current function is an nmi function
++ as specified by the "nmi" attribute. */
++ int is_nmi;
+
+ /* 'true' - if current function is a 'task' function
+ as specified by the "OS_task" attribute. */
+diff -Naurp gcc/testsuite/gcc.target/avr/misspelled-handler-warning.c gcc/testsuite/gcc.target/avr/misspelled-handler-warning.c
+--- gcc/testsuite/gcc.target/avr/misspelled-handler-warning.c 1970-01-01 05:30:00.000000000 +0530
++++ gcc/testsuite/gcc.target/avr/misspelled-handler-warning.c 2012-11-09 19:01:17.000000000 +0530
+@@ -0,0 +1,13 @@
++/* Test warning emitted for functions with nmi attribute that do
++ * not start with __vector */
++/* { dg-do compile } */
++
++
++void __attribute__((interrupt)) interrupt_fun() /* { dg-warning "'interrupt_fun' appears to be a misspelled interrupt handler" } */
++{}
++
++void __attribute__((signal)) signal_fun() /* { dg-warning "'signal_fun' appears to be a misspelled signal handler" } */
++{}
++
++void __attribute__((nmi)) nmi_fun() /* { dg-warning "'nmi_fun' appears to be a misspelled nmi handler" } */
++{}
+diff -Naurp gcc/testsuite/gcc.target/avr/xmega_const_hi_io_address.c gcc/testsuite/gcc.target/avr/xmega_const_hi_io_address.c
+--- gcc/testsuite/gcc.target/avr/xmega_const_hi_io_address.c 1970-01-01 05:30:00.000000000 +0530
++++ gcc/testsuite/gcc.target/avr/xmega_const_hi_io_address.c 2012-11-09 19:01:17.000000000 +0530
+@@ -0,0 +1,15 @@
++/* Verify that loading the contents of a constant int address in I/O range
++ uses two IN instructions with the correct SFR offset for XMEGA*/
++/* { dg-do compile } */
++/* { dg-options "-Os" } */
++/* { dg-skip-if "Only for XMEGAs" { "avr-*-*" } { "*" } { "-mmcu=atxmega128a1" } } */
++
++void func()
++{
++ volatile int val = *((int *)0x20);
++ *((int *)0x20) = 0xCAFE;
++
++}
++
++/* { dg-final { scan-assembler "\tin r\\d+,0x20\n\tin r\\d+,0x20\\+1" } } */
++/* { dg-final { scan-assembler "\tout 0x20,r\\d+\n\tout 0x20\\+1,r\\d+" } } */
+diff -Naurp gcc/testsuite/gcc.target/avr/xmega_const_qi_io_address.c gcc/testsuite/gcc.target/avr/xmega_const_qi_io_address.c
+--- gcc/testsuite/gcc.target/avr/xmega_const_qi_io_address.c 1970-01-01 05:30:00.000000000 +0530
++++ gcc/testsuite/gcc.target/avr/xmega_const_qi_io_address.c 2012-11-09 19:01:17.000000000 +0530
+@@ -0,0 +1,14 @@
++/* Verify that loading the contents of a constant address in I/O range
++ uses the IN instruction with the correct SFR offset for XMEGA*/
++/* { dg-do compile } */
++/* { dg-options "-Os" } */
++/* { dg-skip-if "Only for XMEGAs" { "avr-*-*" } { "*" } { "-mmcu=atxmega128a1" } } */
++
++void func()
++{
++ volatile char val = *((char *)0x20);
++ *((char *)0x20) = 42;
++}
++
++/* { dg-final { scan-assembler "\tin r\\d+,0x20" } } */
++/* { dg-final { scan-assembler "\tout 0x20,r\\d+" } } */
+diff -Naurp gcc/testsuite/gcc.target/avr/xmega_interrupt_no_cli.c gcc/testsuite/gcc.target/avr/xmega_interrupt_no_cli.c
+--- gcc/testsuite/gcc.target/avr/xmega_interrupt_no_cli.c 1970-01-01 05:30:00.000000000 +0530
++++ gcc/testsuite/gcc.target/avr/xmega_interrupt_no_cli.c 2012-11-09 19:01:17.000000000 +0530
+@@ -0,0 +1,14 @@
++/* Verify that XMEGA interrupts don't have a cli or sei
++ and that SPL is written before SPH*/
++/* { dg-do compile } */
++/* { dg-options "-Os" } */
++/* { dg-skip-if "Only for XMEGAs" { "avr-*-*" } { "*" } { "-mmcu=atxmega128a1" } } */
++
++void __attribute__((interrupt)) __vector_1()
++{
++ volatile int w = 19, x = 20, y = 30, z = 42;
++}
++
++/* { dg-final { scan-assembler-not "\tcli" } } */
++/* { dg-final { scan-assembler "\tout __SP_L__,r\\d+\n\tout __SP_H__,r\\d+" } } */
++
+diff -Naurp gcc/testsuite/gcc.target/avr/xmega_sfr_offsets.c gcc/testsuite/gcc.target/avr/xmega_sfr_offsets.c
+--- gcc/testsuite/gcc.target/avr/xmega_sfr_offsets.c 1970-01-01 05:30:00.000000000 +0530
++++ gcc/testsuite/gcc.target/avr/xmega_sfr_offsets.c 2012-11-09 19:01:17.000000000 +0530
+@@ -0,0 +1,18 @@
++/* Verify that SFR offsets for XMEGAs do not have the 0x20 offset
++ and that they are saved on entry, restored on exit for an interrupt
++ function */
++/* { dg-do compile } */
++/* { dg-options "-Os" } */
++/* { dg-skip-if "Only for XMEGAs" { "avr-*-*" } { "*" } { "-mmcu=atxmega128a1" } } */
++
++void __attribute__((interrupt)) __vector_1()
++{
++}
++
++/* { dg-final { scan-assembler "__SREG__ = 0x3f" } } */
++/* { dg-final { scan-assembler "__RAMPD__ = 0x38" } } */
++/* { dg-final { scan-assembler "\tin r0,__SREG__" } } */
++/* { dg-final { scan-assembler "\tin r0,__RAMPD__" } } */
++/* { dg-final { scan-assembler "\tpop r0\n\tout __SREG__,r0" } } */
++/* { dg-final { scan-assembler "\tpop r0\n\tout __RAMPD__,r0" } } */
++
--- /dev/null
+diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
+--- gcc/config/avr/avr.c 2013-01-21 18:26:07.000000000 +0530
++++ gcc/config/avr/avr.c 2013-01-21 18:40:04.000000000 +0530
+@@ -78,6 +78,17 @@
+ ((SYMBOL_REF_FLAGS (sym) & AVR_SYMBOL_FLAG_PROGMEM) \
+ / SYMBOL_FLAG_MACH_DEP)
+
++#define TINY_ADIW(REG1, REG2, I) \
++ "subi " #REG1 ",lo8(-(" #I "))" CR_TAB \
++ "sbci " #REG2 ",hi8(-(" #I "))"
++
++#define TINY_SBIW(REG1, REG2, I) \
++ "subi " #REG1 ",lo8((" #I "))" CR_TAB \
++ "sbci " #REG2 ",hi8((" #I "))"
++
++#define AVR_TMP_REGNO (AVR_TINY ? TMP_REGNO_TINY : TMP_REGNO)
++#define AVR_ZERO_REGNO (AVR_TINY ? ZERO_REGNO_TINY : ZERO_REGNO)
++
+ /* Known address spaces. The order must be the same as in the respective
+ enum from avr.h (or designated initialized must be used). */
+ const avr_addrspace_t avr_addrspace[] =
+@@ -157,6 +168,9 @@ static bool avr_rtx_costs (rtx, int, int
+ /* Allocate registers from r25 to r8 for parameters for function calls. */
+ #define FIRST_CUM_REG 26
+
++/* Last call saved register */
++#define LAST_CALLEE_SAVED_REG (AVR_TINY ? 21 : 17)
++
+ /* Implicit target register of LPM instruction (R0) */
+ extern GTY(()) rtx lpm_reg_rtx;
+ rtx lpm_reg_rtx;
+@@ -306,7 +320,7 @@ avr_option_override (void)
+ avr_addr.rampy = 0x3A + avr_current_arch->sfr_offset;
+ avr_addr.rampx = 0x39 + avr_current_arch->sfr_offset;
+ avr_addr.rampd = 0x38 + avr_current_arch->sfr_offset;
+- avr_addr.ccp = 0x34 + avr_current_arch->sfr_offset;
++ avr_addr.ccp = (AVR_TINY ? 0x3C : 0x34) + avr_current_arch->sfr_offset;
+
+ /* SP: Stack Pointer (SP_H:SP_L) */
+ avr_addr.sp_l = 0x3D + avr_current_arch->sfr_offset;
+@@ -338,8 +352,8 @@ avr_init_expanders (void)
+ all_regs_rtx[regno] = gen_rtx_REG (QImode, regno);
+
+ lpm_reg_rtx = all_regs_rtx[LPM_REGNO];
+- tmp_reg_rtx = all_regs_rtx[TMP_REGNO];
+- zero_reg_rtx = all_regs_rtx[ZERO_REGNO];
++ tmp_reg_rtx = all_regs_rtx[AVR_TMP_REGNO];
++ zero_reg_rtx = all_regs_rtx[AVR_ZERO_REGNO];
+
+ lpm_addr_reg_rtx = gen_rtx_REG (HImode, REG_Z);
+
+@@ -351,6 +365,11 @@ avr_init_expanders (void)
+
+ xstring_empty = gen_rtx_CONST_STRING (VOIDmode, "");
+ xstring_e = gen_rtx_CONST_STRING (VOIDmode, "e");
++
++ /* TINY core does not have regs r10-r16, but avr-dimode.md expects them
++ to be present */
++ if (AVR_TINY)
++ avr_have_dimode = false;
+ }
+
+
+@@ -792,7 +811,7 @@ sequent_regs_live (void)
+ int live_seq=0;
+ int cur_seq=0;
+
+- for (reg = 0; reg < 18; ++reg)
++ for (reg = 0; reg <= LAST_CALLEE_SAVED_REG; ++reg)
+ {
+ if (fixed_regs[reg])
+ {
+@@ -903,7 +922,7 @@ emit_push_sfr (rtx sfr, bool frame_relat
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ /* PUSH __tmp_reg__ */
+- emit_push_byte (TMP_REGNO, frame_related_p);
++ emit_push_byte (AVR_TMP_REGNO, frame_related_p);
+
+ if (clr_p)
+ {
+@@ -929,7 +948,8 @@ avr_prologue_setup_frame (HOST_WIDE_INT
+ && live_seq
+ && !isr_p
+ && !cfun->machine->is_OS_task
+- && !cfun->machine->is_OS_main);
++ && !cfun->machine->is_OS_main
++ && !AVR_TINY);
+
+ if (minimize
+ && (frame_pointer_needed
+@@ -966,11 +986,11 @@ avr_prologue_setup_frame (HOST_WIDE_INT
+ /* Note that live_seq always contains r28+r29, but the other
+ registers to be saved are all below 18. */
+
+- first_reg = 18 - (live_seq - 2);
++ first_reg = (LAST_CALLEE_SAVED_REG + 1) - (live_seq - 2);
+
+ for (reg = 29, offset = -live_seq + 1;
+ reg >= first_reg;
+- reg = (reg == 28 ? 17 : reg - 1), ++offset)
++ reg = (reg == 28 ? LAST_CALLEE_SAVED_REG : reg - 1), ++offset)
+ {
+ rtx m, r;
+
+@@ -1201,10 +1221,10 @@ expand_prologue (void)
+ emit_insn (gen_enable_interrupt ());
+
+ /* Push zero reg. */
+- emit_push_byte (ZERO_REGNO, true);
++ emit_push_byte (AVR_ZERO_REGNO, true);
+
+ /* Push tmp reg. */
+- emit_push_byte (TMP_REGNO, true);
++ emit_push_byte (AVR_TMP_REGNO, true);
+
+ /* Push SREG. */
+ /* ??? There's no dwarf2 column reserved for SREG. */
+@@ -1344,7 +1364,8 @@ expand_epilogue (bool sibcall_p)
+ && live_seq
+ && !isr_p
+ && !cfun->machine->is_OS_task
+- && !cfun->machine->is_OS_main);
++ && !cfun->machine->is_OS_main
++ && !AVR_TINY);
+
+ if (minimize
+ && (live_seq > 4
+@@ -1502,14 +1523,14 @@ expand_epilogue (bool sibcall_p)
+
+ /* Restore SREG using tmp_reg as scratch. */
+
+- emit_pop_byte (TMP_REGNO);
++ emit_pop_byte (AVR_TMP_REGNO);
+ emit_move_insn (sreg_rtx, tmp_reg_rtx);
+
+ /* Restore tmp REG. */
+- emit_pop_byte (TMP_REGNO);
++ emit_pop_byte (AVR_TMP_REGNO);
+
+ /* Restore zero REG. */
+- emit_pop_byte (ZERO_REGNO);
++ emit_pop_byte (AVR_ZERO_REGNO);
+ }
+
+ if (!sibcall_p)
+@@ -2009,7 +2030,7 @@ avr_print_operand (FILE *file, rtx x, in
+ fprintf (file, "__RAMPX__");
+ else if (AVR_HAVE_RAMPD && ival == avr_addr.rampd)
+ fprintf (file, "__RAMPD__");
+- else if (AVR_XMEGA && ival == avr_addr.ccp)
++ else if ((AVR_XMEGA || AVR_TINY) && ival == avr_addr.ccp)
+ fprintf (file, "__CCP__");
+ else if (ival == avr_addr.sreg) fprintf (file, "__SREG__");
+ else if (ival == avr_addr.sp_l) fprintf (file, "__SP_L__");
+@@ -2052,6 +2073,13 @@ avr_print_operand (FILE *file, rtx x, in
+
+ avr_print_operand (file, XEXP (addr, 1), 0);
+ }
++ else if (code == 'b')
++ {
++ if (GET_CODE (addr) != PLUS)
++ fatal_insn ("bad address, not (reg+disp):", addr);
++
++ avr_print_operand_address (file, XEXP (addr, 0));
++ }
+ else if (code == 'p' || code == 'r')
+ {
+ if (GET_CODE (addr) != POST_INC && GET_CODE (addr) != PRE_DEC)
+@@ -2392,7 +2420,7 @@ avr_simplify_comparison_p (enum machine_
+ int
+ function_arg_regno_p(int r)
+ {
+- return (r >= 8 && r <= 25);
++ return (AVR_TINY ? r >= 20 && r <= 25 : r >= 8 && r <= 25);
+ }
+
+ /* Initializing the variable cum for the state at the beginning
+@@ -2402,7 +2430,7 @@ void
+ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname,
+ tree fndecl ATTRIBUTE_UNUSED)
+ {
+- cum->nregs = 18;
++ cum->nregs = AVR_TINY ? 6 : 18;
+ cum->regno = FIRST_CUM_REG;
+ if (!libname && stdarg_p (fntype))
+ cum->nregs = 0;
+@@ -2900,6 +2928,25 @@ output_movhi (rtx insn, rtx xop[], int *
+ return "";
+ }
+
++/* Same as out_movqi_r_mr, but TINY does not have ADIW or SBIW */
++static const char*
++avr_out_movqi_r_mr_reg_disp_tiny (rtx insn, rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx x = XEXP (src, 0);
++ op[2] = XEXP(x, 0);
++
++ avr_asm_len (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld %0,%b1" , op, plen, -3);
++
++ if (!reg_overlap_mentioned_p (dest, XEXP (x,0))
++ && !reg_unused_after (insn, XEXP (x,0)))
++ avr_asm_len (TINY_SBIW (%A2, %B2, %o1), op, plen, 2);
++
++ return "";
++}
++
+ static const char*
+ out_movqi_r_mr (rtx insn, rtx op[], int *plen)
+ {
+@@ -2913,13 +2960,18 @@ out_movqi_r_mr (rtx insn, rtx op[], int
+ ? avr_asm_len ("in %0,%i1", op, plen, -1)
+ : avr_asm_len ("lds %0,%m1", op, plen, -2);
+ }
+- else if (GET_CODE (x) == PLUS
++
++
++ if (GET_CODE (x) == PLUS
+ && REG_P (XEXP (x, 0))
+ && CONST_INT_P (XEXP (x, 1)))
+ {
+ /* memory access by reg+disp */
+
+ int disp = INTVAL (XEXP (x, 1));
++
++ if (AVR_TINY)
++ return avr_out_movqi_r_mr_reg_disp_tiny (insn, op, plen);
+
+ if (disp - GET_MODE_SIZE (GET_MODE (src)) >= 63)
+ {
+@@ -2941,25 +2993,105 @@ out_movqi_r_mr (rtx insn, rtx op[], int
+ {
+ /* This is a paranoid case LEGITIMIZE_RELOAD_ADDRESS must exclude
+ it but I have this situation with extremal optimizing options. */
+-
+- avr_asm_len ("adiw r26,%o1" CR_TAB
+- "ld %0,X", op, plen, -2);
++
++ avr_asm_len ("adiw r26, %o1" CR_TAB
++ "ld %0,X", op, plen, -2);
+
+ if (!reg_overlap_mentioned_p (dest, XEXP (x,0))
+ && !reg_unused_after (insn, XEXP (x,0)))
+ {
+- avr_asm_len ("sbiw r26,%o1", op, plen, 1);
++ avr_asm_len ("sbiw r26, %o1", op, plen, 1);
+ }
+
+ return "";
+ }
+
+- return avr_asm_len ("ldd %0,%1", op, plen, -1);
++ return avr_asm_len ("ldd %0,%1", op, plen, -1);
+ }
+
+ return avr_asm_len ("ld %0,%1", op, plen, -1);
+ }
+
++/* Same as movhi_r_mr, but TINY does not have ADIW, SBIW and LDD */
++static const char*
++avr_out_movhi_r_mr_reg_no_disp_tiny (rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++
++ int reg_dest = true_regnum (dest);
++ int reg_base = true_regnum (base);
++
++ op[2] = base;
++
++ if (reg_dest == reg_base) /* R = (R) */
++ return avr_asm_len ("ld __tmp_reg__,%1+" CR_TAB
++ "ld %B0,%1" CR_TAB
++ "mov %A0,__tmp_reg__", op, plen, -3);
++
++ return avr_asm_len ("ld %A0,%1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "ld %B0,%1" CR_TAB
++ TINY_SBIW (%A2, %B2, 1), op, plen, -6);
++
++}
++
++/* Same as movhi_r_mr, but TINY does not have ADIW, SBIW and LDD */
++static const char*
++avr_out_movhi_r_mr_reg_disp_tiny (rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++
++ int reg_dest = true_regnum (dest);
++ int reg_base = true_regnum (XEXP (base, 0));
++ op[2] = XEXP (base, 0);
++
++ if (reg_base == reg_dest)
++ {
++ return avr_asm_len (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld __tmp_reg__,%b1+" CR_TAB
++ "ld %B0,%b1" CR_TAB
++ "mov %A0,__tmp_reg__", op, plen, -5);
++ }
++ else
++ {
++ return avr_asm_len (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld %A0,%b1+" CR_TAB
++ "ld %B0,%b1" CR_TAB
++ TINY_SBIW (%A2, %B2, %o1+1), op, plen, -6);
++ }
++}
++
++/* Same as movhi_r_mr, but TINY does not have ADIW, SBIW and LDD */
++static const char*
++avr_out_movhi_r_mr_pre_dec_tiny (rtx insn, rtx op[], int *plen)
++{
++ int mem_volatile_p = 0;
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++ op[2] = XEXP (base, 0);
++
++ /* "volatile" forces reading low byte first, even if less efficient,
++ for correct operation with 16-bit I/O registers. */
++ mem_volatile_p = MEM_VOLATILE_P (src);
++
++ if (reg_overlap_mentioned_p (dest, XEXP (base, 0)))
++ fatal_insn ("incorrect insn:", insn);
++
++ if (!mem_volatile_p)
++ return avr_asm_len ("ld %B0,%1" CR_TAB
++ "ld %A0,%1", op, plen, -2);
++
++ return avr_asm_len (TINY_SBIW (%A2, %B2, 2) CR_TAB
++ "ld %A0,%p1+" CR_TAB
++ "ld %B0,%p1" CR_TAB
++ TINY_SBIW (%A2, %B2, 1), op, plen, -6);
++}
++
+ static const char*
+ out_movhi_r_mr (rtx insn, rtx op[], int *plen)
+ {
+@@ -2974,20 +3106,27 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+
+ if (reg_base > 0)
+ {
++ if (AVR_TINY)
++ return avr_out_movhi_r_mr_reg_no_disp_tiny (op, plen);
++
+ if (reg_dest == reg_base) /* R = (R) */
+ return avr_asm_len ("ld __tmp_reg__,%1+" CR_TAB
+ "ld %B0,%1" CR_TAB
+ "mov %A0,__tmp_reg__", op, plen, -3);
+
+ if (reg_base != REG_X)
++ {
+ return avr_asm_len ("ld %A0,%1" CR_TAB
+- "ldd %B0,%1+1", op, plen, -2);
+-
++ "ldd %B0,%1+1", op, plen, -2);
++ }
++
+ avr_asm_len ("ld %A0,X+" CR_TAB
+ "ld %B0,X", op, plen, -2);
+
+ if (!reg_unused_after (insn, base))
++ {
+ avr_asm_len ("sbiw r26,1", op, plen, 1);
++ }
+
+ return "";
+ }
+@@ -2996,6 +3135,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+ int disp = INTVAL (XEXP (base, 1));
+ int reg_base = true_regnum (XEXP (base, 0));
+
++ if (AVR_TINY)
++ return avr_out_movhi_r_mr_reg_disp_tiny (op, plen);
++
+ if (disp > MAX_LD_OFFSET (GET_MODE (src)))
+ {
+ if (REGNO (XEXP (base, 0)) != REG_Y)
+@@ -3007,7 +3149,7 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+ "ldd %B0,Y+63" CR_TAB
+ "sbiw r28,%o1-62", op, plen, -4)
+
+- : avr_asm_len ("subi r28,lo8(-%o1)" CR_TAB
++ : avr_asm_len ("subi r28,lo8(-%o1)" CR_TAB
+ "sbci r29,hi8(-%o1)" CR_TAB
+ "ld %A0,Y" CR_TAB
+ "ldd %B0,Y+1" CR_TAB
+@@ -3041,6 +3183,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+ }
+ else if (GET_CODE (base) == PRE_DEC) /* (--R) */
+ {
++ if (AVR_TINY)
++ return avr_out_movhi_r_mr_pre_dec_tiny (insn, op, plen);
++
+ if (reg_overlap_mentioned_p (dest, XEXP (base, 0)))
+ fatal_insn ("incorrect insn:", insn);
+
+@@ -3081,6 +3226,101 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+ }
+
+ static const char*
++avr_out_movsi_r_mr_reg_no_disp_tiny (rtx insn, rtx op[], int *l)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++ int reg_dest = true_regnum (dest);
++ int reg_base = true_regnum (base);
++ op[2] = base;
++
++ if (reg_dest == reg_base)
++ {
++ /* "ld r26,-X" is undefined */
++ return *l=9, (TINY_ADIW (%A2, %B2, 3) CR_TAB
++ "ld %D0,%1" CR_TAB
++ "ld %C0,-%1" CR_TAB
++ "ld __tmp_reg__,-%1" CR_TAB
++ TINY_SBIW (%A2, %B2, 1) CR_TAB
++ "ld %A0,%1" CR_TAB
++ "mov %B0,__tmp_reg__");
++ }
++ else if (reg_dest == reg_base - 2)
++ {
++ return *l=5, ("ld %A0,%1+" CR_TAB
++ "ld %B0,%1+" CR_TAB
++ "ld __tmp_reg__,%1+" CR_TAB
++ "ld %D0,%1" CR_TAB
++ "mov %C0,__tmp_reg__");
++ }
++ else if (reg_unused_after (insn, base))
++ {
++ return *l=4, ("ld %A0,%1+" CR_TAB
++ "ld %B0,%1+" CR_TAB
++ "ld %C0,%1+" CR_TAB
++ "ld %D0,%1");
++ }
++ else
++ {
++ return *l=6, ("ld %A0,%1+" CR_TAB
++ "ld %B0,%1+" CR_TAB
++ "ld %C0,%1+" CR_TAB
++ "ld %D0,%1" CR_TAB
++ TINY_SBIW (%A2, %B2, 3));
++ }
++}
++
++static const char*
++avr_out_movsi_r_mr_reg_disp_tiny (rtx insn, rtx op[], int *l)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++ int reg_dest = true_regnum (dest);
++ int reg_base = true_regnum (XEXP (base, 0));
++ op[2] = XEXP (base, 0);
++
++ if (reg_dest == reg_base)
++ {
++ /* "ld r26,-X" is undefined */
++ return *l=9, (TINY_ADIW (%A2, %B2, %o1+3) CR_TAB
++ "ld %D0,%b1" CR_TAB
++ "ld %C0,-%b1" CR_TAB
++ "ld __tmp_reg__,-%b1" CR_TAB
++ TINY_SBIW (%A2, %B2, 1) CR_TAB
++ "ld %A0,%b1" CR_TAB
++ "mov %B0,__tmp_reg__");
++ }
++ else if (reg_dest == reg_base - 2)
++ {
++ return *l=7, (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld %A0,%b1+" CR_TAB
++ "ld %B0,%b1+" CR_TAB
++ "ld __tmp_reg__,%b1+" CR_TAB
++ "ld %D0,%b1" CR_TAB
++ "mov %C0,__tmp_reg__");
++ }
++ else if (reg_unused_after (insn, XEXP (base, 0)))
++ {
++ return *l=6, (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld %A0,%b1+" CR_TAB
++ "ld %B0,%b1+" CR_TAB
++ "ld %C0,%b1+" CR_TAB
++ "ld %D0,%b1");
++ }
++ else
++ {
++ return *l=8, (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld %A0,%b1+" CR_TAB
++ "ld %B0,%b1+" CR_TAB
++ "ld %C0,%b1+" CR_TAB
++ "ld %D0,%b1" CR_TAB
++ TINY_SBIW (%A2, %B2, %o1+3));
++ }
++}
++
++static const char*
+ out_movsi_r_mr (rtx insn, rtx op[], int *l)
+ {
+ rtx dest = op[0];
+@@ -3095,6 +3335,9 @@ out_movsi_r_mr (rtx insn, rtx op[], int
+
+ if (reg_base > 0)
+ {
++ if (AVR_TINY)
++ return avr_out_movsi_r_mr_reg_no_disp_tiny (insn, op, l);
++
+ if (reg_base == REG_X) /* (R26) */
+ {
+ if (reg_dest == REG_X)
+@@ -3149,6 +3392,9 @@ out_movsi_r_mr (rtx insn, rtx op[], int
+ {
+ int disp = INTVAL (XEXP (base, 1));
+
++ if (AVR_TINY)
++ return avr_out_movsi_r_mr_reg_disp_tiny (insn, op, l);
++
+ if (disp > MAX_LD_OFFSET (GET_MODE (src)))
+ {
+ if (REGNO (XEXP (base, 0)) != REG_Y)
+@@ -3242,6 +3488,113 @@ out_movsi_r_mr (rtx insn, rtx op[], int
+ }
+
+ static const char*
++avr_out_movsi_mr_r_reg_no_disp_tiny (rtx insn, rtx op[], int *l)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (dest, 0);
++ int reg_base = true_regnum (base);
++ int reg_src = true_regnum (src);
++ op[2] = base;
++
++ if (reg_base == reg_src)
++ {
++ /* "ld r26,-X" is undefined */
++ if (reg_unused_after (insn, base))
++ {
++ return *l=7, ("mov __tmp_reg__, %B1" CR_TAB
++ "st %0,%A1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %0+,__tmp_reg__" CR_TAB
++ "st %0+,%C1" CR_TAB
++ "st %0+,%D1");
++ }
++ else
++ {
++ return *l=9, ("mov __tmp_reg__, %B1" CR_TAB
++ "st %0,%A1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %0+,__tmp_reg__" CR_TAB
++ "st %0+,%C1" CR_TAB
++ "st %0+,%D1" CR_TAB
++ TINY_SBIW (%A2, %B2, 3));
++ }
++ }
++ else if (reg_base == reg_src + 2)
++ {
++ if (reg_unused_after (insn, base))
++ return *l=7, ("mov __zero_reg__,%C1" CR_TAB
++ "mov __tmp_reg__,%D1" CR_TAB
++ "st %0+,%A1" CR_TAB
++ "st %0+,%B1" CR_TAB
++ "st %0+,__zero_reg__" CR_TAB
++ "st %0,__tmp_reg__" CR_TAB
++ "clr __zero_reg__");
++ else
++ return *l=9, ("mov __zero_reg__,%C1" CR_TAB
++ "mov __tmp_reg__,%D1" CR_TAB
++ "st %0+,%A1" CR_TAB
++ "st %0+,%B1" CR_TAB
++ "st %0+,__zero_reg__" CR_TAB
++ "st %0,__tmp_reg__" CR_TAB
++ "clr __zero_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, 3));
++ }
++
++ return *l=6, ("st %0+,%A1" CR_TAB
++ "st %0+,%B1" CR_TAB
++ "st %0+,%C1" CR_TAB
++ "st %0,%D1" CR_TAB
++ TINY_SBIW (%A2, %B2, 3));
++}
++
++static const char*
++avr_out_movsi_mr_r_reg_disp_tiny (rtx op[], int *l)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (dest, 0);
++ int reg_base = REGNO (XEXP (base, 0));
++ int reg_src =true_regnum (src);
++
++ op[2] = XEXP (base, 0);
++
++ if (reg_base == reg_src)
++ {
++ *l = 11;
++ return ("mov __tmp_reg__,%A2" CR_TAB
++ "mov __zero_reg__,%B2" CR_TAB
++ TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0+,__tmp_reg__" CR_TAB
++ "st %b0+,__zero_reg__" CR_TAB
++ "st %b0+,%C2" CR_TAB
++ "st %b0,%D2" CR_TAB
++ "clr __zero_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0+3));
++ }
++ else if (reg_src == reg_base - 2)
++ {
++ *l = 11;
++ return ("mov __tmp_reg__,%C2" CR_TAB
++ "mov __zero_reg__,%D2" CR_TAB
++ TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0+,%A0" CR_TAB
++ "st %b0+,%B0" CR_TAB
++ "st %b0+,__tmp_reg__" CR_TAB
++ "st %b0,__zero_reg__" CR_TAB
++ "clr __zero_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0+3));
++ }
++ *l = 8;
++ return (TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0+,%A1" CR_TAB
++ "st %b0+,%B1" CR_TAB
++ "st %b0+,%C1" CR_TAB
++ "st %b0,%D1" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0+3));
++}
++
++static const char*
+ out_movsi_mr_r (rtx insn, rtx op[], int *l)
+ {
+ rtx dest = op[0];
+@@ -3261,6 +3614,9 @@ out_movsi_mr_r (rtx insn, rtx op[], int
+ "sts %m0+3,%D1");
+ if (reg_base > 0) /* (r) */
+ {
++ if (AVR_TINY)
++ return avr_out_movsi_mr_r_reg_no_disp_tiny (insn, op, l);
++
+ if (reg_base == REG_X) /* (R26) */
+ {
+ if (reg_src == REG_X)
+@@ -3317,6 +3673,10 @@ out_movsi_mr_r (rtx insn, rtx op[], int
+ else if (GET_CODE (base) == PLUS) /* (R + i) */
+ {
+ int disp = INTVAL (XEXP (base, 1));
++
++ if (AVR_TINY)
++ return avr_out_movsi_mr_r_reg_disp_tiny (op, l);
++
+ reg_base = REGNO (XEXP (base, 0));
+ if (disp > MAX_LD_OFFSET (GET_MODE (dest)))
+ {
+@@ -3476,6 +3836,75 @@ output_movsisf (rtx insn, rtx operands[]
+ /* Handle loads of 24-bit types from memory to register. */
+
+ static const char*
++avr_out_load_psi_reg_no_disp_tiny (rtx insn, rtx *op, int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++ int reg_dest = true_regnum (dest);
++ int reg_base = true_regnum (base);
++ op[2] = base;
++
++ if (reg_base == reg_dest)
++ {
++ return avr_asm_len (TINY_ADIW (%A2, %B2, 2) CR_TAB
++ "ld %C0,%1" CR_TAB
++ "ld __tmp_reg__,-%1" CR_TAB
++ TINY_SBIW (%A2, %B2, 1) CR_TAB
++ "ld %A0,%1" CR_TAB
++ "mov %B0,__tmp_reg__", op, plen, -8);
++ }
++ else
++ {
++ return avr_asm_len ("ld %A0,%1+" CR_TAB
++ "ld %B0,%1+" CR_TAB
++ "ld %C0,%1", op, plen, -3);
++
++ if (reg_dest != reg_base - 2 &&
++ !reg_unused_after (insn, base))
++ {
++ avr_asm_len (TINY_SBIW (%A2, %B2, 2), op, plen, 2);
++ }
++ return "";
++ }
++}
++
++static const char*
++avr_out_load_psi_reg_disp_tiny (rtx insn, rtx *op, int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (src, 0);
++ int reg_dest = true_regnum (dest);
++ int reg_base = true_regnum (base);
++ op[2] = XEXP (base, 0);
++
++ reg_base = true_regnum (XEXP (base, 0));
++ if (reg_base == reg_dest)
++ {
++ return avr_asm_len (TINY_ADIW (%A2, %B2, %o1+2) CR_TAB
++ "ld %C0,%b1" CR_TAB
++ "ld __tmp_reg__,-%b1" CR_TAB
++ TINY_SBIW (%A2, %B2, 1) CR_TAB
++ "ld %A0,%b1" CR_TAB
++ "mov %B0,__tmp_reg__", op, plen, -8);
++ }
++ else
++ {
++ avr_asm_len (TINY_ADIW (%A2, %B2, %o1) CR_TAB
++ "ld %A0,%b1+" CR_TAB
++ "ld %B0,%b1+" CR_TAB
++ "ld %C0,%b1", op, plen, -5);
++
++ if (reg_dest != (reg_base - 2)
++ && !reg_unused_after (insn, XEXP (base, 0)))
++ avr_asm_len (TINY_SBIW (%A2, %B2, %o1+2), op, plen, 2);
++
++ return "";
++ }
++}
++
++static const char*
+ avr_out_load_psi (rtx insn, rtx *op, int *plen)
+ {
+ rtx dest = op[0];
+@@ -3486,6 +3915,9 @@ avr_out_load_psi (rtx insn, rtx *op, int
+
+ if (reg_base > 0)
+ {
++ if (AVR_TINY)
++ return avr_out_load_psi_reg_no_disp_tiny (insn, op, plen);
++
+ if (reg_base == REG_X) /* (R26) */
+ {
+ if (reg_dest == REG_X)
+@@ -3527,6 +3959,9 @@ avr_out_load_psi (rtx insn, rtx *op, int
+ else if (GET_CODE (base) == PLUS) /* (R + i) */
+ {
+ int disp = INTVAL (XEXP (base, 1));
++
++ if (AVR_TINY)
++ return avr_out_load_psi_reg_disp_tiny (insn, op, plen);
+
+ if (disp > MAX_LD_OFFSET (GET_MODE (src)))
+ {
+@@ -3604,6 +4039,85 @@ avr_out_load_psi (rtx insn, rtx *op, int
+ return "";
+ }
+
++
++static const char*
++avr_out_store_psi_reg_no_disp_tiny (rtx insn, rtx *op, int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (dest, 0);
++ int reg_base = true_regnum (base);
++ int reg_src = true_regnum (src);
++ op[2] = base;
++
++ if (reg_base == reg_src)
++ {
++ avr_asm_len ("st %0,%A1" CR_TAB
++ "mov __tmp_reg__,%B1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB /* st X+, r27 is undefined */
++ "st %0+,__tmp_reg__" CR_TAB
++ "st %0,%C1", op, plen, -6);
++
++ }
++ else if (reg_src == reg_base - 2)
++ {
++ avr_asm_len ("st %0,%A1" CR_TAB
++ "mov __tmp_reg__,%C1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %0+,%B1" CR_TAB
++ "st %0,__tmp_reg__", op, plen, 6);
++ }
++ else
++ {
++ avr_asm_len ("st %0+,%A1" CR_TAB
++ "st %0+,%B1" CR_TAB
++ "st %0,%C1", op, plen, -3);
++ }
++
++ if (!reg_unused_after (insn, base))
++ avr_asm_len (TINY_SBIW (%A2, %B2, 2), op, plen, 2);
++
++ return "";
++}
++
++static const char*
++avr_out_store_psi_reg_disp_tiny (rtx *op, int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (dest, 0);
++ int reg_base = REGNO (XEXP (base, 0));
++ int reg_src = true_regnum (src);
++ op[2] = XEXP (base, 0);
++
++ if (reg_src == reg_base)
++ {
++ return avr_asm_len ("mov __tmp_reg__,%A1" CR_TAB
++ "mov __zero_reg__,%B1" CR_TAB
++ TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0+,__tmp_reg__" CR_TAB
++ "st %b0+,__zero_reg__" CR_TAB
++ "st %b0,%C1" CR_TAB
++ "clr __zero_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0+2), op, plen, -10);
++ }
++ else if (reg_src == reg_base - 2)
++ {
++ return avr_asm_len ("mov __tmp_reg__,%C1" CR_TAB
++ TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0+,%A1" CR_TAB
++ "st %b0+,%B1" CR_TAB
++ "st %b0,__tmp_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0+2), op, plen, -8);
++ }
++
++ return avr_asm_len (TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0+,%A1" CR_TAB
++ "st %b0+,%B1" CR_TAB
++ "st %b0,%C1" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0+2), op, plen, -7);
++}
++
+ /* Handle store of 24-bit type from register or zero to memory. */
+
+ static const char*
+@@ -3621,6 +4135,9 @@ avr_out_store_psi (rtx insn, rtx *op, in
+
+ if (reg_base > 0) /* (r) */
+ {
++ if (AVR_TINY)
++ return avr_out_store_psi_reg_no_disp_tiny (insn, op, plen);
++
+ if (reg_base == REG_X) /* (R26) */
+ {
+ gcc_assert (!reg_overlap_mentioned_p (base, src));
+@@ -3642,6 +4159,10 @@ avr_out_store_psi (rtx insn, rtx *op, in
+ else if (GET_CODE (base) == PLUS) /* (R + i) */
+ {
+ int disp = INTVAL (XEXP (base, 1));
++
++ if (AVR_TINY)
++ return avr_out_store_psi_reg_disp_tiny (op, plen);
++
+ reg_base = REGNO (XEXP (base, 0));
+
+ if (disp > MAX_LD_OFFSET (GET_MODE (dest)))
+@@ -3758,6 +4279,31 @@ avr_out_movpsi (rtx insn, rtx *op, int *
+ return "";
+ }
+
++static const char*
++avr_out_movqi_mr_r_reg_disp_tiny (rtx insn, rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx x = XEXP (dest, 0);
++ op[2] = XEXP (x, 0);
++
++ if (reg_overlap_mentioned_p (src, XEXP (x, 0)))
++ {
++ avr_asm_len ("mov __tmp_reg__,%1" CR_TAB
++ TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0,__tmp_reg__", op, plen, -4);
++ }
++ else
++ {
++ avr_asm_len (TINY_ADIW (%A2, %B2, %o0) CR_TAB
++ "st %b0,%1" , op, plen, -3);
++ }
++
++ if (!reg_unused_after (insn, XEXP (x,0)))
++ avr_asm_len (TINY_SBIW (%A2, %B2, %o0), op, plen, 2);
++
++ return "";
++}
+
+ static const char*
+ out_movqi_mr_r (rtx insn, rtx op[], int *plen)
+@@ -3780,6 +4326,9 @@ out_movqi_mr_r (rtx insn, rtx op[], int
+
+ int disp = INTVAL (XEXP (x, 1));
+
++ if (AVR_TINY)
++ return avr_out_movqi_mr_r_reg_disp_tiny (insn, op, plen);
++
+ if (disp - GET_MODE_SIZE (GET_MODE (dest)) >= 63)
+ {
+ if (REGNO (XEXP (x, 0)) != REG_Y)
+@@ -3934,6 +4483,76 @@ avr_out_movhi_mr_r_xmega (rtx insn, rtx
+ return "";
+ }
+
++static const char*
++avr_out_movhi_mr_r_reg_no_disp_tiny (rtx insn, rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (dest, 0);
++ int reg_base = true_regnum (base);
++ int reg_src = true_regnum (src);
++ int mem_volatile_p = MEM_VOLATILE_P (dest);
++ op[2] = base;
++
++ if (reg_base == reg_src)
++ {
++ return !mem_volatile_p && reg_unused_after (insn, src)
++ ? avr_asm_len ("mov __tmp_reg__,%B1" CR_TAB
++ "st %0,%A1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %0,__tmp_reg__", op, plen, -5)
++ : avr_asm_len ("mov __tmp_reg__,%B1" CR_TAB
++ TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %0,__tmp_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, 1) CR_TAB
++ "st %0, %A1", op, plen, -7);
++ }
++
++ return !mem_volatile_p && reg_unused_after (insn, base)
++ ? avr_asm_len ("st %0+,%A1" CR_TAB
++ "st %0,%B1", op, plen, -2)
++ : avr_asm_len (TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %0,%B1" CR_TAB
++ "st -%0,%A1", op, plen, -4);
++}
++
++static const char*
++avr_out_movhi_mr_r_reg_disp_tiny (rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx src = op[1];
++ rtx base = XEXP (dest, 0);
++ int reg_base = REGNO (XEXP (base, 0));
++ int reg_src = true_regnum (src);
++ op[2] = XEXP (base, 0);
++
++ return reg_src == reg_base
++ ? avr_asm_len ("mov __tmp_reg__,%A1" CR_TAB
++ "mov __zero_reg__,%B1" CR_TAB
++ TINY_ADIW (%A2, %B2, %o0+1) CR_TAB
++ "st %b0,__zero_reg__" CR_TAB
++ "st -%b0,__tmp_reg__" CR_TAB
++ "clr __zero_reg__" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0), op, plen, -9)
++
++ : avr_asm_len (TINY_ADIW (%A2, %B2, %o0+1) CR_TAB
++ "st %b0,%B1" CR_TAB
++ "st -%b0,%A1" CR_TAB
++ TINY_SBIW (%A2, %B2, %o0), op, plen, -6);
++}
++
++static const char*
++avr_out_movhi_mr_r_post_inc_tiny (rtx op[], int *plen)
++{
++ rtx dest = op[0];
++ rtx base = XEXP (dest, 0);
++ op[2] = XEXP (base, 0);
++
++ return avr_asm_len (TINY_ADIW (%A2, %B2, 1) CR_TAB
++ "st %p0,%B1" CR_TAB
++ "st -%p0,%A1" CR_TAB
++ TINY_ADIW (%A2, %B2, 2), op, plen, -6);
++}
+
+ static const char*
+ out_movhi_mr_r (rtx insn, rtx op[], int *plen)
+@@ -3964,6 +4583,9 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+
+ if (reg_base > 0)
+ {
++ if (AVR_TINY)
++ return avr_out_movhi_mr_r_reg_no_disp_tiny (insn, op, plen);
++
+ if (reg_base != REG_X)
+ return avr_asm_len ("std %0+1,%B1" CR_TAB
+ "st %0,%A1", op, plen, -2);
+@@ -3992,6 +4614,10 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+ else if (GET_CODE (base) == PLUS)
+ {
+ int disp = INTVAL (XEXP (base, 1));
++
++ if (AVR_TINY)
++ return avr_out_movhi_mr_r_reg_disp_tiny (op, plen);
++
+ reg_base = REGNO (XEXP (base, 0));
+ if (disp > MAX_LD_OFFSET (GET_MODE (dest)))
+ {
+@@ -4040,6 +4666,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+ if (!mem_volatile_p)
+ return avr_asm_len ("st %0,%A1" CR_TAB
+ "st %0,%B1", op, plen, -2);
++ if (AVR_TINY)
++ return avr_out_movhi_mr_r_post_inc_tiny (op, plen);
+
+ return REGNO (XEXP (base, 0)) == REG_X
+ ? avr_asm_len ("adiw r26,1" CR_TAB
+@@ -4212,7 +4840,11 @@ avr_out_compare (rtx insn, rtx *xop, int
+ && (val8 == 0
+ || reg_unused_after (insn, xreg)))
+ {
+- avr_asm_len ("sbiw %0,%1", xop, plen, 1);
++ if (AVR_TINY)
++ avr_asm_len (TINY_SBIW (%A0, %B0, %1), xop, plen, 2);
++ else
++ avr_asm_len ("sbiw %0,%1", xop, plen, 1);
++
+ i++;
+ continue;
+ }
+@@ -4222,7 +4854,9 @@ avr_out_compare (rtx insn, rtx *xop, int
+ && compare_eq_p (insn)
+ && reg_unused_after (insn, xreg))
+ {
+- return avr_asm_len ("adiw %0,%n1", xop, plen, 1);
++ return AVR_TINY
++ ? avr_asm_len (TINY_ADIW (%A0, %B0, %n1), xop, plen, 2)
++ : avr_asm_len ("adiw %0,%n1", xop, plen, 1);
+ }
+ }
+
+@@ -7411,10 +8045,10 @@ avr_file_start (void)
+ fprintf (asm_out_file, "__RAMPX__ = 0x%02x\n", avr_addr.rampx - sfr_offset);
+ if (AVR_HAVE_RAMPD)
+ fprintf (asm_out_file, "__RAMPD__ = 0x%02x\n", avr_addr.rampd - sfr_offset);
+- if (AVR_XMEGA)
++ if (AVR_XMEGA || AVR_TINY)
+ fprintf (asm_out_file, "__CCP__ = 0x%02x\n", avr_addr.ccp - sfr_offset);
+- fprintf (asm_out_file, "__tmp_reg__ = %d\n", TMP_REGNO);
+- fprintf (asm_out_file, "__zero_reg__ = %d\n", ZERO_REGNO);
++ fprintf (asm_out_file, "__tmp_reg__ = %d\n", AVR_TMP_REGNO);
++ fprintf (asm_out_file, "__zero_reg__ = %d\n", AVR_ZERO_REGNO);
+ }
+
+
+@@ -7461,6 +8095,17 @@ order_regs_for_local_alloc (void)
+ 0,1,
+ 32,33,34,35
+ };
++ static const int tiny_order_0[] = {
++ 24,25,
++ 22,23,
++ 30,31,
++ 26,27,
++ 28,29,
++ 21,20,19,18,
++ 16,17,
++ 32,33,34,35,
++ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
++ };
+ static const int order_1[] = {
+ 18,19,
+ 20,21,
+@@ -7473,6 +8118,17 @@ order_regs_for_local_alloc (void)
+ 0,1,
+ 32,33,34,35
+ };
++ static const int tiny_order_1[] = {
++ 22,23,
++ 24,25,
++ 30,31,
++ 26,27,
++ 28,29,
++ 21,20,19,18,
++ 16,17,
++ 32,33,34,35,
++ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
++ };
+ static const int order_2[] = {
+ 25,24,
+ 23,22,
+@@ -7487,9 +8143,14 @@ order_regs_for_local_alloc (void)
+ 32,33,34,35
+ };
+
+- const int *order = (TARGET_ORDER_1 ? order_1 :
+- TARGET_ORDER_2 ? order_2 :
+- order_0);
++ /*
++ Select specific register allocation order. Tiny Core (attiny4/5/9/10/20/40)
++ devices has only 16 registers, so different allocation order should be used
++ */
++ const int *order = (TARGET_ORDER_1 ? (AVR_TINY ? tiny_order_1 : order_1) :
++ TARGET_ORDER_2 ? (AVR_TINY ? tiny_order_1 : order_2) :
++ (AVR_TINY ? tiny_order_0 : order_0));
++
+ for (i=0; i < ARRAY_SIZE (order_0); ++i)
+ reg_alloc_order[i] = order[i];
+ }
+@@ -9151,7 +9812,7 @@ output_reload_in_const (rtx *op, rtx clo
+ {
+ if (!clear_p)
+ avr_asm_len (ldreg_p ? "ldi %0,0"
+- : ZERO_REGNO == REGNO (xdest[n]) ? "clr %0"
++ : AVR_ZERO_REGNO == REGNO (xdest[n]) ? "clr %0"
+ : "mov %0,__zero_reg__",
+ &xdest[n], len, 1);
+ continue;
+@@ -9350,6 +10011,50 @@ avr_output_addr_vec_elt (FILE *stream, i
+ fprintf (stream, "\trjmp .L%d\n", value);
+ }
+
++static void
++avr_conditional_register_usage(void) {
++
++ if (AVR_TINY) {
++ unsigned int i;
++
++ const int tiny_reg_alloc_order[] = {
++ 24,25,
++ 22,23,
++ 30,31,
++ 26,27,
++ 28,29,
++ 21,20,19,18,
++ 16,17,
++ 32,33,34,35,
++ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
++ };
++
++ /* Set R0-R17 as fixed registers. Reset R0-R17 in call used register list
++ - R0-R15 are not available in Tiny Core devices
++ - R16 and R17 are fixed registers
++ */
++ for (i = 0; i <= 17; i++) {
++ fixed_regs[i] = 1;
++ call_used_regs[i] = 1;
++ }
++
++ /* Set R18 to R21 as callee saved registers
++ - R18, R19, R20 and R21 are the callee saved registers in Tiny Core devices
++ */
++ for (i = 18; i <= LAST_CALLEE_SAVED_REG; i++) {
++ call_used_regs[i] = 0;
++ }
++
++ /*update register allocation order for Tiny Core devices */
++ for (i=0; i < ARRAY_SIZE (tiny_reg_alloc_order); i++) {
++ reg_alloc_order[i] = tiny_reg_alloc_order[i];
++ }
++
++ CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]);
++ CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]);
++ }
++}
++
+ /* Returns true if SCRATCH are safe to be allocated as a scratch
+ registers (for a define_peephole2) in the current function. */
+
+@@ -9495,13 +10200,20 @@ avr_asm_out_dtor (rtx symbol, int priori
+ static bool
+ avr_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
+ {
+- if (TYPE_MODE (type) == BLKmode)
+- {
+- HOST_WIDE_INT size = int_size_in_bytes (type);
+- return (size == -1 || size > 8);
+- }
++ HOST_WIDE_INT size = int_size_in_bytes (type);
++ HOST_WIDE_INT ret_size_limit = AVR_TINY ? 4 : 8;
++
++ /* In avr, there are 8 return registers. But, for Tiny Core
++ (attiny4/5/9/10/20/40) devices, only 4 registers available.
++ Return true if size is unknown or greater than the limit */
++ if ((size == -1) || (size > ret_size_limit))
++ {
++ return true;
++ }
+ else
++ {
+ return false;
++ }
+ }
+
+ /* Worker function for CASE_VALUES_THRESHOLD. */
+@@ -10949,6 +11661,9 @@ avr_fold_builtin (tree fndecl, int n_arg
+ #undef TARGET_BUILTIN_SETJMP_FRAME_VALUE
+ #define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value
+
++#undef TARGET_CONDITIONAL_REGISTER_USAGE
++#define TARGET_CONDITIONAL_REGISTER_USAGE avr_conditional_register_usage
++
+ #undef TARGET_HARD_REGNO_SCRATCH_OK
+ #define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok
+ #undef TARGET_CASE_VALUES_THRESHOLD
+diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
+--- gcc/config/avr/avr-c.c 2012-09-05 17:49:47.000000000 +0530
++++ gcc/config/avr/avr-c.c 2013-01-21 18:40:04.000000000 +0530
+@@ -113,6 +113,23 @@ avr_cpu_cpp_builtins (struct cpp_reader
+ }
+ if (AVR_XMEGA)
+ cpp_define (pfile, "__AVR_XMEGA__");
++
++ if (AVR_TINY)
++ {
++ cpp_define (pfile, "__AVR_TINY__");
++
++ /* Define macro "__AVR_TINY_PM_BASE_ADDRESS__" with mapped program memory
++ start address. This macro shall be referred where mapped program memory
++ is accessed. (Eg. copying data section (do_copy_data) contents to data
++ memory region.
++ NOTE:
++ Program memory of AVR_TINY devices can not be accessed directly, it has
++ been mapped to the data memory. For AVR_TINY devices (ATtiny4/ 5/ 9/ 10/
++ 20 and 40) mapped program memory starts at 0x4000.
++ */
++ cpp_define (pfile, "__AVR_TINY_PM_BASE_ADDRESS__=0x4000");
++ }
++
+ if (avr_current_arch->have_eijmp_eicall)
+ {
+ cpp_define (pfile, "__AVR_HAVE_EIJMP_EICALL__");
+diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
+--- gcc/config/avr/avr-devices.c 2012-08-06 20:04:27.000000000 +0530
++++ gcc/config/avr/avr-devices.c 2013-01-21 18:40:04.000000000 +0530
+@@ -30,29 +30,30 @@ const struct base_arch_s
+ avr_arch_types[] =
+ {
+ /* unknown device specified */
+- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, NULL, "avr2" },
++ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, NULL, "avr2" },
+ /*
+- A M J LM E E E X R d S S O A
+- S U M PO L L I M A a t F ff r
+- M L P MV P P J E M t a R s c
+- XW M M M G P a r e h
+- X P A D t t ID */
+- { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "1", "avr1" },
+- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "2", "avr2" },
+- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, "25", "avr25" },
+- { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "3", "avr3" },
+- { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0x0060, 32, "31", "avr31" },
+- { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0x0060, 32, "35", "avr35" },
+- { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, "4", "avr4" },
+- { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, 32, "5", "avr5" },
+- { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 32, "51", "avr51" },
+- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, 32, "6", "avr6" },
++ A M J LM E E E X R T d S S O A
++ S U M PO L L I M A I a t F ff r
++ M L P MV P P J E M N t a R s c
++ XW M M M G P Y a r e h
++ X P A D t t ID */
++ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "1", "avr1" },
++ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "2", "avr2" },
++ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "25", "avr25" },
++ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "3", "avr3" },
++ { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, "31", "avr31" },
++ { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "35", "avr35" },
++ { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "4", "avr4" },
++ { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "5", "avr5" },
++ { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, 32, "51", "avr51" },
++ { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 32, "6", "avr6" },
+
+- { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000, 0, "102", "avrxmega2" },
+- { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000, 0, "104", "avrxmega4" },
+- { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000, 0, "105", "avrxmega5" },
+- { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, 0, "106", "avrxmega6" },
+- { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000, 0, "107", "avrxmega7" }
++ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, 0, "100", "avrtiny" },
++ { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0, "102", "avrxmega2" },
++ { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, 0, "104", "avrxmega4" },
++ { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, 0, "105", "avrxmega5" },
++ { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, 0, "106", "avrxmega6" },
++ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, 0, "107", "avrxmega7" }
+ };
+
+ const struct mcu_type_s avr_mcu_types[] = {
+diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
+--- gcc/config/avr/avr.h 2013-01-21 18:26:07.000000000 +0530
++++ gcc/config/avr/avr.h 2013-01-21 18:40:04.000000000 +0530
+@@ -52,6 +52,9 @@ struct base_arch_s
+ /* This core has the RAMPD special function register
+ and thus also the RAMPX, RAMPY and RAMPZ registers. */
+ int have_rampd;
++
++ /* This is a TINY core. */
++ int tiny_p;
+
+ /* Default start of data section address for architecture. */
+ int default_data_section_start;
+@@ -83,6 +86,7 @@ enum avr_arch
+ ARCH_AVR5,
+ ARCH_AVR51,
+ ARCH_AVR6,
++ ARCH_AVRTINY,
+ ARCH_AVRXMEGA2,
+ ARCH_AVRXMEGA4,
+ ARCH_AVRXMEGA5,
+@@ -213,6 +217,7 @@ enum
+ #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
+
+ #define AVR_XMEGA (avr_current_arch->xmega_p)
++#define AVR_TINY (avr_current_arch->tiny_p)
+
+ #define BITS_BIG_ENDIAN 0
+ #define BYTES_BIG_ENDIAN 0
+@@ -342,7 +347,6 @@ enum reg_class {
+ ALL_REGS, LIM_REG_CLASSES
+ };
+
+-
+ #define N_REG_CLASSES (int)LIM_REG_CLASSES
+
+ #define REG_CLASS_NAMES { \
+@@ -417,7 +421,7 @@ enum reg_class {
+
+ #define ARG_POINTER_REGNUM 34
+
+-#define STATIC_CHAIN_REGNUM 2
++#define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2)
+
+ #define ELIMINABLE_REGS { \
+ {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+diff -Naurp gcc/config/avr/avr-mcus.def gcc/config/avr/avr-mcus.def
+--- gcc/config/avr/avr-mcus.def 2012-09-10 16:16:27.000000000 +0530
++++ gcc/config/avr/avr-mcus.def 2013-01-21 18:40:04.000000000 +0530
+@@ -231,6 +231,14 @@ AVR_MCU ("atxmega256d3", ARCH_AVRXME
+ AVR_MCU ("avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0, 0x2000, 3, "x128a1")
+ AVR_MCU ("atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0, 0x2000, 3, "x128a1")
+ AVR_MCU ("atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0, 0x2000, 3, "x128a1u")
++/* Tiny family */
++AVR_MCU ("avrtiny", ARCH_AVRTINY, NULL, 0, 0, 0x0040, 1, "tn10")
++AVR_MCU ("attiny4", ARCH_AVRTINY, "__AVR_ATtiny4__", 0, 0, 0x0040, 1, "tn4")
++AVR_MCU ("attiny5", ARCH_AVRTINY, "__AVR_ATtiny5__", 0, 0, 0x0040, 1, "tn5")
++AVR_MCU ("attiny9", ARCH_AVRTINY, "__AVR_ATtiny9__", 0, 0, 0x0040, 1, "tn9")
++AVR_MCU ("attiny10", ARCH_AVRTINY, "__AVR_ATtiny10__", 0, 0, 0x0040, 1, "tn10")
++AVR_MCU ("attiny20", ARCH_AVRTINY, "__AVR_ATtiny20__", 0, 0, 0x0040, 1, "tn20")
++AVR_MCU ("attiny40", ARCH_AVRTINY, "__AVR_ATtiny40__", 0, 0, 0x0040, 1, "tn40")
+ /* Assembler only. */
+ AVR_MCU ("avr1", ARCH_AVR1, NULL, 0, 0, 0x0060, 1, "s1200")
+ AVR_MCU ("at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0, 0x0060, 1, "s1200")
+diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
+--- gcc/config/avr/avr.md 2012-03-22 20:36:57.000000000 +0530
++++ gcc/config/avr/avr.md 2013-01-21 18:40:04.000000000 +0530
+@@ -59,6 +59,11 @@
+ (ZERO_REGNO 1) ; zero register r1
+ ])
+
++(define_constants
++ [ (TMP_REGNO_TINY 16) ; r16 is temp register for TINY10
++ (ZERO_REGNO_TINY 17) ; r17 is zero register for TINY10
++ ])
++
+ (define_c_enum "unspec"
+ [UNSPEC_STRLEN
+ UNSPEC_MOVMEM
+@@ -158,9 +163,10 @@
+ ;; lpm : ISA has no LPMX lpmx : ISA has LPMX
+ ;; elpm : ISA has ELPM but no ELPMX elpmx : ISA has ELPMX
+ ;; no_xmega: non-XMEGA core xmega : XMEGA core
++;; no_tiny: non-TINY core tiny : TINY core
+
+ (define_attr "isa"
+- "mov,movw, rjmp,jmp, ijmp,eijmp, lpm,lpmx, elpm,elpmx, no_xmega,xmega,
++ "mov,movw, rjmp,jmp, ijmp,eijmp, lpm,lpmx, elpm,elpmx, no_xmega,xmega, no_tiny,tiny,
+ standard"
+ (const_string "standard"))
+
+@@ -212,9 +218,18 @@
+ (match_test "AVR_XMEGA"))
+ (const_int 1)
+
++ (and (eq_attr "isa" "tiny")
++ (match_test "AVR_TINY"))
++ (const_int 1)
++
+ (and (eq_attr "isa" "no_xmega")
+ (match_test "!AVR_XMEGA"))
+ (const_int 1)
++
++ (and (eq_attr "isa" "no_tiny")
++ (match_test "!AVR_TINY"))
++ (const_int 1)
++
+ ] (const_int 0)))
+
+
+@@ -5413,18 +5428,18 @@
+ (set_attr "cc" "clobber")])
+
+ (define_insn "delay_cycles_2"
+- [(unspec_volatile [(match_operand:HI 0 "const_int_operand" "n")
++ [(unspec_volatile [(match_operand:HI 0 "const_int_operand" "n,n")
+ (const_int 2)]
+ UNSPECV_DELAY_CYCLES)
+ (set (match_operand:BLK 1 "" "")
+ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
+- (clobber (match_scratch:HI 2 "=&w"))]
++ (clobber (match_scratch:HI 2 "=&w,&d"))]
+ ""
+- "ldi %A2,lo8(%0)
+- ldi %B2,hi8(%0)
+- 1: sbiw %A2,1
+- brne 1b"
+- [(set_attr "length" "4")
++ "@
++ ldi %A2,lo8(%0)\;ldi %B2,hi8(%0)\;1: sbiw %A2,1\;brne 1b
++ ldi %A2,lo8(%0)\;ldi %B2,hi8(%0)\;1: subi %A2,1\;sbci %B2,0\;brne 1b"
++ [(set_attr "length" "4,5")
++ (set_attr "isa" "no_tiny,tiny")
+ (set_attr "cc" "clobber")])
+
+ (define_insn "delay_cycles_3"
+diff -Naurp gcc/config/avr/avr-tables.opt gcc/config/avr/avr-tables.opt
+--- gcc/config/avr/avr-tables.opt 2012-09-20 12:53:55.000000000 +0530
++++ gcc/config/avr/avr-tables.opt 2013-01-21 18:40:04.000000000 +0530
+@@ -579,20 +579,41 @@ EnumValue
+ Enum(avr_mcu) String(atxmega128a1u) Value(184)
+
+ EnumValue
+-Enum(avr_mcu) String(avr1) Value(185)
++Enum(avr_mcu) String(avrtiny) Value(185)
+
+ EnumValue
+-Enum(avr_mcu) String(at90s1200) Value(186)
++Enum(avr_mcu) String(attiny4) Value(186)
+
+ EnumValue
+-Enum(avr_mcu) String(attiny11) Value(187)
++Enum(avr_mcu) String(attiny5) Value(187)
+
+ EnumValue
+-Enum(avr_mcu) String(attiny12) Value(188)
++Enum(avr_mcu) String(attiny9) Value(188)
+
+ EnumValue
+-Enum(avr_mcu) String(attiny15) Value(189)
++Enum(avr_mcu) String(attiny10) Value(189)
+
+ EnumValue
+-Enum(avr_mcu) String(attiny28) Value(190)
++Enum(avr_mcu) String(attiny20) Value(190)
++
++EnumValue
++Enum(avr_mcu) String(attiny40) Value(191)
++
++EnumValue
++Enum(avr_mcu) String(avr1) Value(192)
++
++EnumValue
++Enum(avr_mcu) String(at90s1200) Value(193)
++
++EnumValue
++Enum(avr_mcu) String(attiny11) Value(194)
++
++EnumValue
++Enum(avr_mcu) String(attiny12) Value(195)
++
++EnumValue
++Enum(avr_mcu) String(attiny15) Value(196)
++
++EnumValue
++Enum(avr_mcu) String(attiny28) Value(197)
+
+diff -Naurp gcc/config/avr/t-multilib gcc/config/avr/t-multilib
+--- gcc/config/avr/t-multilib 2012-09-20 12:53:55.000000000 +0530
++++ gcc/config/avr/t-multilib 2013-01-21 18:40:04.000000000 +0530
+@@ -21,9 +21,9 @@
+ # along with GCC; see the file COPYING3. If not see
+ # <http://www.gnu.org/licenses/>.
+
+-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7 msp8
++MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7/mmcu=avrtiny msp8
+
+-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 tiny-stack avr25/tiny-stack
++MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny tiny-stack avr25/tiny-stack
+
+ MULTILIB_EXCEPTIONS = \
+ mmcu=avr3/msp8 \
+@@ -37,7 +37,8 @@ MULTILIB_EXCEPTIONS = \
+ mmcu=avrxmega4/msp8 \
+ mmcu=avrxmega5/msp8 \
+ mmcu=avrxmega6/msp8 \
+- mmcu=avrxmega7/msp8
++ mmcu=avrxmega7/msp8 \
++ mmcu=avrtiny/msp8
+
+ MULTILIB_MATCHES = \
+ mmcu?avr2=mmcu?at90s2313 \
+@@ -210,4 +211,10 @@ MULTILIB_MATCHES = \
+ mmcu?avrxmega6=mmcu?atxmega256a3bu \
+ mmcu?avrxmega6=mmcu?atxmega256d3 \
+ mmcu?avrxmega7=mmcu?atxmega128a1 \
+- mmcu?avrxmega7=mmcu?atxmega128a1u
++ mmcu?avrxmega7=mmcu?atxmega128a1u \
++ mmcu?avrtiny=mmcu?attiny4 \
++ mmcu?avrtiny=mmcu?attiny5 \
++ mmcu?avrtiny=mmcu?attiny9 \
++ mmcu?avrtiny=mmcu?attiny10 \
++ mmcu?avrtiny=mmcu?attiny20 \
++ mmcu?avrtiny=mmcu?attiny40
+diff -Naurp libgcc/config/avr/lib1funcs.S libgcc/config/avr/lib1funcs.S
+--- libgcc/config/avr/lib1funcs.S 2012-03-28 14:34:11.000000000 +0530
++++ libgcc/config/avr/lib1funcs.S 2013-01-21 18:58:03.000000000 +0530
+@@ -22,8 +22,13 @@ a copy of the GCC Runtime Library Except
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
++#if defined (__AVR_TINY__)
++#define __zero_reg__ r17
++#define __tmp_reg__ r16
++#else
+ #define __zero_reg__ r1
+ #define __tmp_reg__ r0
++#endif
+ #define __SREG__ 0x3f
+ #if defined (__AVR_HAVE_SPH__)
+ #define __SP_H__ 0x3e
+@@ -80,6 +85,15 @@ see the files COPYING3 and COPYING.RUNTI
+ #define XJMP rjmp
+ #endif
+
++.macro wsubi r_arg1, i_arg2
++#if defined (__AVR_TINY__)
++ subi \r_arg1, lo8(\i_arg2)
++ sbci \r_arg1+1, hi8(\i_arg2)
++#else
++ sbiw \r_arg1, \i_arg2
++#endif
++.endm
++
+ .macro DEFUN name
+ .global \name
+ .func \name
+@@ -150,12 +164,12 @@ ENDF __umulqihi3
+ Multiplication 16 x 16 without MUL
+ *******************************************************/
+ #if defined (L_mulhi3)
+-#define r_arg1L r24 /* multiplier Low */
+-#define r_arg1H r25 /* multiplier High */
+-#define r_arg2L r22 /* multiplicand Low */
+-#define r_arg2H r23 /* multiplicand High */
++#define r_arg1L 24 /* multiplier Low */
++#define r_arg1H 25 /* multiplier High */
++#define r_arg2L 22 /* multiplicand Low */
++#define r_arg2H 23 /* multiplicand High */
+ #define r_resL __tmp_reg__ /* result Low */
+-#define r_resH r21 /* result High */
++#define r_resH 21 /* result High */
+
+ DEFUN __mulhi3
+ clr r_resH ; clear result
+@@ -175,7 +189,7 @@ __mulhi3_skip1:
+
+ lsr r_arg1H ; gets LSB of multiplier
+ ror r_arg1L
+- sbiw r_arg1L,0
++ wsubi r_arg1L,0
+ brne __mulhi3_loop ; exit if multiplier = 0
+ __mulhi3_exit:
+ mov r_arg1H,r_resH ; result to return register
+@@ -230,22 +244,34 @@ ENDF __umulhisi3
+ /*******************************************************
+ Multiplication 32 x 32 without MUL
+ *******************************************************/
+-#define r_arg1L r22 /* multiplier Low */
+-#define r_arg1H r23
+-#define r_arg1HL r24
+-#define r_arg1HH r25 /* multiplier High */
+-
+-#define r_arg2L r18 /* multiplicand Low */
+-#define r_arg2H r19
+-#define r_arg2HL r20
+-#define r_arg2HH r21 /* multiplicand High */
++#define r_arg1L 22 /* multiplier Low */
++#define r_arg1H 23
++#define r_arg1HL 24
++#define r_arg1HH 25 /* multiplier High */
++
++#define r_arg2L 18 /* multiplicand Low */
++#define r_arg2H 19
++#define r_arg2HL 20
++#define r_arg2HH 21 /* multiplicand High */
+
+-#define r_resL r26 /* result Low */
+-#define r_resH r27
+-#define r_resHL r30
+-#define r_resHH r31 /* result High */
++#define r_resL 26 /* result Low */
++#define r_resH 27
++#define r_resHL 30
++#define r_resHH 31 /* result High */
+
+ DEFUN __mulsi3
++#if defined (__AVR_TINY__)
++ in r26,__SP_L__ ; safe to use X, as it is r_resL/H
++ in r27,__SP_H__
++ subi r26, lo8(-3) ; Add 3 to point past return address
++ sbci r27, hi8(-3)
++ push r_arg2L ; save callee saved regs
++ push r_arg2H
++ ld r_arg2L,X+ ; load from caller stack
++ ld r_arg2H,X+
++ ld r_arg2HL,X+
++ ld r_arg2HH,X
++#endif /* defined (__AVR_TINY__) */
+ clr r_resHH ; clear result
+ clr r_resHL ; clear result
+ clr r_resH ; clear result
+@@ -268,7 +294,7 @@ __mulsi3_skip1:
+ ror r_arg1H
+ ror r_arg1L
+ brne __mulsi3_loop
+- sbiw r_arg1HL,0
++ wsubi r_arg1HL,0
+ cpc r_arg1H,r_arg1L
+ brne __mulsi3_loop ; exit if multiplier = 0
+ __mulsi3_exit:
+@@ -276,6 +302,10 @@ __mulsi3_exit:
+ mov_l r_arg1HL,r_resHL
+ mov_h r_arg1H,r_resH
+ mov_l r_arg1L,r_resL
++#if defined (__AVR_TINY__)
++ pop r_arg2H ; restore callee saved regs
++ pop r_arg2L
++#endif /* defined (__AVR_TINY__) */
+ ret
+ ENDF __mulsi3
+
+@@ -514,9 +544,12 @@ ENDF __mulpsi3
+ #undef C0
+
+ #else /* !HAVE_MUL */
+-
+ ;; C[0..2]: Expand Result
++#if defined (__AVR_TINY__)
++#define C0 16
++#else
+ #define C0 0
++#endif /* defined (__AVR_TINY__) */
+ #define C1 C0+1
+ #define C2 21
+
+@@ -524,6 +557,17 @@ ENDF __mulpsi3
+ ;; Clobbers: __tmp_reg__, R18, R19, R20, R21
+
+ DEFUN __mulpsi3
++#if defined (__AVR_TINY__)
++ in r26,__SP_L__
++ in r27,__SP_H__
++ subi r26, lo8(-3) ; Add 3 to point past return address
++ sbci r27, hi8(-3)
++ push B0 ; save callee saved regs
++ push B1
++ ld B0,X+ ; load from caller stack
++ ld B1,X+
++ ld B2,X+
++#endif /* defined (__AVR_TINY__) */
+
+ ;; C[] = 0
+ clr __tmp_reg__
+@@ -550,6 +594,10 @@ DEFUN __mulpsi3
+ mov A2, C2
+
+ clr __zero_reg__
++#if defined (__AVR_TINY__)
++ pop B1
++ pop B0
++#endif /* (__AVR_TINY__) */
+ ret
+ ENDF __mulpsi3
+
+@@ -618,6 +666,7 @@ ENDF __mulsqipsi3
+ Multiplication 64 x 64
+ *******************************************************/
+
++#if !defined (__AVR_TINY__)
+ #if defined (L_muldi3)
+
+ ;; A[] = A[] * B[]
+@@ -855,6 +904,7 @@ ENDF __muldi3
+ #undef A0
+
+ #endif /* L_muldi3 */
++#endif /* !defined (__AVR_TINY__) */
+
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+@@ -1027,7 +1077,7 @@ ENDF __divmodhi4
+ #define r_cnt 21
+
+ #if defined (L_udivmodpsi4)
+-;; R24:R22 = R24:R22 udiv R20:R18
++;; R24:R22 = R24:R24 udiv R20:R18
+ ;; R20:R18 = R24:R22 umod R20:R18
+ ;; Clobbers: R21, R25, R26
+
+@@ -1248,6 +1298,10 @@ ENDF __divmodsi4
+ #endif /* defined (L_divmodsi4) */
+
+
++/* *di routines use registers below R19 and won't work with tiny arch
++ right now. */
++
++#if !defined (__AVR_TINY__)
+ /*******************************************************
+ Division 64 / 64
+ Modulo 64 % 64
+@@ -1665,12 +1719,15 @@ ENDF __negdi2
+ #undef A1
+ #undef A0
+
++#endif /* !defined (__AVR_TINY__) */
++
+ \f
+ .section .text.libgcc.prologue, "ax", @progbits
+
+ /**********************************
+ * This is a prologue subroutine
+ **********************************/
++#if !defined (__AVR_TINY__)
+ #if defined (L_prologue)
+
+ ;; This function does not clobber T-flag; 64-bit division relies on it
+@@ -1776,6 +1833,7 @@ DEFUN __epilogue_restores__
+ ret
+ ENDF __epilogue_restores__
+ #endif /* defined (L_epilogue) */
++#endif /* !defined (__AVR_TINY__) */
+
+ #ifdef L_exit
+ .section .fini9,"ax",@progbits
+@@ -1820,8 +1878,13 @@ DEFUN __tablejump__
+ #else
+ ijmp
+ #endif
+-
+-#else /* !HAVE_LPMX */
++#elif defined (__AVR_TINY__)
++ wsubi 30, -(__AVR_TINY_PM_BASE_ADDRESS__) ; Add PM offset to Z
++ ld __tmp_reg__, Z+
++ ld r31, Z ; Use ld instead of lpm to load Z
++ mov r30, __tmp_reg__
++ ijmp
++#else /* !HAVE_LPMX && !AVR_TINY */
+ lpm
+ adiw r30, 1
+ push r0
+@@ -1836,6 +1899,26 @@ DEFUN __tablejump__
+ ENDF __tablejump__
+ #endif /* defined (L_tablejump) */
+
++#if defined(__AVR_TINY__)
++#ifdef L_copy_data
++ .section .init4,"ax",@progbits
++ .global __do_copy_data
++__do_copy_data:
++ ldi r18, hi8(__data_end)
++ ldi r26, lo8(__data_start)
++ ldi r27, hi8(__data_start)
++ ldi r30, lo8(__data_load_start + __AVR_TINY_PM_BASE_ADDRESS__)
++ ldi r31, hi8(__data_load_start + __AVR_TINY_PM_BASE_ADDRESS__)
++ rjmp .L__do_copy_data_start
++.L__do_copy_data_loop:
++ ld r19, z+
++ st X+, r19
++.L__do_copy_data_start:
++ cpi r26, lo8(__data_end)
++ cpc r27, r18
++ brne .L__do_copy_data_loop
++#endif
++#else
+ #ifdef L_copy_data
+ .section .init4,"ax",@progbits
+ DEFUN __do_copy_data
+@@ -1901,13 +1984,14 @@ DEFUN __do_copy_data
+ #endif /* ELPM && RAMPD */
+ ENDF __do_copy_data
+ #endif /* L_copy_data */
++#endif /* !defined (__AVR_TINY__) */
+
+ /* __do_clear_bss is only necessary if there is anything in .bss section. */
+
+ #ifdef L_clear_bss
+ .section .init4,"ax",@progbits
+ DEFUN __do_clear_bss
+- ldi r17, hi8(__bss_end)
++ ldi r18, hi8(__bss_end)
+ ldi r26, lo8(__bss_start)
+ ldi r27, hi8(__bss_start)
+ rjmp .do_clear_bss_start
+@@ -1915,7 +1999,7 @@ DEFUN __do_clear_bss
+ st X+, __zero_reg__
+ .do_clear_bss_start:
+ cpi r26, lo8(__bss_end)
+- cpc r27, r17
++ cpc r27, r18
+ brne .do_clear_bss_loop
+ ENDF __do_clear_bss
+ #endif /* L_clear_bss */
+@@ -1951,7 +2035,7 @@ DEFUN __do_global_ctors
+ ldi r29, hi8(__ctors_end)
+ rjmp .L__do_global_ctors_start
+ .L__do_global_ctors_loop:
+- sbiw r28, 2
++ wsubi r28, 2
+ mov_h r31, r29
+ mov_l r30, r28
+ XCALL __tablejump__
+@@ -1994,7 +2078,11 @@ DEFUN __do_global_dtors
+ mov_h r31, r29
+ mov_l r30, r28
+ XCALL __tablejump__
+- adiw r28, 2
++#if defined (__AVR_TINY__)
++ wsubi r28, -2
++#else
++ adiw r28, 2
++#endif
+ .L__do_global_dtors_start:
+ cpi r28, lo8(__dtors_end)
+ cpc r29, r17
+@@ -2005,6 +2093,7 @@ ENDF __do_global_dtors
+
+ .section .text.libgcc, "ax", @progbits
+
++#if !defined (__AVR_TINY__)
+ #ifdef L_tablejump_elpm
+ DEFUN __tablejump_elpm__
+ #if defined (__AVR_HAVE_ELPMX__)
+@@ -2035,7 +2124,9 @@ DEFUN __tablejump_elpm__
+ #endif
+ ENDF __tablejump_elpm__
+ #endif /* defined (L_tablejump_elpm) */
++#endif /* !defined (__AVR_TINY__) */
+
++#if !defined (__AVR_TINY__)
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; Loading n bytes from Flash; n = 3,4
+ ;; R22... = Flash[Z]
+@@ -2081,7 +2172,9 @@ ENDF __load_4
+ #endif /* L_load_4 */
+
+ #endif /* L_load_3 || L_load_3 */
++#endif /* !defined (__AVR_TINY__) */
+
++#if !defined (__AVR_TINY__)
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; Loading n bytes from Flash or RAM; n = 1,2,3,4
+ ;; R22... = Flash[R21:Z] or RAM[Z] depending on R21.7
+@@ -2207,7 +2300,9 @@ ENDF __xload_4
+ #endif /* L_xload_4 */
+
+ #endif /* L_xload_{1|2|3|4} */
++#endif /* if !defined (__AVR_TINY__) */
+
++#if !defined (__AVR_TINY__)
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; memcopy from Address Space __pgmx to RAM
+ ;; R23:Z = Source Address
+@@ -2279,6 +2374,7 @@ ENDF __movmemx_hi
+ #undef LOOP
+
+ #endif /* L_movmemx */
++#endif /* !defined (__AVR_TINY__) */
+
+ \f
+ .section .text.libgcc.builtins, "ax", @progbits
+diff -Naurp libgcc/config/avr/t-avr libgcc/config/avr/t-avr
+--- libgcc/config/avr/t-avr 2012-01-10 15:12:10.000000000 +0530
++++ libgcc/config/avr/t-avr 2013-01-21 18:40:04.000000000 +0530
+@@ -1,13 +1,9 @@
+ LIB1ASMSRC = avr/lib1funcs.S
++
+ LIB1ASMFUNCS = \
+ _mulqi3 \
+ _mulhi3 \
+- _mulpsi3 _mulsqipsi3 \
+- _mulhisi3 \
+- _umulhisi3 \
+- _usmulhisi3 \
+- _muluhisi3 \
+- _mulshisi3 \
++ _mulpsi3 \
+ _mulsi3 \
+ _udivmodqi4 \
+ _divmodqi4 \
+@@ -16,19 +12,9 @@ LIB1ASMFUNCS = \
+ _divmodpsi4 _udivmodpsi4 \
+ _udivmodsi4 \
+ _divmodsi4 \
+- _divdi3 _udivdi3 \
+- _muldi3 \
+- _udivmod64 \
+- _negdi2 \
+- _prologue \
+- _epilogue \
+ _exit \
+ _cleanup \
+ _tablejump \
+- _tablejump_elpm \
+- _load_3 _load_4 \
+- _xload_1 _xload_2 _xload_3 _xload_4 \
+- _movmemx \
+ _copy_data \
+ _clear_bss \
+ _ctors \
+@@ -38,22 +24,52 @@ LIB1ASMFUNCS = \
+ _loop_ffsqi2 \
+ _ctzsi2 \
+ _ctzhi2 \
+- _clzdi2 \
+ _clzsi2 \
+ _clzhi2 \
+- _paritydi2 \
+ _paritysi2 \
+ _parityhi2 \
+ _popcounthi2 \
+ _popcountsi2 \
+- _popcountdi2 \
+ _popcountqi2 \
+ _bswapsi2 \
++ _fmul _fmuls _fmulsu
++
++# The below functions either use registers that are not present
++# in tiny core, or use a different register conventions (don't save
++# callee saved regs, for example)
++# _mulhisi3 and variations - clobber R18, R19
++# All *di funcs - use regs < R16 or expect args in regs < R20
++# _prologue and _epilogue save registers < R16
++# _tablejump/_tablejump_elmp - expect lpm and elpm support
++# _load ad _xload variations - expect lpm and elpm support
++# _movmemx - expects elpm/lpm
++
++ifneq ($(MULTIFLAGS),-mmcu=avrtiny)
++LIB1ASMFUNCS += \
++ _mulsqipsi3 \
++ _mulhisi3 \
++ _umulhisi3 \
++ _usmulhisi3 \
++ _muluhisi3 \
++ _mulshisi3 \
++ _divdi3 _udivdi3 \
++ _muldi3 \
++ _udivmod64 \
++ _negdi2 \
++ _prologue \
++ _epilogue \
++ _tablejump_elpm \
++ _load_3 _load_4 \
++ _xload_1 _xload_2 _xload_3 _xload_4 \
++ _movmemx \
++ _clzdi2 \
++ _paritydi2 \
++ _popcountdi2 \
+ _bswapdi2 \
+ _ashldi3 _ashrdi3 _lshrdi3 _rotldi3 \
+ _adddi3 _adddi3_s8 _subdi3 \
+- _cmpdi2 _cmpdi2_s8 \
+- _fmul _fmuls _fmulsu
++ _cmpdi2 _cmpdi2_s8
++endif
+
+ LIB2FUNCS_EXCLUDE = \
+ _moddi3 _umoddi3 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 16:55:55.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 17:00:24.000000000 +0530
-@@ -52,6 +52,7 @@ static void avr_option_override (void);
- static int avr_naked_function_p (tree);
- static int interrupt_function_p (tree);
- static int signal_function_p (tree);
-+static int nmi_function_p (tree);
- static int avr_OS_task_function_p (tree);
- static int avr_OS_main_function_p (tree);
- static int avr_regs_to_save (HARD_REG_SET *);
-@@ -131,6 +132,7 @@ static const struct attribute_spec avr_a
- { "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
- { "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
- { "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
-+ { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
- { "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
- { "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
- { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
-@@ -391,6 +393,21 @@ signal_function_p (tree func)
- return a != NULL_TREE;
- }
-
-+/* Return nonzero if FUNC is a nmi function as specified
-+ by the "nmi" attribute. */
-+
-+static int
-+nmi_function_p (tree func)
-+{
-+ tree a;
-+
-+ if (TREE_CODE (func) != FUNCTION_DECL)
-+ return 0;
-+
-+ a = lookup_attribute ("nmi", DECL_ATTRIBUTES (func));
-+ return a != NULL_TREE;
-+}
-+
- /* Return nonzero if FUNC is a OS_task function. */
-
- static int
-@@ -655,6 +672,7 @@ expand_prologue (void)
- cfun->machine->is_naked = avr_naked_function_p (current_function_decl);
- cfun->machine->is_interrupt = interrupt_function_p (current_function_decl);
- cfun->machine->is_signal = signal_function_p (current_function_decl);
-+ cfun->machine->is_nmi = nmi_function_p (current_function_decl);
- cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
- cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl);
- cfun->machine->stack_usage = 0;
-@@ -688,9 +706,40 @@ expand_prologue (void)
-
- /* Push SREG. */
- /* ??? There's no dwarf2 column reserved for SREG. */
-- emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
-+ emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
- emit_push_byte (TMP_REGNO, false);
-
-+ /* Push RAMPD, RAMPX, RAMPY. */
-+ /*
-+ Clear RAMP? registers if used for data access in the interrupt/signal
-+ context. Do this after the zero register has been explictly cleared.
-+ */
-+ if (AVR_HAVE_RAMPX_Y_D)
-+ {
-+ /* Push RAMPD. */
-+ emit_move_insn (tmp_reg_rtx,
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)));
-+ emit_push_byte (TMP_REGNO, false);
-+
-+ /* Push RAMPX. */
-+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
-+ {
-+ emit_move_insn (tmp_reg_rtx,
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)));
-+ emit_push_byte (TMP_REGNO, false);
-+ }
-+
-+ /* Push RAMPY. */
-+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
-+ {
-+ emit_move_insn (tmp_reg_rtx,
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)));
-+ emit_push_byte (TMP_REGNO, false);
-+ }
-+
-+ }
-+
-+
- /* Push RAMPZ. */
- /* ??? There's no dwarf2 column reserved for RAMPZ. */
- if (AVR_HAVE_RAMPZ
-@@ -698,7 +747,7 @@ expand_prologue (void)
- && TEST_HARD_REG_BIT (set, REG_Z + 1))
- {
- emit_move_insn (tmp_reg_rtx,
-- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
- emit_push_byte (TMP_REGNO, false);
- }
-
-@@ -707,6 +756,8 @@ expand_prologue (void)
-
- /* Prevent any attempt to delete the setting of ZERO_REG! */
- emit_use (zero_reg_rtx);
-+
-+
- }
- if (minimize && (frame_pointer_needed
- || (AVR_2_BYTE_PC && live_seq > 6)
-@@ -829,14 +880,14 @@ expand_prologue (void)
- {
- emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
- }
-- else if (TARGET_NO_INTERRUPTS
-+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS )
- || cfun->machine->is_signal
- || cfun->machine->is_OS_main)
- {
- emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
- frame_pointer_rtx));
- }
-- else if (cfun->machine->is_interrupt)
-+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
- {
- emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
- frame_pointer_rtx));
-@@ -1018,13 +1069,13 @@ expand_epilogue (void)
- {
- emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
- }
-- else if (TARGET_NO_INTERRUPTS
-- || cfun->machine->is_signal)
-+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
-+ || (!AVR_XMEGA && cfun->machine->is_signal))
- {
- emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
- frame_pointer_rtx));
- }
-- else if (cfun->machine->is_interrupt)
-+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
- {
- emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
- frame_pointer_rtx));
-@@ -1082,14 +1133,38 @@ expand_epilogue (void)
- && TEST_HARD_REG_BIT (set, REG_Z + 1))
- {
- emit_pop_byte (TMP_REGNO);
-- emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)),
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)),
- tmp_reg_rtx);
- }
-+ /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */
-+ if (AVR_HAVE_RAMPX_Y_D)
-+ {
-+ /* Pop RAMPY. */
-+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
-+ {
-+ emit_insn (gen_popqi (tmp_reg_rtx));
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
-+ tmp_reg_rtx);
-+ }
-+
-+ /* Pop RAMPX. */
-+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
-+ {
-+ emit_insn (gen_popqi (tmp_reg_rtx));
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
-+ tmp_reg_rtx);
-+ }
-+ /* Pop RAMPD. */
-+ emit_insn (gen_popqi (tmp_reg_rtx));
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
-+ tmp_reg_rtx);
-+
-+ }
-
- /* Restore SREG using tmp reg as scratch. */
- emit_pop_byte (TMP_REGNO);
-
-- emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)),
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)),
- tmp_reg_rtx);
-
- /* Restore tmp REG. */
-@@ -1880,9 +1955,17 @@ output_movhi (rtx insn, rtx operands[],
- return *l = 1, AS2 (out,__SP_L__,%A1);
- /* Use simple load of stack pointer if no interrupts are
- used. */
-- else if (TARGET_NO_INTERRUPTS)
-+ else if (!AVR_XMEGA && TARGET_NO_INTERRUPTS)
- return *l = 2, (AS2 (out,__SP_H__,%B1) CR_TAB
- AS2 (out,__SP_L__,%A1));
-+ if(AVR_XMEGA)
-+ {
-+ *l = 2;
-+ return (AS2 (out,__SP_L__,%A1) CR_TAB
-+ AS2 (out,__SP_H__,%B1));
-+ }
-+ else
-+ {
- *l = 5;
- return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
- "cli" CR_TAB
-@@ -1890,6 +1973,7 @@ output_movhi (rtx insn, rtx operands[],
- AS2 (out,__SREG__,__tmp_reg__) CR_TAB
- AS2 (out,__SP_L__,%A1));
- }
-+ }
- else if (test_hard_reg_class (STACK_REG, src))
- {
- *l = 2;
-@@ -2023,7 +2107,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
-
- if (CONSTANT_ADDRESS_P (x))
- {
-- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
-+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
- {
- *l = 1;
- return AS2 (in,%0,__SREG__);
-@@ -2031,7 +2115,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- if (optimize > 0 && io_address_operand (x, QImode))
- {
- *l = 1;
-- return AS2 (in,%0,%m1-0x20);
-+ op[2] = GEN_INT(AVR_IO_OFFSET);
-+ return AS2 (in,%0,%m1-%2);
- }
- *l = 2;
- return AS2 (lds,%0,%m1);
-@@ -2219,8 +2304,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- if (optimize > 0 && io_address_operand (base, HImode))
- {
- *l = 2;
-- return (AS2 (in,%A0,%m1-0x20) CR_TAB
-- AS2 (in,%B0,%m1+1-0x20));
-+ op[2] = GEN_INT(AVR_IO_OFFSET);
-+ return (AS2 (in,%A0,%m1-%2) CR_TAB
-+ AS2 (in,%B0,%m1+1-%2));
- }
- *l = 4;
- return (AS2 (lds,%A0,%m1) CR_TAB
-@@ -2719,7 +2805,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
-
- if (CONSTANT_ADDRESS_P (x))
- {
-- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
-+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
- {
- *l = 1;
- return AS2 (out,__SREG__,%1);
-@@ -2727,7 +2813,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- if (optimize > 0 && io_address_operand (x, QImode))
- {
- *l = 1;
-- return AS2 (out,%m0-0x20,%1);
-+ op[2] = GEN_INT(AVR_IO_OFFSET);
-+ return AS2 (out,%m0-%2,%1);
- }
- *l = 2;
- return AS2 (sts,%m0,%1);
-@@ -2806,9 +2893,18 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (optimize > 0 && io_address_operand (base, HImode))
- {
- *l = 2;
-- return (AS2 (out,%m0+1-0x20,%B1) CR_TAB
-- AS2 (out,%m0-0x20,%A1));
-+ op[2] = GEN_INT(AVR_IO_OFFSET);
-+ if (AVR_XMEGA)
-+ return (AS2 (out,%A0-%2,%A1) CR_TAB
-+ AS2 (out,%B0-%2,%B1));
-+ else
-+ return (AS2 (out,%m0+1-%2,%B1) CR_TAB
-+ AS2 (out,%m0-%2,%A1));
- }
-+ if (AVR_XMEGA)
-+ return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
-+ AS2 (sts,%B0,%B1));
-+ else
- return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
- AS2 (sts,%m0,%A1));
- }
-@@ -2825,11 +2921,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__));
- else
-+ {
-+ if (!AVR_XMEGA)
- return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__) CR_TAB
- AS2 (sbiw,r26,1) CR_TAB
- AS2 (st,X,r26));
-+ else
-+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (sbiw,r26,1));
-+ }
- }
- else
- {
-@@ -2837,14 +2942,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- return *l=2, (AS2 (st,X+,%A1) CR_TAB
- AS2 (st,X,%B1));
- else
-+ {
-+ if (!AVR_XMEGA)
- return *l=3, (AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1));
-+ else
-+ return *l=3, (AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (sbiw,r26,1));
-+ }
- }
- }
- else
-+ {
-+ if (!AVR_XMEGA)
- return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
- AS2 (st,%0,%A1));
-+ else
-+ return *l=2, (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1));
-+ }
- }
- else if (GET_CODE (base) == PLUS)
- {
-@@ -2855,6 +2973,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (reg_base != REG_Y)
- fatal_insn ("incorrect insn:",insn);
-
-+ if (!AVR_XMEGA)
-+ {
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
- return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
- AS2 (std,Y+63,%B1) CR_TAB
-@@ -2868,11 +2988,29 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- AS2 (subi,r28,lo8(%o0)) CR_TAB
- AS2 (sbci,r29,hi8(%o0)));
- }
-+ else
-+ {
-+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
-+ AS2 (std,Y+62,%A1) CR_TAB
-+ AS2 (std,Y+63,%B1) CR_TAB
-+ AS2 (sbiw,r28,%o0-62));
-+
-+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y,%A1) CR_TAB
-+ AS2 (std,Y+1,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ }
-+ }
- if (reg_base == REG_X)
- {
- /* (X + d) = R */
- if (reg_src == REG_X)
- {
-+ if (!AVR_XMEGA)
-+ {
- *l = 7;
- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
-@@ -2882,21 +3020,57 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- AS1 (clr,__zero_reg__) CR_TAB
- AS2 (sbiw,r26,%o0));
- }
-+ else
-+ {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (sbiw,r26,%o0+1));
-+ }
-+ }
-+ if (!AVR_XMEGA)
-+ {
- *l = 4;
- return (AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1) CR_TAB
- AS2 (sbiw,r26,%o0));
- }
-+ else
-+ {
-+ *l = 4;
-+ return (AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (sbiw,r26,%o0+1));
-+ }
-+ }
-+
-+ if (!AVR_XMEGA)
- return *l=2, (AS2 (std,%B0,%B1) CR_TAB
- AS2 (std,%A0,%A1));
-+ else
-+ return *l=2, (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1));
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
-+ {
-+ if (mem_volatile_p && AVR_XMEGA)
-+ return *l = 4, (AS2 (sbiw,%r0,2) CR_TAB
-+ AS2 (st,%p0+,%A1) CR_TAB
-+ AS2 (st,%p0,%B1) CR_TAB
-+ AS2 (sbiw,%r0,1));
-+ else
- return *l=2, (AS2 (st,%0,%B1) CR_TAB
- AS2 (st,%0,%A1));
-+ }
- else if (GET_CODE (base) == POST_INC) /* (R++) */
- {
-- if (mem_volatile_p)
-+ if (mem_volatile_p && !AVR_XMEGA)
- {
- if (REGNO (XEXP (base, 0)) == REG_X)
- {
-@@ -5047,6 +5221,16 @@ avr_asm_declare_function_name (FILE *fil
- }
- }
-
-+ else if (cfun->machine->is_nmi)
-+ {
-+ if (strncmp (name, "__vector", strlen ("__vector")) != 0)
-+ {
-+ warning_at (DECL_SOURCE_LOCATION (decl), 0,
-+ "%qs appears to be a misspelled nmi handler",
-+ name);
-+ }
-+ }
-+
- ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
- ASM_OUTPUT_LABEL (file, name);
- }
-@@ -5387,7 +5571,8 @@ avr_file_start (void)
- /* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
- fputs ("__SREG__ = 0x3f\n"
- "__SP_H__ = 0x3e\n"
-- "__SP_L__ = 0x3d\n", asm_out_file);
-+ "__SP_L__ = 0x3d\n"
-+ "__CCP__ = 0x34\n", asm_out_file);
-
- fputs ("__tmp_reg__ = 0\n"
- "__zero_reg__ = 1\n", asm_out_file);
-@@ -6527,16 +6712,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera
-
- if (GET_CODE (operands[1]) == CONST_INT)
- {
-- if (INTVAL (operands[1]) < 0x40)
-+ operands[4] = GEN_INT(AVR_IO_OFFSET); /* operands[3] is for the jump */
-+ if (low_io_address_operand (operands[1], VOIDmode))
- {
- if (comp == EQ)
-- output_asm_insn (AS2 (sbis,%m1-0x20,%2), operands);
-+ output_asm_insn (AS2 (sbis,%1-%4,%2), operands);
- else
-- output_asm_insn (AS2 (sbic,%m1-0x20,%2), operands);
-+ output_asm_insn (AS2 (sbic,%1-%4,%2), operands);
- }
- else
- {
-- output_asm_insn (AS2 (in,__tmp_reg__,%m1-0x20), operands);
-+ output_asm_insn (AS2 (in,__tmp_reg__,%1-%4), operands);
- if (comp == EQ)
- output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
- else
-diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
---- gcc/config/avr/avr-c.c 2011-10-27 16:55:06.000000000 +0530
-+++ gcc/config/avr/avr-c.c 2011-10-27 17:00:24.000000000 +0530
-@@ -81,5 +81,18 @@ avr_cpu_cpp_builtins (struct cpp_reader
-
- if (TARGET_NO_INTERRUPTS)
- cpp_define (pfile, "__NO_INTERRUPTS__");
-+
-+ if (avr_current_arch->xmega)
-+ {
-+ cpp_define (pfile, "__AVR_XMEGA__");
-+ cpp_define (pfile, "__AVR_HAVE_SPMX__");
-+ }
-+ if (avr_current_arch->have_rampx_y_d)
-+ {
-+ cpp_define (pfile, "__AVR_HAVE_RAMPX__");
-+ cpp_define (pfile, "__AVR_HAVE_RAMPY__");
-+ cpp_define (pfile, "__AVR_HAVE_RAMPD__");
-+ }
-+
- }
-
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-27 16:55:06.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-27 17:00:24.000000000 +0530
-@@ -36,7 +36,14 @@ const struct base_arch_s avr_arch_types[
- { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" },
- { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
- { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
-- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" }
-+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
-+ { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
-+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
-+ { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
-+ { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
-+ { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
-+ { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
-+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
- };
-
- /* List of all known AVR MCU types - if updated, it has to be kept
-@@ -216,6 +223,38 @@ const struct mcu_type_s avr_mcu_types[]
- { "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
- { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
- { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
-+ /* Enhanced, == 256K. */
-+ /* Xmega, <= 8K FLASH. */
-+ /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
-+ { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
-+ { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
-+ { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
-+ { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" },
-+ { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
-+ { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
-+ /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
-+ /* { "avrxmega3", ARCH_AVRXMEGA3, NULL }, */
-+ /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
-+ { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
-+ { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
-+ { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
-+ /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
-+ { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" },
-+ { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0x2000, "x64a1" },
-+ { "atxmega64a1u", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1U__", 0, 0x2000, "x64a1u" },
-+ /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
-+ { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
-+ { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
-+ { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
-+ { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
-+ { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
-+ { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
-+ { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
-+ { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
-+ /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
-+ { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
-+ { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
-+ { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
- /* Assembler only. */
- { "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" },
- { "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" },
-diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2011-10-27 16:55:06.000000000 +0530
-+++ gcc/config/avr/avr.h 2011-10-27 17:00:24.000000000 +0530
-@@ -45,11 +45,11 @@ struct base_arch_s {
- /* Core have 'EICALL' and 'EIJMP' instructions. */
- int have_eijmp_eicall;
-
-- /* Reserved for xmega architecture. */
-- int reserved;
-+ /* Core is in Xmega family. */
-+ int xmega;
-
-- /* Reserved for xmega architecture. */
-- int reserved2;
-+ /* Core have RAMPX, RAMPY and RAMPD registers. */
-+ int have_rampx_y_d;
-
- /* Default start of data section address for architecture. */
- int default_data_section_start;
-@@ -75,7 +75,14 @@ enum avr_arch
- ARCH_AVR4,
- ARCH_AVR5,
- ARCH_AVR51,
-- ARCH_AVR6
-+ ARCH_AVR6,
-+ ARCH_AVRXMEGA1,
-+ ARCH_AVRXMEGA2,
-+ ARCH_AVRXMEGA3,
-+ ARCH_AVRXMEGA4,
-+ ARCH_AVRXMEGA5,
-+ ARCH_AVRXMEGA6,
-+ ARCH_AVRXMEGA7
- };
-
- struct mcu_type_s {
-@@ -118,10 +125,18 @@ extern GTY(()) section *progmem_section;
- #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
- #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
- #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
-+#define AVR_XMEGA (avr_current_arch->xmega)
-+#define AVR_HAVE_RAMPX_Y_D (avr_current_arch->have_rampx_y_d)
-
- #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
- #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
-
-+#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
-+#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
-+#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
-+#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
-+#define AVR_RAMPZ_ADDR (AVR_XMEGA ? 0x3B : 0x5B)
-+#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F)
- #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
-
- #define BITS_BIG_ENDIAN 0
-@@ -822,6 +837,10 @@ struct GTY(()) machine_function
- as specified by the "signal" attribute. */
- int is_signal;
-
-+ /* 'true' - if current function is a signal function
-+ as specified by the "nmi" attribute. */
-+ int is_nmi;
-+
- /* 'true' - if current function is a 'task' function
- as specified by the "OS_task" attribute. */
- int is_OS_task;
-diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2011-10-27 16:55:55.000000000 +0530
-+++ gcc/config/avr/avr.md 2011-10-27 17:00:24.000000000 +0530
-@@ -48,9 +48,6 @@
- (TMP_REGNO 0) ; temporary register r0
- (ZERO_REGNO 1) ; zero register r1
-
-- (SREG_ADDR 0x5F)
-- (RAMPZ_ADDR 0x5B)
--
- (UNSPEC_STRLEN 0)
- (UNSPEC_INDEX_JMP 1)
- (UNSPEC_SEI 2)
-@@ -2969,7 +2966,8 @@
- "(optimize > 0)"
- {
- operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
-- return AS2 (cbi,%m0-0x20,%2);
-+ operands[3] = GEN_INT(AVR_IO_OFFSET);
-+ return AS2 (cbi,%0-%3,%2);
- }
- [(set_attr "length" "1")
- (set_attr "cc" "none")])
-@@ -2981,7 +2979,8 @@
- "(optimize > 0)"
- {
- operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
-- return AS2 (sbi,%m0-0x20,%2);
-+ operands[3] = GEN_INT(AVR_IO_OFFSET);
-+ return AS2 (sbi,%0-%3,%2);
- }
- [(set_attr "length" "1")
- (set_attr "cc" "none")])
-diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
---- gcc/config/avr/libgcc.S 2011-10-27 16:55:55.000000000 +0530
-+++ gcc/config/avr/libgcc.S 2011-10-27 17:00:24.000000000 +0530
-@@ -638,11 +638,19 @@ __prologue_saves__:
- in r29,__SP_H__
- sub r28,r26
- sbc r29,r27
-+
-+/* Restore stack pointer. */
-+#if defined (__AVR_XMEGA__)
-+ out __SP_L__,r28
-+ out __SP_H__,r29
-+#else
- in __tmp_reg__,__SREG__
- cli
- out __SP_H__,r29
- out __SREG__,__tmp_reg__
- out __SP_L__,r28
-+#endif
-+
- #if defined (__AVR_HAVE_EIJMP_EICALL__)
- eijmp
- #else
-@@ -680,11 +688,18 @@ __epilogue_restores__:
- ldd r27,Y+1
- add r28,r30
- adc r29,__zero_reg__
-+
-+/* Restore stack pointer. */
-+#if defined(__AVR_XMEGA__)
-+ out __SP_L__,r28
-+ out __SP_H__,r29
-+#else
- in __tmp_reg__,__SREG__
- cli
- out __SP_H__,r29
- out __SREG__,__tmp_reg__
- out __SP_L__,r28
-+#endif
- mov_l r28, r26
- mov_h r29, r27
- ret
-diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
---- gcc/config/avr/predicates.md 2011-10-27 16:55:06.000000000 +0530
-+++ gcc/config/avr/predicates.md 2011-10-27 17:00:24.000000000 +0530
-@@ -45,17 +45,23 @@
- ;; Return true if OP is a valid address for lower half of I/O space.
- (define_predicate "low_io_address_operand"
- (and (match_code "const_int")
-- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))
-+ (if_then_else (match_test "AVR_XMEGA")
-+ (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
-+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
-
- ;; Return true if OP is a valid address for high half of I/O space.
- (define_predicate "high_io_address_operand"
- (and (match_code "const_int")
-- (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))
-+ (if_then_else (match_test "AVR_XMEGA")
-+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
-+ (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
-
- ;; Return true if OP is a valid address of I/O space.
- (define_predicate "io_address_operand"
- (and (match_code "const_int")
-- (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))
-+ (if_then_else (match_test "AVR_XMEGA")
-+ (match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))")
-+ (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))))
-
- ;; Return 1 if OP is the zero constant for MODE.
- (define_predicate "const0_operand"
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-27 16:55:55.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-27 17:00:24.000000000 +0530
-@@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
-
- FPBIT = fp-bit.c
-
--MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
--MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
-+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7
-+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7
-
- # The many avr2 matches are not listed here - this is the default.
- MULTILIB_MATCHES = \
-@@ -252,7 +252,25 @@ MULTILIB_MATCHES = \
- mmcu?avr51=mmcu?at90usb1286 \
- mmcu?avr51=mmcu?at90usb1287 \
- mmcu?avr6=mmcu?atmega2560 \
-- mmcu?avr6=mmcu?atmega2561
-+ mmcu?avr6=mmcu?atmega2561 \
-+ mmcu?avrxmega2=mmcu?atxmega16a4 \
-+ mmcu?avrxmega2=mmcu?atxmega16d4 \
-+ mmcu?avrxmega2=mmcu?atxmega32d4 \
-+ mmcu?avrxmega2=mmcu?atxmega32a4 \
-+ mmcu?avrxmega2=mmcu?atxmega32x1 \
-+ mmcu?avrxmega4=mmcu?atxmega64a3 \
-+ mmcu?avrxmega4=mmcu?atxmega64d3 \
-+ mmcu?avrxmega5=mmcu?atxmega64a1 \
-+ mmcu?avrxmega5=mmcu?atxmega64a1u \
-+ mmcu?avrxmega6=mmcu?atxmega128a3 \
-+ mmcu?avrxmega6=mmcu?atxmega128d3 \
-+ mmcu?avrxmega6=mmcu?atxmega192a3 \
-+ mmcu?avrxmega6=mmcu?atxmega192d3 \
-+ mmcu?avrxmega6=mmcu?atxmega256a3 \
-+ mmcu?avrxmega6=mmcu?atxmega256a3b \
-+ mmcu?avrxmega6=mmcu?atxmega256d3 \
-+ mmcu?avrxmega7=mmcu?atxmega128a1 \
-+ mmcu?avrxmega7=mmcu?atxmega128a1u
-
- MULTILIB_EXCEPTIONS =
-
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 17:47:15.000000000 +0530
-@@ -274,8 +274,8 @@ avr_option_override (void)
- avr_current_arch = &avr_arch_types[avr_current_device->arch];
- avr_extra_arch_macro = avr_current_device->macro;
-
-- tmp_reg_rtx = gen_rtx_REG (QImode, TMP_REGNO);
-- zero_reg_rtx = gen_rtx_REG (QImode, ZERO_REGNO);
-+ tmp_reg_rtx = gen_rtx_REG (QImode, AVR_TINY ? TMP_REGNO_AVRTINY10 : TMP_REGNO);
-+ zero_reg_rtx = gen_rtx_REG (QImode, AVR_TINY ? ZERO_REGNO_AVRTINY10 : ZERO_REGNO);
-
- init_machine_status = avr_init_machine_status;
- }
-@@ -1771,7 +1771,7 @@ avr_simplify_comparison_p (enum machine_
- int
- function_arg_regno_p(int r)
- {
-- return (r >= 8 && r <= 25);
-+ return (AVR_TINY ? r >= 20 && r <= 25 : r >= 8 && r <= 25);
- }
-
- /* Initializing the variable cum for the state at the beginning
-@@ -1781,7 +1781,11 @@ void
- init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname,
- tree fndecl ATTRIBUTE_UNUSED)
- {
-+ if (AVR_TINY)
-+ cum->nregs = 6;
-+ else
- cum->nregs = 18;
-+
- cum->regno = FIRST_CUM_REG;
- if (!libname && stdarg_p (fntype))
- cum->nregs = 0;
-@@ -1799,9 +1803,8 @@ avr_num_arg_regs (enum machine_mode mode
- else
- size = GET_MODE_SIZE (mode);
-
-- /* Align all function arguments to start in even-numbered registers.
-+ /* if not AVR_TINY, Align all function arguments to start in even-numbered registers.
- Odd-sized arguments leave holes above them. */
--
- return (size + 1) & ~1;
- }
-
-@@ -2133,10 +2136,20 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src)))
-- return *l = 3, (AS2 (adiw,r28,%o1-63) CR_TAB
-+ return *l = 3, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o1-63))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o1-63))) CR_TAB
-+ AS2 (subi,r28,lo8(-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(-63)) CR_TAB
-+ AS2 (ld,%0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1-63)))
-+ : (AS2 (adiw,r28,%o1-63) CR_TAB
- AS2 (ldd,%0,Y+63) CR_TAB
- AS2 (sbiw,r28,%o1-63));
-
-+
- return *l = 5, (AS2 (subi,r28,lo8(-%o1)) CR_TAB
- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
- AS2 (ld,%0,Y) CR_TAB
-@@ -2149,15 +2162,38 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- it but I have this situation with extremal optimizing options. */
- if (reg_overlap_mentioned_p (dest, XEXP (x,0))
- || reg_unused_after (insn, XEXP (x,0)))
-- return *l = 2, (AS2 (adiw,r26,%o1) CR_TAB
-+ return *l = 2, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,X))
-+ : (AS2 (adiw,r26,%o1) CR_TAB
- AS2 (ld,%0,X));
-
-- return *l = 3, (AS2 (adiw,r26,%o1) CR_TAB
-+ return *l = 3, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,X) CR_TAB
-+ AS2 (subi,r26,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o1)))
-+ : (AS2 (adiw,r26,%o1) CR_TAB
- AS2 (ld,%0,X) CR_TAB
- AS2 (sbiw,r26,%o1));
- }
-+
- *l = 1;
-- return AS2 (ldd,%0,%1);
-+ op[2] = XEXP(x, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)))
-+ : AS2 (ldd,%0,%1);
-+ if(REGNO(op[2]) == REG_Z)
-+ return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)))
-+ : AS2 (ldd,%0,%1);
- }
- *l = 1;
- return AS2 (ld,%0,%1);
-@@ -2197,14 +2233,34 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- AS2 (ld,%B0,X));
- }
- *l = 3;
-- return (AS2 (ld,%A0,X+) CR_TAB
-+ return AVR_TINY ? (AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)))
-+ : (AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X) CR_TAB
- AS2 (sbiw,r26,1));
- }
- else /* (R) */
- {
- *l = 2;
-- return (AS2 (ld,%A0,%1) CR_TAB
-+ if(reg_base == REG_Y)
-+ return AVR_TINY ? (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (subi,r28,lo8((-1))) CR_TAB
-+ AS2 (sbci,r29,hi8((-1))) CR_TAB
-+ AS2 (ld,%B0,%1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)))
-+ : (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1));
-+ if(reg_base == REG_Z)
-+ return AVR_TINY ? (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (subi,r30,lo8((-1))) CR_TAB
-+ AS2 (sbci,r31,hi8((-1))) CR_TAB
-+ AS2 (ld,%B0,%1) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)))
-+ : (AS2 (ld,%A0,%1) CR_TAB
- AS2 (ldd,%B0,%1+1));
- }
- }
-@@ -2219,12 +2275,30 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src)))
-- return *l = 4, (AS2 (adiw,r28,%o1-62) CR_TAB
-+ return *l = 4, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o1-62))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o1-62))) CR_TAB
-+ AS2 (subi,r28,lo8(-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(-62)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1-62)))
-+ : (AS2 (adiw,r28,%o1-62) CR_TAB
- AS2 (ldd,%A0,Y+62) CR_TAB
- AS2 (ldd,%B0,Y+63) CR_TAB
- AS2 (sbiw,r28,%o1-62));
-
-- return *l = 6, (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1)))
-+ : (AS2 (subi,r28,lo8(-%o1)) CR_TAB
- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
- AS2 (ld,%A0,Y) CR_TAB
- AS2 (ldd,%B0,Y+1) CR_TAB
-@@ -2239,12 +2313,23 @@ out_movhi_r_mr (rtx insn, rtx op[], int
-
- *l = 4;
- if (reg_base == reg_dest)
-- return (AS2 (adiw,r26,%o1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-%o1)) CR_TAB
-+ AS2 (ld,__tmp_reg__,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__))
-+ : (AS2 (adiw,r26,%o1) CR_TAB
- AS2 (ld,__tmp_reg__,X+) CR_TAB
- AS2 (ld,%B0,X) CR_TAB
- AS2 (mov,%A0,__tmp_reg__));
-
-- return (AS2 (adiw,r26,%o1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (subi,r26,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o1+1)))
-+ : (AS2 (adiw,r26,%o1) CR_TAB
- AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X) CR_TAB
- AS2 (sbiw,r26,%o1+1));
-@@ -2253,14 +2338,54 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- if (reg_base == reg_dest)
- {
- *l = 3;
-- return (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
-+ op[2] = XEXP(base, 0);
-+
-+ if(REGNO(op[2]) == REG_Y)
-+ return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,__tmp_reg__,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__))
-+ : (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ if(REGNO(op[2]) == REG_Z)
-+ return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,__tmp_reg__,Z+) CR_TAB
-+ AS2 (ld,%B0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__))
-+ : (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
- AS2 (ldd,%B0,%B1) CR_TAB
- AS2 (mov,%A0,__tmp_reg__));
- }
--
- *l = 2;
-- return (AS2 (ldd,%A0,%A1) CR_TAB
-+
-+ op[2] = XEXP(base, 0);
-+
-+ if(REGNO(op[2]) == REG_Y)
-+ return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)))
-+ : (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1));
-+ if(REGNO(op[2]) == REG_Z)
-+ return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)))
-+ : (AS2 (ldd,%A0,%A1) CR_TAB
- AS2 (ldd,%B0,%B1));
-+
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- {
-@@ -2272,7 +2397,13 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- if (REGNO (XEXP (base, 0)) == REG_X)
- {
- *l = 4;
-- return (AS2 (sbiw,r26,2) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(2)) CR_TAB
-+ AS2 (sbci,r27,hi8(2)) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)))
-+ : (AS2 (sbiw,r26,2) CR_TAB
- AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X) CR_TAB
- AS2 (sbiw,r26,1));
-@@ -2280,7 +2411,16 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- else
- {
- *l = 3;
-- return (AS2 (sbiw,%r1,2) CR_TAB
-+ //FIXME:check the code once again for AVR_TINY
-+ return AVR_TINY ? (AS2 (subi,%A1,lo8(3)) CR_TAB
-+ AS2 (sbci,%B1,hi8(3)) CR_TAB
-+ AS2 (ld,%A0,%p1) CR_TAB
-+ AS2 (subi,%A1,lo8(-1)) CR_TAB
-+ AS2 (sbci,%B1,hi8(-1)) CR_TAB
-+ AS2 (ld,%B0,%p1) CR_TAB
-+ AS2 (subi,%A1,lo8(1)) CR_TAB
-+ AS2 (sbci,%B1,hi8(1)))
-+ : (AS2 (sbiw,%r1,2) CR_TAB
- AS2 (ld,%A0,%p1) CR_TAB
- AS2 (ldd,%B0,%p1+1));
- }
-@@ -2336,13 +2476,23 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- {
- if (reg_dest == REG_X)
- /* "ld r26,-X" is undefined */
-- return *l=7, (AS2 (adiw,r26,3) CR_TAB
-+ return *l=7, AVR_TINY ? (AS2 (subi,r26,lo8(-3)) CR_TAB
-+ AS2 (sbci,r27,hi8(-3)) CR_TAB
-+ AS2 (ld,r29,X) CR_TAB
-+ AS2 (ld,r28,-X) CR_TAB
-+ AS2 (ld,__tmp_reg__,-X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)) CR_TAB
-+ AS2 (ld,r26,X) CR_TAB
-+ AS2 (mov,r27,__tmp_reg__))
-+ : (AS2 (adiw,r26,3) CR_TAB
- AS2 (ld,r29,X) CR_TAB
- AS2 (ld,r28,-X) CR_TAB
- AS2 (ld,__tmp_reg__,-X) CR_TAB
- AS2 (sbiw,r26,1) CR_TAB
- AS2 (ld,r26,X) CR_TAB
- AS2 (mov,r27,__tmp_reg__));
-+
- else if (reg_dest == REG_X - 2)
- return *l=5, (AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X+) CR_TAB
-@@ -2355,7 +2505,13 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- AS2 (ld,%C0,X+) CR_TAB
- AS2 (ld,%D0,X));
- else
-- return *l=5, (AS2 (ld,%A0,X+) CR_TAB
-+ return *l=5, AVR_TINY ? (AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X+) CR_TAB
-+ AS2 (ld,%C0,X+) CR_TAB
-+ AS2 (ld,%D0,X) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)))
-+ : (AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X+) CR_TAB
- AS2 (ld,%C0,X+) CR_TAB
- AS2 (ld,%D0,X) CR_TAB
-@@ -2364,22 +2520,97 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- else
- {
- if (reg_dest == reg_base)
-- return *l=5, (AS2 (ldd,%D0,%1+3) CR_TAB
-+ {
-+ if(reg_base == REG_Y)
-+ return *l=5, AVR_TINY ? (AS2 (subi,r28,lo8(-3)) CR_TAB
-+ AS2 (sbci,r29,hi8(-3)) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (ld,%C0,-Y) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (ld,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__))
-+ : (AS2 (ldd,%D0,%1+3) CR_TAB
-+ AS2 (ldd,%C0,%1+2) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%1+1) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ if(reg_base == REG_Z)
-+ return *l=5, AVR_TINY ? (AS2 (subi,r30,lo8(-3)) CR_TAB
-+ AS2 (sbci,r31,hi8(-3)) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (ld,%C0,-Z) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)) CR_TAB
-+ AS2 (ld,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__))
-+ : (AS2 (ldd,%D0,%1+3) CR_TAB
- AS2 (ldd,%C0,%1+2) CR_TAB
- AS2 (ldd,__tmp_reg__,%1+1) CR_TAB
- AS2 (ld,%A0,%1) CR_TAB
- AS2 (mov,%B0,__tmp_reg__));
-+ }
-+
- else if (reg_base == reg_dest + 2)
-- return *l=5, (AS2 (ld ,%A0,%1) CR_TAB
-+ {
-+ if(reg_base == REG_Y)
-+ return *l=5, AVR_TINY ? (AS2 (ld ,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__))
-+ : (AS2 (ld ,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%1+2) CR_TAB
-+ AS2 (ldd,%D0,%1+3) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ if(reg_base == REG_Z)
-+ return *l=5, AVR_TINY ? (AS2 (ld ,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,r30,lo8(3)) CR_TAB
-+ AS2 (sbci,r31,hi8(3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__))
-+ : (AS2 (ld ,%A0,%1) CR_TAB
- AS2 (ldd,%B0,%1+1) CR_TAB
- AS2 (ldd,__tmp_reg__,%1+2) CR_TAB
- AS2 (ldd,%D0,%1+3) CR_TAB
- AS2 (mov,%C0,__tmp_reg__));
-+ }
- else
-- return *l=4, (AS2 (ld ,%A0,%1) CR_TAB
-+ {
-+ if(reg_base == REG_Y)
-+ return *l=4, AVR_TINY ? (AS2 (ld ,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)))
-+ : (AS2 (ld ,%A0,%1) CR_TAB
- AS2 (ldd,%B0,%1+1) CR_TAB
- AS2 (ldd,%C0,%1+2) CR_TAB
- AS2 (ldd,%D0,%1+3));
-+ if(reg_base == REG_Z)
-+ return *l=4, AVR_TINY ? (AS2 (ld ,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,%C0,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,r30,lo8(3)) CR_TAB
-+ AS2 (sbci,r31,hi8(3)))
-+ : (AS2 (ld ,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1) CR_TAB
-+ AS2 (ldd,%C0,%1+2) CR_TAB
-+ AS2 (ldd,%D0,%1+3));
-+ }
- }
- }
- else if (GET_CODE (base) == PLUS) /* (R + i) */
-@@ -2392,14 +2623,36 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src)))
-- return *l = 6, (AS2 (adiw,r28,%o1-60) CR_TAB
-+ return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o1-60))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o1-60))) CR_TAB
-+ AS2 (subi,r28,lo8(-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(-60)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1-60)))
-+ : (AS2 (adiw,r28,%o1-60) CR_TAB
- AS2 (ldd,%A0,Y+60) CR_TAB
- AS2 (ldd,%B0,Y+61) CR_TAB
- AS2 (ldd,%C0,Y+62) CR_TAB
- AS2 (ldd,%D0,Y+63) CR_TAB
- AS2 (sbiw,r28,%o1-60));
-
-- return *l = 8, (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ return *l = 8, AVR_TINY ? (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1)))
-+ : (AS2 (subi,r28,lo8(-%o1)) CR_TAB
- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
- AS2 (ld,%A0,Y) CR_TAB
- AS2 (ldd,%B0,Y+1) CR_TAB
-@@ -2417,7 +2670,16 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- {
- *l = 7;
- /* "ld r26,-X" is undefined */
-- return (AS2 (adiw,r26,%o1+3) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1+3))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1+3))) CR_TAB
-+ AS2 (ld,r29,X) CR_TAB
-+ AS2 (ld,r28,-X) CR_TAB
-+ AS2 (ld,__tmp_reg__,-X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)) CR_TAB
-+ AS2 (ld,r26,X) CR_TAB
-+ AS2 (mov,r27,__tmp_reg__))
-+ : (AS2 (adiw,r26,%o1+3) CR_TAB
- AS2 (ld,r29,X) CR_TAB
- AS2 (ld,r28,-X) CR_TAB
- AS2 (ld,__tmp_reg__,-X) CR_TAB
-@@ -2427,14 +2689,29 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- }
- *l = 6;
- if (reg_dest == REG_X - 2)
-- return (AS2 (adiw,r26,%o1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,r24,X+) CR_TAB
-+ AS2 (ld,r25,X+) CR_TAB
-+ AS2 (ld,__tmp_reg__,X+) CR_TAB
-+ AS2 (ld,r27,X) CR_TAB
-+ AS2 (mov,r26,__tmp_reg__))
-+ : (AS2 (adiw,r26,%o1) CR_TAB
- AS2 (ld,r24,X+) CR_TAB
- AS2 (ld,r25,X+) CR_TAB
- AS2 (ld,__tmp_reg__,X+) CR_TAB
- AS2 (ld,r27,X) CR_TAB
- AS2 (mov,r26,__tmp_reg__));
-
-- return (AS2 (adiw,r26,%o1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X+) CR_TAB
-+ AS2 (ld,%C0,X+) CR_TAB
-+ AS2 (ld,%D0,X) CR_TAB
-+ AS2 (subi,r26,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o1+3)))
-+ : (AS2 (adiw,r26,%o1) CR_TAB
- AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X+) CR_TAB
- AS2 (ld,%C0,X+) CR_TAB
-@@ -2442,18 +2719,99 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- AS2 (sbiw,r26,%o1+3));
- }
- if (reg_dest == reg_base)
-- return *l=5, (AS2 (ldd,%D0,%D1) CR_TAB
-+ {
-+ op[2] = XEXP(base, 0);
-+
-+ if(REGNO(op[2]) == REG_Y)
-+ return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1+4))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1+4))) CR_TAB
-+ AS2 (ld,%D0,-Y) CR_TAB
-+ AS2 (ld,%C0,-Y) CR_TAB
-+ AS2 (ld,__tmp_reg__,-Y) CR_TAB
-+ AS2 (ld,%A0,-Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__))
-+ : (AS2 (ldd,%D0,%D1) CR_TAB
-+ AS2 (ldd,%C0,%C1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%B1) CR_TAB
-+ AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ if(REGNO(op[2]) == REG_Z)
-+ return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1+4))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1+4))) CR_TAB
-+ AS2 (ld,%D0,-Z) CR_TAB
-+ AS2 (ld,%C0,-Z) CR_TAB
-+ AS2 (ld,__tmp_reg__,-Z) CR_TAB
-+ AS2 (ld,%A0,-Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__))
-+ : (AS2 (ldd,%D0,%D1) CR_TAB
- AS2 (ldd,%C0,%C1) CR_TAB
- AS2 (ldd,__tmp_reg__,%B1) CR_TAB
- AS2 (ldd,%A0,%A1) CR_TAB
- AS2 (mov,%B0,__tmp_reg__));
-+ }
- else if (reg_dest == reg_base - 2)
-- return *l=5, (AS2 (ldd,%A0,%A1) CR_TAB
-+ {
-+ op[2] = XEXP(base, 0);
-+
-+ if(REGNO(op[2]) == REG_Y)
-+ return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__))
-+ : (AS2 (ldd,%A0,%A1) CR_TAB
- AS2 (ldd,%B0,%B1) CR_TAB
- AS2 (ldd,__tmp_reg__,%C1) CR_TAB
- AS2 (ldd,%D0,%D1) CR_TAB
- AS2 (mov,%C0,__tmp_reg__));
-- return *l=4, (AS2 (ldd,%A0,%A1) CR_TAB
-+ if(REGNO(op[2]) == REG_Z)
-+ return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__))
-+ : (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%C1) CR_TAB
-+ AS2 (ldd,%D0,%D1) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ }
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)))
-+ : (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (ldd,%C0,%C1) CR_TAB
-+ AS2 (ldd,%D0,%D1));
-+ if(REGNO(op[2]) == REG_Z)
-+ return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,%C0,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)))
-+ : (AS2 (ldd,%A0,%A1) CR_TAB
- AS2 (ldd,%B0,%B1) CR_TAB
- AS2 (ldd,%C0,%C1) CR_TAB
- AS2 (ldd,%D0,%D1));
-@@ -2504,14 +2862,30 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- {
- /* "st X+,r26" is undefined */
- if (reg_unused_after (insn, base))
-- return *l=6, (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ return *l=6, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29))
-+ : (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (st,X,r26) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X+,__tmp_reg__) CR_TAB
- AS2 (st,X+,r28) CR_TAB
- AS2 (st,X,r29));
- else
-- return *l=7, (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ return *l=7, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)))
-+ : (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (st,X,r26) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X+,__tmp_reg__) CR_TAB
-@@ -2530,7 +2904,16 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,%0,__tmp_reg__) CR_TAB
- AS1 (clr,__zero_reg__));
- else
-- return *l=8, (AS2 (mov,__zero_reg__,%C1) CR_TAB
-+ return *l=8, AVR_TINY ? (AS2 (mov,__zero_reg__,%C1) CR_TAB
-+ AS2 (mov,__tmp_reg__,%D1) CR_TAB
-+ AS2 (st,%0+,%A1) CR_TAB
-+ AS2 (st,%0+,%B1) CR_TAB
-+ AS2 (st,%0+,__zero_reg__) CR_TAB
-+ AS2 (st,%0,__tmp_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)))
-+ : (AS2 (mov,__zero_reg__,%C1) CR_TAB
- AS2 (mov,__tmp_reg__,%D1) CR_TAB
- AS2 (st,%0+,%A1) CR_TAB
- AS2 (st,%0+,%B1) CR_TAB
-@@ -2539,18 +2922,44 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS1 (clr,__zero_reg__) CR_TAB
- AS2 (sbiw,r26,3));
- }
-- return *l=5, (AS2 (st,%0+,%A1) CR_TAB
-+ return *l=5, AVR_TINY ? (AS2 (st,%0+,%A1) CR_TAB
-+ AS2 (st,%0+,%B1) CR_TAB
-+ AS2 (st,%0+,%C1) CR_TAB
-+ AS2 (st,%0,%D1) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)))
-+ : (AS2 (st,%0+,%A1) CR_TAB
- AS2 (st,%0+,%B1) CR_TAB
- AS2 (st,%0+,%C1) CR_TAB
- AS2 (st,%0,%D1) CR_TAB
- AS2 (sbiw,r26,3));
- }
- else
-- return *l=4, (AS2 (st,%0,%A1) CR_TAB
-+ {
-+ if(reg_base == REG_Y)
-+ return *l=4, AVR_TINY ? (AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,lo8(3)))
-+ : (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1) CR_TAB
-+ AS2 (std,%0+2,%C1) CR_TAB
-+ AS2 (std,%0+3,%D1));
-+ if(reg_base == REG_Z)
-+ return *l=4, AVR_TINY ? (AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z+,%B1) CR_TAB
-+ AS2 (st,Z+,%C1) CR_TAB
-+ AS2 (st,Z,%D1) CR_TAB
-+ AS2 (subi,r30,lo8(3)) CR_TAB
-+ AS2 (sbci,r31,lo8(3)))
-+ : (AS2 (st,%0,%A1) CR_TAB
- AS2 (std,%0+1,%B1) CR_TAB
- AS2 (std,%0+2,%C1) CR_TAB
- AS2 (std,%0+3,%D1));
- }
-+ }
- else if (GET_CODE (base) == PLUS) /* (R + i) */
- {
- int disp = INTVAL (XEXP (base, 1));
-@@ -2561,14 +2970,35 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 6, (AS2 (adiw,r28,%o0-60) CR_TAB
-+ return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-60))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-60))) CR_TAB
-+ AS2 (subi,r28,lo8(-60)) CR_TAB
-+ AS2 (sbci,r29,lo8(-60)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,lo8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-60)))
-+ : (AS2 (adiw,r28,%o0-60) CR_TAB
- AS2 (std,Y+60,%A1) CR_TAB
- AS2 (std,Y+61,%B1) CR_TAB
- AS2 (std,Y+62,%C1) CR_TAB
- AS2 (std,Y+63,%D1) CR_TAB
- AS2 (sbiw,r28,%o0-60));
--
-- return *l = 8, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ return *l = 8, AVR_TINY ? (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,lo8(3)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)))
-+ : (AS2 (subi,r28,lo8(-%o0)) CR_TAB
- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
- AS2 (st,Y,%A1) CR_TAB
- AS2 (std,Y+1,%B1) CR_TAB
-@@ -2583,7 +3013,18 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- if (reg_src == REG_X)
- {
- *l = 9;
-- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,__zero_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+3)))
-+ : (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,__tmp_reg__) CR_TAB
-@@ -2596,7 +3037,18 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- else if (reg_src == REG_X - 2)
- {
- *l = 9;
-- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,r24) CR_TAB
-+ AS2 (st,X+,r25) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+3)))
-+ : (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,r24) CR_TAB
-@@ -2607,14 +3059,46 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (sbiw,r26,%o0+3));
- }
- *l = 6;
-- return (AS2 (adiw,r26,%o0) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X+,%B1) CR_TAB
-+ AS2 (st,X+,%C1) CR_TAB
-+ AS2 (st,X,%D1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+3)))
-+ : (AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,%A1) CR_TAB
- AS2 (st,X+,%B1) CR_TAB
- AS2 (st,X+,%C1) CR_TAB
- AS2 (st,X,%D1) CR_TAB
- AS2 (sbiw,r26,%o0+3));
- }
-- return *l=4, (AS2 (std,%A0,%A1) CR_TAB
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+3)))
-+ : (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1) CR_TAB
-+ AS2 (std,%C0,%C1) CR_TAB
-+ AS2 (std,%D0,%D1));
-+
-+ if(REGNO(op[2]) == REG_Z)
-+ return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z+,%B1) CR_TAB
-+ AS2 (st,Z+,%C1) CR_TAB
-+ AS2 (st,Z,%D1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+3)))
-+ : (AS2 (std,%A0,%A1) CR_TAB
- AS2 (std,%B0,%B1) CR_TAB
- AS2 (std,%C0,%C1) CR_TAB
- AS2 (std,%D0,%D1));
-@@ -2831,7 +3315,16 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 3, (AS2 (adiw,r28,%o0-63) CR_TAB
-+ return *l = 3, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-63))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-63))) CR_TAB
-+ AS2 (subi,r28,lo8(-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(-63)) CR_TAB
-+ AS2 (st,Y,%1) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-63)))
-+ : (AS2 (adiw,r28,%o0-63) CR_TAB
- AS2 (std,Y+63,%1) CR_TAB
- AS2 (sbiw,r28,%o0-63));
-
-@@ -2846,11 +3339,21 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- if (reg_overlap_mentioned_p (src, XEXP (x, 0)))
- {
- if (reg_unused_after (insn, XEXP (x,0)))
-- return *l = 3, (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ return *l = 3, AVR_TINY ? (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,__tmp_reg__))
-+ : (AS2 (mov,__tmp_reg__,%1) CR_TAB
- AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X,__tmp_reg__));
-
-- return *l = 4, (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ return *l = 4, AVR_TINY ? (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)))
-+ : (AS2 (mov,__tmp_reg__,%1) CR_TAB
- AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X,__tmp_reg__) CR_TAB
- AS2 (sbiw,r26,%o0));
-@@ -2858,16 +3361,38 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- else
- {
- if (reg_unused_after (insn, XEXP (x,0)))
-- return *l = 2, (AS2 (adiw,r26,%o0) CR_TAB
-+ return *l = 2, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,%1))
-+ : (AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X,%1));
-
-- return *l = 3, (AS2 (adiw,r26,%o0) CR_TAB
-+ return *l = 3, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,%1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)))
-+ : (AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X,%1) CR_TAB
- AS2 (sbiw,r26,%o0));
- }
- }
- *l = 1;
-- return AS2 (std,%0,%1);
-+ op[2] = XEXP(x, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ return AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)))
-+ : AS2 (std,%0,%1);
-+ if(REGNO(op[2]) == REG_Z)
-+ return AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)))
-+ : AS2 (std,%0,%1);
- }
- *l = 1;
- return AS2 (st,%0,%1);
-@@ -2916,20 +3441,39 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- {
- /* "st X+,r26" and "st -X,r26" are undefined. */
- if (!mem_volatile_p && reg_unused_after (insn, src))
-- return *l=4, (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ return *l=4, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,__tmp_reg__))
-+ : (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (st,X,r26) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__));
- else
- {
- if (!AVR_XMEGA)
-- return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ return *l=5, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)) CR_TAB
-+ AS2 (st,X,r26))
-+ : (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__) CR_TAB
- AS2 (sbiw,r26,1) CR_TAB
- AS2 (st,X,r26));
- else
-- return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ return *l=5, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)))
-+ : (AS2 (mov,__tmp_reg__,r27) CR_TAB
- AS2 (st,X,r26) CR_TAB
- AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,__tmp_reg__) CR_TAB
-@@ -2944,11 +3488,19 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- else
- {
- if (!AVR_XMEGA)
-- return *l=3, (AS2 (adiw,r26,1) CR_TAB
-+ return *l=3, AVR_TINY ? (AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1))
-+ : (AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1));
- else
-- return *l=3, (AS2 (st,X+,%A1) CR_TAB
-+ return *l=3, AVR_TINY ? (AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)))
-+ : (AS2 (st,X+,%A1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (sbiw,r26,1));
- }
-@@ -2957,13 +3509,41 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- else
- {
- if (!AVR_XMEGA)
-- return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
-+ {
-+ if(reg_base == REG_Y)
-+ return *l=2, AVR_TINY ? (AS2 (subi,r28,lo8(-1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-1)) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1))
-+ : (AS2 (std,%0+1,%B1) CR_TAB
-+ AS2 (st,%0,%A1));
-+ if(reg_base == REG_Z)
-+ return *l=2, AVR_TINY ? (AS2 (subi,r30,lo8(-1)) CR_TAB
-+ AS2 (sbci,r31,hi8(-1)) CR_TAB
-+ AS2 (st,Z,%B1) CR_TAB
-+ AS2 (st,-Z,%A1))
-+ : (AS2 (std,%0+1,%B1) CR_TAB
- AS2 (st,%0,%A1));
-+ }
- else
-- return *l=2, (AS2 (st,%0,%A1) CR_TAB
-+ {
-+ if(reg_base == REG_Y)
-+ return *l=2, AVR_TINY ? (AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)))
-+ : (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1));
-+ if(reg_base == REG_Z)
-+ return *l=2, AVR_TINY ? (AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z,%B1) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)))
-+ : (AS2 (st,%0,%A1) CR_TAB
- AS2 (std,%0+1,%B1));
- }
- }
-+ }
- else if (GET_CODE (base) == PLUS)
- {
- int disp = INTVAL (XEXP (base, 1));
-@@ -2976,12 +3556,30 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (!AVR_XMEGA)
- {
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
-+ return *l = 4, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-62))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-62))) CR_TAB
-+ AS2 (subi,r28,lo8(-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(-63)) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1) CR_TAB
-+ AS2 (subi,r28,lo8(62)) CR_TAB
-+ AS2 (sbci,r29,hi8(62)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-62)))
-+ : (AS2 (adiw,r28,%o0-62) CR_TAB
- AS2 (std,Y+63,%B1) CR_TAB
- AS2 (std,Y+62,%A1) CR_TAB
- AS2 (sbiw,r28,%o0-62));
-
-- return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (subi,r28,lo8(-1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-1)) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)))
-+ : (AS2 (subi,r28,lo8(-%o0)) CR_TAB
- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
- AS2 (std,Y+1,%B1) CR_TAB
- AS2 (st,Y,%A1) CR_TAB
-@@ -2991,12 +3589,30 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- else
- {
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
-+ return *l = 4, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-62))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-62))) CR_TAB
-+ AS2 (subi,r28,lo8(-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(-62)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-62)))
-+ : (AS2 (adiw,r28,%o0-62) CR_TAB
- AS2 (std,Y+62,%A1) CR_TAB
- AS2 (std,Y+63,%B1) CR_TAB
- AS2 (sbiw,r28,%o0-62));
-
-- return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)))
-+ : (AS2 (subi,r28,lo8(-%o0)) CR_TAB
- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
- AS2 (st,Y,%A1) CR_TAB
- AS2 (std,Y+1,%B1) CR_TAB
-@@ -3012,7 +3628,16 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (!AVR_XMEGA)
- {
- *l = 7;
-- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0+1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0+1))) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS2 (st,-X,__tmp_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)))
-+ : (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,__zero_reg__) CR_TAB
-@@ -3023,19 +3648,35 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- else
- {
- *l = 7;
-- return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
- AS2 (st,X+,__tmp_reg__) CR_TAB
- AS2 (st,X,__zero_reg__) CR_TAB
- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (sbiw,r26,%o0+1));
-+ AS2 (subi,r26,lo8(%o0+1)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+1)))
-+ : (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (adiw,r26,%o0+1) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (sbiw,r26,%o0));
-+
- }
- }
- if (!AVR_XMEGA)
- {
- *l = 4;
-- return (AS2 (adiw,r26,%o0+1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0+1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0+1))) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)))
-+ : (AS2 (adiw,r26,%o0+1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1) CR_TAB
- AS2 (sbiw,r26,%o0));
-@@ -3043,7 +3684,13 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- else
- {
- *l = 4;
-- return (AS2 (adiw,r26,%o0) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)))
-+ : (AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,%A1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (sbiw,r26,%o0+1));
-@@ -3051,11 +3698,49 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- }
-
- if (!AVR_XMEGA)
-- return *l=2, (AS2 (std,%B0,%B1) CR_TAB
-+ {
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0+2))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0+2))) CR_TAB
-+ AS2 (st,-Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)))
-+ : (AS2 (std,%B0,%B1) CR_TAB
- AS2 (std,%A0,%A1));
-+ if(REGNO(op[2]) == REG_Z)
-+ return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0+2))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0+2))) CR_TAB
-+ AS2 (st,-Z,%B1) CR_TAB
-+ AS2 (st,-Z,%A1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)))
-+ : (AS2 (std,%B0,%B1) CR_TAB
-+ AS2 (std,%A0,%A1));
-+ }
- else
-- return *l=2, (AS2 (std,%A0,%A1) CR_TAB
-+ {
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+1)))
-+ : (AS2 (std,%A0,%A1) CR_TAB
- AS2 (std,%B0,%B1));
-+ if(REGNO(op[2]) == REG_Z)
-+ return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z,%B1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+1)))
-+ : (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1));
-+ }
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- {
-@@ -3075,15 +3760,30 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (REGNO (XEXP (base, 0)) == REG_X)
- {
- *l = 4;
-- return (AS2 (adiw,r26,1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1) CR_TAB
-+ AS2 (subi,r26,lo8(-2)) CR_TAB
-+ AS2 (sbci,r27,hi8(-2)))
-+ : (AS2 (adiw,r26,1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1) CR_TAB
- AS2 (adiw,r26,2));
- }
- else
- {
-+ //FIXME:check the code once again for AVR_TINY
- *l = 3;
-- return (AS2 (std,%p0+1,%B1) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,%A0,lo8(-1)) CR_TAB
-+ AS2 (sbci,%B0,hi8(-1)) CR_TAB
-+ AS2 (st,%p0,%B1) CR_TAB
-+ AS2 (subi,%A0,lo8(1)) CR_TAB
-+ AS2 (sbci,%B0,hi8(1)) CR_TAB
-+ AS2 (st,%p0,%A1) CR_TAB
-+ AS2 (subi,%A0,lo8(-3)) CR_TAB
-+ AS2 (sbci,%B0,hi8(-3)))
-+ : (AS2 (std,%p0+1,%B1) CR_TAB
- AS2 (st,%p0,%A1) CR_TAB
- AS2 (adiw,%r0,2));
- }
-@@ -3173,7 +3873,9 @@ out_tsthi (rtx insn, rtx op, int *l)
- if (test_hard_reg_class (ADDW_REGS, op))
- {
- if (l) *l = 1;
-- return AS2 (sbiw,%0,0);
-+ return AVR_TINY ? (AS2 (subi,%A0,lo8(0)) CR_TAB
-+ AS2 (sbci,%B0,hi8(0)))
-+ : AS2 (sbiw,%0,0);
- }
- if (l) *l = 2;
- return (AS2 (cp,%A0,__zero_reg__) CR_TAB
-@@ -3194,7 +3896,11 @@ out_tstsi (rtx insn, rtx op, int *l)
- if (test_hard_reg_class (ADDW_REGS, op))
- {
- if (l) *l = 3;
-- return (AS2 (sbiw,%A0,0) CR_TAB
-+ return AVR_TINY ? (AS2 (subi,%A0,lo8(-(-0))) CR_TAB
-+ AS2 (sbci,%B0,hi8(-(-0))) CR_TAB
-+ AS2 (cpc,%C0,__zero_reg__) CR_TAB
-+ AS2 (cpc,%D0,__zero_reg__))
-+ : (AS2 (sbiw,%A0,0) CR_TAB
- AS2 (cpc,%C0,__zero_reg__) CR_TAB
- AS2 (cpc,%D0,__zero_reg__));
- }
-@@ -5571,10 +6277,12 @@ avr_file_start (void)
- /* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
- fputs ("__SREG__ = 0x3f\n"
- "__SP_H__ = 0x3e\n"
-- "__SP_L__ = 0x3d\n"
-- "__CCP__ = 0x34\n", asm_out_file);
-+ "__SP_L__ = 0x3d\n", asm_out_file);
-+
-+ AVR_TINY ? fputs ("__CCP__ = 0x3c\n", asm_out_file) : fputs ("__CCP__ = 0x34\n", asm_out_file);
-
-- fputs ("__tmp_reg__ = 0\n"
-+ AVR_TINY ? fputs ("__tmp_reg__ = 16\n"
-+ "__zero_reg__ = 17\n", asm_out_file) : fputs ("__tmp_reg__ = 0\n"
- "__zero_reg__ = 1\n", asm_out_file);
-
- /* FIXME: output these only if there is anything in the .data / .bss
-diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
---- gcc/config/avr/avr-c.c 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/avr-c.c 2011-10-27 17:47:15.000000000 +0530
-@@ -94,5 +94,9 @@ avr_cpu_cpp_builtins (struct cpp_reader
- cpp_define (pfile, "__AVR_HAVE_RAMPD__");
- }
-
-+ if (avr_current_arch->avrtiny)
-+ {
-+ cpp_define (pfile, "__AVR_TINY__");
-+ }
- }
-
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-27 17:47:15.000000000 +0530
-@@ -26,24 +26,25 @@
- /* List of all known AVR MCU architectures. */
-
- const struct base_arch_s avr_arch_types[] = {
-- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, NULL, "avr2" }, /* unknown device specified */
-- { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=1", "avr1" },
-- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=2", "avr2" },
-- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=25", "avr25" },
-- { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=3", "avr3" },
-- { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=31", "avr31" },
-- { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=35", "avr35" },
-- { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" },
-- { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
-- { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
-- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
-- { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
-- { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
-- { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
-- { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
-- { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
-- { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
-- { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
-+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, NULL, "avr2" }, /* unknown device specified */
-+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=1", "avr1" },
-+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=2", "avr2" },
-+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=25", "avr25" },
-+ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=3", "avr3" },
-+ { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=31", "avr31" },
-+ { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=35", "avr35" },
-+ { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" },
-+ { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
-+ { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
-+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
-+ { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
-+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
-+ { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
-+ { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
-+ { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
-+ { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
-+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" },
-+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=201", "avrtiny10" }
- };
-
- /* List of all known AVR MCU types - if updated, it has to be kept
-@@ -255,6 +256,14 @@ const struct mcu_type_s avr_mcu_types[]
- { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
- { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
- { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
-+ /* tiny10 family */
-+ { "avrtiny10", ARCH_AVRTINY10, NULL, 0, 0x0040, "tn10" },
-+ { "attiny4", ARCH_AVRTINY10, "__AVR_ATtiny4__", 0, 0x0040, "tn4" },
-+ { "attiny5", ARCH_AVRTINY10, "__AVR_ATtiny5__", 0, 0x0040, "tn5" },
-+ { "attiny9", ARCH_AVRTINY10, "__AVR_ATtiny9__", 0, 0x0040, "tn9" },
-+ { "attiny10", ARCH_AVRTINY10, "__AVR_ATtiny10__", 0, 0x0040, "tn10" },
-+ { "attiny20", ARCH_AVRTINY10, "__AVR_ATtiny20__", 0, 0x0040, "tn20" },
-+ { "attiny40", ARCH_AVRTINY10, "__AVR_ATtiny40__", 0, 0x0040, "tn40" },
- /* Assembler only. */
- { "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" },
- { "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" },
-diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/avr.h 2011-10-27 17:47:15.000000000 +0530
-@@ -51,6 +51,9 @@ struct base_arch_s {
- /* Core have RAMPX, RAMPY and RAMPD registers. */
- int have_rampx_y_d;
-
-+ /* Core is in avrtiny10 family. */
-+ int avrtiny;
-+
- /* Default start of data section address for architecture. */
- int default_data_section_start;
-
-@@ -82,7 +85,8 @@ enum avr_arch
- ARCH_AVRXMEGA4,
- ARCH_AVRXMEGA5,
- ARCH_AVRXMEGA6,
-- ARCH_AVRXMEGA7
-+ ARCH_AVRXMEGA7,
-+ ARCH_AVRTINY10
- };
-
- struct mcu_type_s {
-@@ -126,6 +130,7 @@ extern GTY(()) section *progmem_section;
- #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
- #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
- #define AVR_XMEGA (avr_current_arch->xmega)
-+#define AVR_TINY (avr_current_arch->avrtiny)
- #define AVR_HAVE_RAMPX_Y_D (avr_current_arch->have_rampx_y_d)
-
- #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
-@@ -245,7 +250,6 @@ extern GTY(()) section *progmem_section;
-
- #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
-
--
- #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-
- #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
-@@ -309,6 +313,41 @@ enum reg_class {
- {0xffffffff,0x00000003} /* ALL_REGS */ \
- }
-
-+/* Zero or more C statements that may conditionally modify five variables
-+ fixed_regs, call_used_regs, global_regs, reg_names, and reg_class_contents,
-+ to take into account any dependence of these register sets on target flags.
-+ The first three of these are of type char [] (interpreted as Boolean
-+ vectors). global_regs is a const char *[], and reg_class_contents is a
-+ HARD_REG_SET. Before the macro is called, fixed_regs, call_used_regs,
-+ reg_class_contents, and reg_names have been initialized from
-+ FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS, and
-+ REGISTER_NAMES, respectively. global_regs has been cleared, and any
-+ \91-ffixed-reg\92, \91-fcall-used-reg\92 and \91-fcall-saved-reg\92 command options
-+ have been applied.
-+
-+ You need not define this macro if it has no work to do.
-+
-+ If the usage of an entire class of registers depends on the target flags,
-+ you may indicate this to GCC by using this macro to modify fixed_regs and
-+ call_used_regs to 1 for each of the registers in the classes which should
-+ not be used by GCC. Also define the macro REG_CLASS_FROM_LETTER /
-+ REG_CLASS_FROM_CONSTRAINT to return NO_REGS if it is called with a letter
-+ for a class that shouldn\92t be used. (However, if this class is not included
-+ in GENERAL_REGS and all of the insn patterns whose constraints permit this
-+ class are controlled by target switches, then GCC will automatically avoid
-+ using these registers when the target switches are opposed to them.) */
-+
-+#define CONDITIONAL_REGISTER_USAGE \
-+ if (AVR_TINY) { \
-+ int i; \
-+ for (i = 0; i <= 17; i++) { \
-+ fixed_regs[i] = 1; \
-+ call_used_regs[i] = 1; \
-+ } \
-+ CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]); \
-+ CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]); \
-+ }
-+
- #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
-
- /* The following macro defines cover classes for Integrated Register
-diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/avr.md 2011-10-27 17:47:15.000000000 +0530
-@@ -417,6 +417,9 @@
- [(set_attr "length" "8")
- (set_attr "cc" "none")])
-
-+(define_constants
-+ [(TMP_REGNO_AVRTINY10 16) ; temporary register r16
-+ (ZERO_REGNO_AVRTINY10 17)]) ; zero register r17
-
- (define_insn "*mov<ALLS:mode>"
- [(set (match_operand:ALLS 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
-@@ -476,7 +479,7 @@
- rtx addr1 = copy_to_mode_reg (Pmode, XEXP (operands[1], 0));
-
- /* Create rtx for tmp register - we use this as scratch. */
-- rtx tmp_reg_rtx = gen_rtx_REG (QImode, TMP_REGNO);
-+ rtx tmp_reg_rtx = gen_rtx_REG (QImode, AVR_TINY ? TMP_REGNO_AVRTINY10 : TMP_REGNO);
-
- if (GET_CODE (operands[2]) != CONST_INT)
- FAIL;
-@@ -2907,7 +2910,7 @@
- UNSPEC_INDEX_JMP))
- (use (label_ref (match_operand 1 "" "")))
- (clobber (match_dup 0))]
-- "AVR_HAVE_JMP_CALL && !AVR_HAVE_EIJMP_EICALL"
-+ "(AVR_HAVE_JMP_CALL && !AVR_HAVE_EIJMP_EICALL)"
- "lsl r30
- rol r31
- lpm
-diff -Naurp gcc/config/avr/libgcc-fixed.S gcc/config/avr/libgcc-fixed.S
---- gcc/config/avr/libgcc-fixed.S 2011-10-27 17:00:03.000000000 +0530
-+++ gcc/config/avr/libgcc-fixed.S 2011-10-27 17:47:15.000000000 +0530
-@@ -29,13 +29,17 @@ Boston, MA 02110-1301, USA. */
-
- /* Fixed point library routines for avr. */
-
-+#if defined (__AVR_TINY__)
-+#define __zero_reg__ r17
-+#define __tmp_reg__ r16
-+#else
- #define __zero_reg__ r1
- #define __tmp_reg__ r0
-+#endif
- #define __SREG__ 0x3f
- #define __SP_H__ 0x3e
- #define __SP_L__ 0x3d
- #define __RAMPZ__ 0x3B
--
- /* Conversions to float. */
- #if defined (L_fractqqsf)
- .global __fractqqsf
-@@ -281,15 +285,15 @@ __muluqq3_exit:
- .func __mulhq3
- __mulhq3:
- fmuls r_arg1H, r_arg2H
-- movw r_resL, r0
-+ movw r_resL, __tmp_reg__
- fmulsu r_arg2H, r_arg1L
- clr r_arg1L
- sbc r_resH, r_arg1L
-- add r_resL, r1
-+ add r_resL, __zero_reg__
- adc r_resH, r_arg1L
- fmulsu r_arg1H, r_arg2L
- sbc r_resH, r_arg1L
-- add r_resL, r1
-+ add r_resL, __zero_reg__
- adc r_resH, r_arg1L
- clr __zero_reg__
- ret
-@@ -301,13 +305,13 @@ __mulhq3:
- .func __muluhq3
- __muluhq3:
- mul r_arg1H, r_arg2H
-- movw r_resL, r0
-+ movw r_resL, __tmp_reg__
- mul r_arg1H, r_arg2L
-- add r_resL, r1
-+ add r_resL, __zero_reg__
- clr __zero_reg__
- adc r_resH, __zero_reg__
- mul r_arg1L, r_arg2H
-- add r_resL, r1
-+ add r_resL, __zero_reg__
- clr __zero_reg__
- adc r_resH, __zero_reg__
- ret
-@@ -401,15 +405,15 @@ __muluhq3_skip:
- .func __mulha3
- __mulha3:
- mul r_arg1L, r_arg2L
-- mov r_resL, r1
-+ mov r_resL, __zero_reg__
- muls r_arg1H, r_arg2H
-- mov r_resH, r0
-+ mov r_resH, __tmp_reg__
- mulsu r_arg1H, r_arg2L
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- mulsu r_arg2H, r_arg1L
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- clr __zero_reg__
- ret
- .endfunc
-@@ -420,15 +424,15 @@ __mulha3:
- .func __muluha3
- __muluha3:
- mul r_arg1L, r_arg2L
-- mov r_resL, r1
-+ mov r_resL, __zero_reg__
- mul r_arg1H, r_arg2H
-- mov r_resH, r0
-+ mov r_resH, __tmp_reg__
- mul r_arg1H, r_arg2L
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- mul r_arg1L, r_arg2H
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- clr __zero_reg__
- ret
- .endfunc
-@@ -442,8 +446,8 @@ __muluha3:
- #define r_arg2H r23 /* multiplicand High */
- #define r_resL r18 /* result Low */
- #define r_resH r19 /* result High */
--#define r_scratchL r0 /* scratch Low */
--#define r_scratchH r1
-+#define r_scratchL __tmp_reg__ /* scratch Low */
-+#define r_scratchH __zero_reg__
-
- #if defined (L_mulha3)
- .global __mulha3
-@@ -480,8 +484,8 @@ __mulha3_exit:
- __muluha3:
- clr r_resL ; clear result
- clr r_resH
-- mov_l r0, r_arg1L ; save multiplicand
-- mov_h r1, r_arg1H
-+ mov_l __tmp_reg__, r_arg1L ; save multiplicand
-+ mov_h __zero_reg__, r_arg1H
- __muluha3_loop1:
- sbrs r_arg2H,0
- rjmp __muluha3_skip1
-@@ -490,7 +494,12 @@ __muluha3_loop1:
- __muluha3_skip1:
- lsl r_arg1L ; shift multiplicand
- rol r_arg1H
-+#if defined (__AVR_TINY__)
-+ subi r_arg1L, lo8(0)
-+ sbci r_arg1L, hi8(0)
-+#else
- sbiw r_arg1L,0
-+#endif
- breq __muluha3_loop1_done ; exit multiplicand = 0
- lsr r_arg2H
- brne __muluha3_loop1 ; exit multiplier = 0
-@@ -500,7 +509,12 @@ __muluha3_loop1_done:
- __muluha3_loop2:
- lsr r_arg1H ; shift multiplicand
- ror r_arg1L
-+#if defined (__AVR_TINY__)
-+ subi r_arg1L, lo8(0)
-+ sbci r_arg1L, hi8(0)
-+#else
- sbiw r_arg1L,0
-+#endif
- breq __muluha3_exit ; exit if multiplicand = 0
- sbrs r_arg2L,7
- rjmp __muluha3_skip2
-@@ -556,53 +570,53 @@ __mulsa3:
- clr r_resHL
- clr r_resHH
- mul r_arg1H, r_arg2L
-- mov r_resL, r1
-+ mov r_resL, __zero_reg__
- mul r_arg1L, r_arg2H
-- add r_resL, r1
-+ add r_resL, __zero_reg__
- adc r_resH, r_clr
- mul r_arg1L, r_arg2HL
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- adc r_resHL, r_clr
- mul r_arg1H, r_arg2H
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- adc r_resHL, r_clr
- mul r_arg1HL, r_arg2L
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- adc r_resHL, r_clr
- mulsu r_arg2HH, r_arg1L
- sbc r_resHH, r_clr
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mul r_arg1H, r_arg2HL
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mul r_arg1HL, r_arg2H
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mulsu r_arg1HH, r_arg2L
- sbc r_resHH, r_clr
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mulsu r_arg2HH, r_arg1H
-- add r_resHL, r0
-- adc r_resHH, r1
-+ add r_resHL, __tmp_reg__
-+ adc r_resHH, __zero_reg__
- mul r_arg1HL, r_arg2HL
-- add r_resHL, r0
-- adc r_resHH, r1
-+ add r_resHL, __tmp_reg__
-+ adc r_resHH, __zero_reg__
- mulsu r_arg1HH, r_arg2H
-- add r_resHL, r0
-- adc r_resHH, r1
-+ add r_resHL, __tmp_reg__
-+ adc r_resHH, __zero_reg__
- mulsu r_arg2HH, r_arg1HL
-- add r_resHH, r0
-+ add r_resHH, __tmp_reg__
- mulsu r_arg1HH, r_arg2HL
-- add r_resHH, r0
-+ add r_resHH, __tmp_reg__
- clr __zero_reg__
- ret
- .endfunc
-@@ -617,51 +631,51 @@ __mulusa3:
- clr r_resHL
- clr r_resHH
- mul r_arg1H, r_arg2L
-- mov r_resL, r1
-+ mov r_resL, __zero_reg__
- mul r_arg1L, r_arg2H
-- add r_resL, r1
-+ add r_resL, __zero_reg__
- adc r_resH, r_clr
- mul r_arg1L, r_arg2HL
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- adc r_resHL, r_clr
- mul r_arg1H, r_arg2H
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- adc r_resHL, r_clr
- mul r_arg1HL, r_arg2L
-- add r_resL, r0
-- adc r_resH, r1
-+ add r_resL, __tmp_reg__
-+ adc r_resH, __zero_reg__
- adc r_resHL, r_clr
- mul r_arg1L, r_arg2HH
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mul r_arg1H, r_arg2HL
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mul r_arg1HL, r_arg2H
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mul r_arg1HH, r_arg2L
-- add r_resH, r0
-- adc r_resHL, r1
-+ add r_resH, __tmp_reg__
-+ adc r_resHL, __zero_reg__
- adc r_resHH, r_clr
- mul r_arg1H, r_arg2HH
-- add r_resHL, r0
-- adc r_resHH, r1
-+ add r_resHL, __tmp_reg__
-+ adc r_resHH, __zero_reg__
- mul r_arg1HL, r_arg2HL
-- add r_resHL, r0
-- adc r_resHH, r1
-+ add r_resHL, __tmp_reg__
-+ adc r_resHH, __zero_reg__
- mul r_arg1HH, r_arg2H
-- add r_resHL, r0
-- adc r_resHH, r1
-+ add r_resHL, __tmp_reg__
-+ adc r_resHH, __zero_reg__
- mul r_arg1HL, r_arg2HH
-- add r_resHH, r0
-+ add r_resHH, __tmp_reg__
- mul r_arg1HH, r_arg2HL
-- add r_resHH, r0
-+ add r_resHH, __tmp_reg__
- clr __zero_reg__
- ret
- .endfunc
-@@ -680,13 +694,20 @@ __mulusa3:
- #define r_arg2HL r26
- #define r_arg2HH r27 /* multiplicand High */
-
-+#if defined (__AVR_TINY__)
-+#define r_resL r28 /* result Low */
-+#define r_resH r29
-+#define r_resHL r30
-+#define r_resHH r31 /* result High */
-+#else
- #define r_resL r14 /* result Low */
- #define r_resH r15
- #define r_resHL r16
- #define r_resHH r17 /* result High */
-+#endif
-
--#define r_scratchL r0 /* scratch Low */
--#define r_scratchH r1
-+#define r_scratchL __tmp_reg__ /* scratch Low */
-+#define r_scratchH __zero_reg__
- #define r_scratchHL r22
- #define r_scratchHH r23 /* scratch High */
-
-@@ -758,7 +779,12 @@ __mulusa3_skip1:
- rol r_arg1HH
- lsr r_arg2HH
- ror r_arg2HL
-+#if defined (__AVR_TINY__)
-+ subi r_arg2HL, lo8(0)
-+ sbci r_arg2HL, hi8(0)
-+#else
- sbiw r_arg2HL,0
-+#endif
- brne __mulusa3_loop1 ; exit multiplier = 0
- __mulusa3_loop1_done:
- mov_l r_arg1L, r_scratchL ; restore multiplicand
-@@ -779,7 +805,12 @@ __mulusa3_loop2:
- __mulusa3_skip2:
- lsl r_arg2L
- rol r_arg2H
-+#if defined (__AVR_TINY__)
-+ subi r_arg2L, lo8(0)
-+ sbci r_arg2L, hi8(0)
-+#else
- sbiw r_arg2L,0
-+#endif
- brne __mulusa3_loop2 ; exit if multiplier = 0
- __mulusa3_exit:
- clr __zero_reg__ ; got clobbered
-@@ -791,9 +822,7 @@ __mulusa3_exit:
- #undef r_scratchH
- #undef r_scratchHL
- #undef r_scratchHH
--
- #endif
--
- #undef r_arg1L
- #undef r_arg1H
- #undef r_arg1HL
-@@ -821,8 +850,8 @@ __mulusa3_exit:
- .global __divqq3
- .func __divqq3
- __divqq3:
-- mov r0, r_divd
-- eor r0, r_div
-+ mov __tmp_reg__, r_divd
-+ eor __tmp_reg__, r_div
- sbrc r_div, 7
- neg r_div
- sbrc r_divd, 7
-@@ -831,7 +860,7 @@ __divqq3:
- breq __divqq3_minus1 ; if equal return -1
- rcall __udivuqq3
- lsr r_quo
-- sbrc r0, 7 ; negate result if needed
-+ sbrc __tmp_reg__, 7 ; negate result if needed
- neg r_quo
- ret
- __divqq3_minus1:
-@@ -886,8 +915,8 @@ __udivuqq3_cont:
- .global __divhq3
- .func __divhq3
- __divhq3:
-- mov r0, r_divdH
-- eor r0, r_divH
-+ mov __tmp_reg__, r_divdH
-+ eor __tmp_reg__, r_divH
- sbrs r_divH, 7
- rjmp __divhq3_divpos
- com r_divH
-@@ -906,7 +935,7 @@ __divhq3_divdpos:
- rcall __udivuhq3
- lsr r_quoH
- ror r_quoL
-- sbrs r0, 7 ; negate result if needed
-+ sbrs __tmp_reg__, 7 ; negate result if needed
- ret
- com r_quoH
- neg r_quoL
-@@ -958,8 +987,8 @@ __udivuhq3_cont:
- .global __divha3
- .func __divha3
- __divha3:
-- mov r0, r_divdH
-- eor r0, r_divH
-+ mov __tmp_reg__, r_divdH
-+ eor __tmp_reg__, r_divH
- sbrs r_divH, 7
- rjmp __divha3_divpos
- com r_divH
-@@ -973,7 +1002,7 @@ __divha3_divpos:
- sbci r_divdH,-1
- __divha3_divdpos:
- rcall __udivuha3
-- sbrs r0, 7 ; negate result if needed
-+ sbrs __tmp_reg__, 7 ; negate result if needed
- ret
- com r_quoH
- neg r_quoL
-@@ -1027,8 +1056,8 @@ __udivuha3:
- .global __divsa3
- .func __divsa3
- __divsa3:
-- mov r0, r27
-- eor r0, r_divHH
-+ mov __tmp_reg__, r27
-+ eor __tmp_reg__, r_divHH
- sbrs r_divHH, 7
- rjmp __divsa3_divpos
- com r_divHH
-@@ -1050,7 +1079,7 @@ __divsa3_divpos:
- sbci r_arg1HH,-1
- __divsa3_arg1pos:
- rcall __udivusa3
-- sbrs r0, 7 ; negate result if needed
-+ sbrs __tmp_reg__, 7 ; negate result if needed
- ret
- com r_quoHH
- com r_quoHL
-diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
---- gcc/config/avr/libgcc.S 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/libgcc.S 2011-10-27 17:47:15.000000000 +0530
-@@ -22,8 +22,13 @@ a copy of the GCC Runtime Library Except
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-+#if defined (__AVR_TINY__)
-+#define __zero_reg__ r17
-+#define __tmp_reg__ r16
-+#else
- #define __zero_reg__ r1
- #define __tmp_reg__ r0
-+#endif
- #define __SREG__ 0x3f
- #define __SP_H__ 0x3e
- #define __SP_L__ 0x3d
-@@ -141,7 +146,12 @@ __mulhi3_skip1:
-
- lsr r_arg1H ; gets LSB of multiplier
- ror r_arg1L
-+#if defined (__AVR_TINY__)
-+ subi r_arg1L, lo8(0)
-+ sbci r_arg1L, hi8(0)
-+#else
- sbiw r_arg1L,0
-+#endif
- brne __mulhi3_loop ; exit if multiplier = 0
- __mulhi3_exit:
- mov r_arg1H,r_resH ; result to return register
-@@ -305,7 +315,12 @@ __mulsi3_skip1:
- ror r_arg1H
- ror r_arg1L
- brne __mulsi3_loop
-+#if defined (__AVR_TINY__)
-+ subi r_arg1HL, lo8(0)
-+ sbci r_arg1HL, hi8(0)
-+#else
- sbiw r_arg1HL,0
-+#endif
- cpc r_arg1H,r_arg1L
- brne __mulsi3_loop ; exit if multiplier = 0
- __mulsi3_exit:
-@@ -611,6 +626,7 @@ __divmodsi4_neg1:
- /**********************************
- * This is a prologue subroutine
- **********************************/
-+#if !defined (__AVR_TINY__)
- #if defined (L_prologue)
-
- .global __prologue_saves__
-@@ -664,7 +680,6 @@ __prologue_saves__:
- * This is an epilogue subroutine
- */
- #if defined (L_epilogue)
--
- .global __epilogue_restores__
- .func __epilogue_restores__
- __epilogue_restores__:
-@@ -705,6 +720,7 @@ __epilogue_restores__:
- ret
- .endfunc
- #endif /* defined (L_epilogue) */
-+#endif /* !defined (__AVR_TINY__) */
-
- #ifdef L_exit
- .section .fini9,"ax",@progbits
-@@ -731,6 +747,7 @@ _cleanup:
- .endfunc
- #endif /* defined (L_cleanup) */
-
-+#if !defined(__AVR_TINY__)
- #ifdef L_tablejump
- .global __tablejump2__
- .func __tablejump2__
-@@ -763,7 +780,9 @@ __tablejump__:
- #endif
- .endfunc
- #endif /* defined (L_tablejump) */
-+#endif
-
-+#if !defined(__AVR_TINY__)
- #ifdef L_copy_data
- .section .init4,"ax",@progbits
- .global __do_copy_data
-@@ -825,6 +844,7 @@ __do_copy_data:
- brne .L__do_copy_data_loop
- #endif /* !defined(__AVR_HAVE_ELPMX__) && !defined(__AVR_HAVE_ELPM__) */
- #endif /* L_copy_data */
-+#endif
-
- /* __do_clear_bss is only necessary if there is anything in .bss section. */
-
-@@ -864,7 +884,12 @@ __do_global_ctors:
- ldi r16, hh8(__ctors_end)
- rjmp .L__do_global_ctors_start
- .L__do_global_ctors_loop:
-+ #if defined (__AVR_TINY__)
-+ subi r28, lo8(2)
-+ sbci r29, hi8(2)
-+ #else
- sbiw r28, 2
-+ #endif
- sbc r16, __zero_reg__
- mov_h r31, r29
- mov_l r30, r28
-@@ -883,7 +908,12 @@ __do_global_ctors:
- ldi r29, hi8(__ctors_end)
- rjmp .L__do_global_ctors_start
- .L__do_global_ctors_loop:
-+#if defined (__AVR_TINY__)
-+ subi r28, lo8(2)
-+ sbci r29, hi8(2)
-+#else
- sbiw r28, 2
-+#endif
- mov_h r31, r29
- mov_l r30, r28
- XCALL __tablejump__
-@@ -905,7 +935,12 @@ __do_global_dtors:
- ldi r16, hh8(__dtors_start)
- rjmp .L__do_global_dtors_start
- .L__do_global_dtors_loop:
-+ #if defined (__AVR_TINY__)
-+ subi r28, lo8(2)
-+ sbci r29, hi8(2)
-+ #else
- sbiw r28, 2
-+ #endif
- sbc r16, __zero_reg__
- mov_h r31, r29
- mov_l r30, r28
-@@ -927,7 +962,12 @@ __do_global_dtors:
- mov_h r31, r29
- mov_l r30, r28
- XCALL __tablejump__
-+#if defined (__AVR_TINY__)
-+ subi r28, lo8(-2)
-+ sbci r29, hi8(-2)
-+#else
- adiw r28, 2
-+#endif
- .L__do_global_dtors_start:
- cpi r28, lo8(__dtors_end)
- cpc r29, r17
-@@ -935,6 +975,7 @@ __do_global_dtors:
- #endif /* defined(__AVR_HAVE_RAMPZ__) */
- #endif /* L_dtors */
-
-+#if !defined (__AVR_TINY__)
- #ifdef L_tablejump_elpm
- .global __tablejump_elpm__
- .func __tablejump_elpm__
-@@ -965,5 +1006,6 @@ __tablejump_elpm__:
- #endif /* defined (__AVR_HAVE_ELPM__) */
- .endfunc
- #endif /* defined (L_tablejump_elpm) */
-+#endif /* !defined (__AVR_TINY__) */
-
- #include "libgcc-fixed.S"
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-27 17:00:24.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-27 17:47:15.000000000 +0530
-@@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
-
- FPBIT = fp-bit.c
-
--MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7
--MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7
-+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7/mmcu=avrtiny10
-+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny10
-
- # The many avr2 matches are not listed here - this is the default.
- MULTILIB_MATCHES = \
-@@ -270,7 +270,13 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega256a3b \
- mmcu?avrxmega6=mmcu?atxmega256d3 \
- mmcu?avrxmega7=mmcu?atxmega128a1 \
-- mmcu?avrxmega7=mmcu?atxmega128a1u
-+ mmcu?avrxmega7=mmcu?atxmega128a1u \
-+ mmcu?avrtiny10=mmcu?attiny4 \
-+ mmcu?avrtiny10=mmcu?attiny5 \
-+ mmcu?avrtiny10=mmcu?attiny9 \
-+ mmcu?avrtiny10=mmcu?attiny10 \
-+ mmcu?avrtiny10=mmcu?attiny20 \
-+ mmcu?avrtiny10=mmcu?attiny40
-
- MULTILIB_EXCEPTIONS =
-
--- /dev/null
+diff --git gcc/common/config/avr/avr-common.c gcc/common/config/avr/avr-common.c
+index 0ede117..b2b8359 100644
+--- gcc/common/config/avr/avr-common.c
++++ gcc/common/config/avr/avr-common.c
+@@ -32,10 +32,39 @@ static const struct default_options avr_option_optimization_table[] =
+ { OPT_LEVELS_NONE, 0, NULL, 0 }
+ };
+
++static bool
++avr_handle_target_option (struct gcc_options *opts,
++ struct gcc_options *opts_set, const struct cl_decoded_option *decoded,
++ location_t loc)
++{
++ if (avr_list_supported_parts)
++ {
++ const struct mcu_type_s *list_part;
++
++ fprintf (stdout, "List of parts supported by avr-gcc:\n");
++
++ for (list_part = &avr_mcu_types[0]; list_part->name; list_part++)
++ {
++ if (!list_part->macro)
++ list_part++;
++ fprintf (stdout, "%-20s%s\n", list_part->name, list_part->macro);
++ }
++
++ fprintf (stdout, "\n");
++
++ }
++
++ return true;
++}
++
++
+ #undef TARGET_OPTION_OPTIMIZATION_TABLE
+ #define TARGET_OPTION_OPTIMIZATION_TABLE avr_option_optimization_table
+
+ #undef TARGET_EXCEPT_UNWIND_INFO
+ #define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
+
++#undef TARGET_HANDLE_OPTION
++#define TARGET_HANDLE_OPTION avr_handle_target_option
++
+ struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+diff --git gcc/config/avr/avr.opt gcc/config/avr/avr.opt
+index 0ad38c6..3649c5b 100644
+--- gcc/config/avr/avr.opt
++++ gcc/config/avr/avr.opt
+@@ -66,6 +66,10 @@ mpmem-wrap-around
+ Target Report
+ Make the linker relaxation machine assume that a program counter wrap-around occurs.
+
++mlist-devices
++Target RejectNegative Var(avr_list_supported_parts)
++Print the list of parts supported while printing --target-help
++
+ maccumulate-args
+ Target Report Mask(ACCUMULATE_OUTGOING_ARGS)
+ Accumulate outgoing function arguments and acquire/release the needed stack space for outpoing function arguments in function prologue/epilogue. Without this option, outgoing arguments are pushed before calling a function and popped afterwards. This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf.
--- /dev/null
+diff -Naurp gcc/config/avr/avr-mcus.def gcc/config/avr/avr-mcus.def
+--- gcc/config/avr/avr-mcus.def 2012-12-21 15:00:20.000000000 +0530
++++ gcc/config/avr/avr-mcus.def 2012-12-21 14:52:57.000000000 +0530
+@@ -48,7 +48,6 @@ AVR_MCU ("at90c8534", ARCH_AV
+ AVR_MCU ("at90s8535", ARCH_AVR2, "__AVR_AT90S8535__", 0, 0, 0x0060, 1, "s8535")
+ /* Classic + MOVW, <= 8K. */
+ AVR_MCU ("avr25", ARCH_AVR25, NULL, 0, 0, 0x0060, 1, "tn85")
+-AVR_MCU ("ata6289", ARCH_AVR25, "__AVR_ATA6289__", 0, 0, 0x0100, 1, "a6289")
+ AVR_MCU ("attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0, 0x0060, 1, "tn13")
+ AVR_MCU ("attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0, 0x0060, 1, "tn13a")
+ AVR_MCU ("attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0, 0x0060, 1, "tn2313")
+@@ -92,6 +91,7 @@ AVR_MCU ("atmega32u2", ARCH_AV
+ AVR_MCU ("attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0, 0x0100, 1, "tn167")
+ /* Enhanced, <= 8K. */
+ AVR_MCU ("avr4", ARCH_AVR4, NULL, 0, 0, 0x0060, 1, "m8")
++AVR_MCU ("ata6289", ARCH_AVR4, "__AVR_ATA6289__", 0, 0, 0x0100, 1, "a6289")
+ AVR_MCU ("atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0, 0x0060, 1, "m8")
+ AVR_MCU ("atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0, 0x0100, 1, "m48")
+ AVR_MCU ("atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0, 0x0100, 1, "m48a")
+diff -Naurp gcc/config/avr/t-multilib gcc/config/avr/t-multilib
+--- gcc/config/avr/t-multilib 2012-12-21 15:00:06.000000000 +0530
++++ gcc/config/avr/t-multilib 2012-12-21 14:56:29.000000000 +0530
+@@ -53,7 +53,6 @@ MULTILIB_MATCHES = \
+ mmcu?avr2=mmcu?at90s8515 \
+ mmcu?avr2=mmcu?at90c8534 \
+ mmcu?avr2=mmcu?at90s8535 \
+- mmcu?avr25=mmcu?ata6289 \
+ mmcu?avr25=mmcu?attiny13 \
+ mmcu?avr25=mmcu?attiny13a \
+ mmcu?avr25=mmcu?attiny2313 \
+@@ -89,6 +88,7 @@ MULTILIB_MATCHES = \
+ mmcu?avr35=mmcu?atmega16u2 \
+ mmcu?avr35=mmcu?atmega32u2 \
+ mmcu?avr35=mmcu?attiny167 \
++ mmcu?avr4=mmcu?ata6289 \
+ mmcu?avr4=mmcu?atmega8 \
+ mmcu?avr4=mmcu?atmega48 \
+ mmcu?avr4=mmcu?atmega48a \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 17:47:15.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 17:53:42.000000000 +0530
-@@ -881,8 +881,9 @@ expand_prologue (void)
- emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
- }
- else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS )
-- || cfun->machine->is_signal
-- || cfun->machine->is_OS_main)
-+ || (!AVR_XMEGA && cfun->machine->is_signal)
-+ || (!AVR_XMEGA && cfun->machine->is_OS_main)
-+ || (AVR_XMEGA && cfun->machine->is_nmi))
- {
- emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
- frame_pointer_rtx));
-@@ -1070,7 +1071,8 @@ expand_epilogue (void)
- emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
- }
- else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
-- || (!AVR_XMEGA && cfun->machine->is_signal))
-+ || (!AVR_XMEGA && cfun->machine->is_signal)
-+ || (AVR_XMEGA && cfun->machine->is_nmi))
- {
- emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
- frame_pointer_rtx));
-diff -Naurp gcc/function.c gcc/function.c
---- gcc/function.c 2011-10-27 17:19:51.000000000 +0530
-+++ gcc/function.c 2011-10-27 17:53:42.000000000 +0530
-@@ -5254,6 +5254,14 @@ contains (const_rtx insn, htab_t hash)
- }
-
- int
-+prologue_contains (const_rtx insn)
-+{
-+ if (contains (insn, prologue_insn_hash))
-+ return 1;
-+ return 0;
-+}
-+
-+int
- prologue_epilogue_contains (const_rtx insn)
- {
- if (contains (insn, prologue_insn_hash))
-diff -Naurp gcc/rtl.h gcc/rtl.h
---- gcc/rtl.h 2011-10-27 17:19:52.000000000 +0530
-+++ gcc/rtl.h 2011-10-27 17:53:42.000000000 +0530
-@@ -2402,6 +2402,7 @@ extern void print_inline_rtx (FILE *, co
-
- /* In function.c */
- extern void reposition_prologue_and_epilogue_notes (void);
-+extern int prologue_contains (const_rtx);
- extern int prologue_epilogue_contains (const_rtx);
- extern int sibcall_epilogue_contains (const_rtx);
- extern void mark_temp_addr_taken (rtx);
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 17:53:42.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 18:00:50.000000000 +0530
-@@ -29,6 +29,7 @@
- #include "insn-config.h"
- #include "conditions.h"
- #include "insn-attr.h"
-+#include "insn-codes.h"
- #include "flags.h"
- #include "reload.h"
- #include "tree.h"
-@@ -38,7 +39,9 @@
- #include "obstack.h"
- #include "function.h"
- #include "recog.h"
-+#include "optabs.h"
- #include "ggc.h"
-+#include "langhooks.h"
- #include "tm_p.h"
- #include "target.h"
- #include "target-def.h"
-@@ -90,6 +93,8 @@ static bool avr_rtx_costs (rtx, int, int
- static int avr_address_cost (rtx, bool);
- static bool avr_return_in_memory (const_tree, const_tree);
- static struct machine_function * avr_init_machine_status (void);
-+static void avr_init_builtins (void);
-+static rtx avr_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
- static rtx avr_builtin_setjmp_frame_value (void);
- static bool avr_hard_regno_scratch_ok (unsigned int);
- static unsigned int avr_case_values_threshold (void);
-@@ -241,6 +246,13 @@ static const struct default_options avr_
- #undef TARGET_SCALAR_MODE_SUPPORTED_P
- #define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
-
-+#undef TARGET_INIT_BUILTINS
-+#define TARGET_INIT_BUILTINS avr_init_builtins
-+
-+#undef TARGET_EXPAND_BUILTIN
-+#define TARGET_EXPAND_BUILTIN avr_expand_builtin
-+
-+
- /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
- static bool
- avr_scalar_mode_supported_p (enum machine_mode mode)
-@@ -7506,4 +7518,237 @@ unsigned int avr_case_values_threshold (
- return (!AVR_HAVE_JMP_CALL || TARGET_CALL_PROLOGUES) ? 8 : 17;
- }
-
-+/* Codes for all the AVR builtins. */
-+
-+enum avr_builtins
-+{
-+ AVR_BUILTIN_SEI,
-+ AVR_BUILTIN_CLI,
-+ AVR_BUILTIN_WDR,
-+ AVR_BUILTIN_SLEEP,
-+ AVR_BUILTIN_SWAP,
-+ AVR_BUILTIN_FMUL,
-+ AVR_BUILTIN_FMULS,
-+ AVR_BUILTIN_FMULSU,
-+ AVR_BUILTIN_DELAY_CYCLES
-+};
-+
-+#define def_builtin(NAME, TYPE, CODE) \
-+do { \
-+ add_builtin_function ((NAME), (TYPE), (CODE), BUILT_IN_MD, \
-+ NULL, NULL_TREE); \
-+} while (0)
-+
-+/* Set up all builtin functions for this target. */
-+
-+static void
-+avr_init_builtins (void)
-+{
-+ tree void_ftype_void
-+ = build_function_type (void_type_node, void_list_node);
-+ tree uchar_ftype_uchar
-+ = build_function_type_list (unsigned_char_type_node,
-+ unsigned_char_type_node,
-+ NULL_TREE);
-+ tree uint_ftype_uchar_uchar
-+ = build_function_type_list (unsigned_type_node,
-+ unsigned_char_type_node,
-+ unsigned_char_type_node,
-+ NULL_TREE);
-+ tree int_ftype_char_char
-+ = build_function_type_list (integer_type_node,
-+ char_type_node,
-+ char_type_node,
-+ NULL_TREE);
-+ tree int_ftype_char_uchar
-+ = build_function_type_list (integer_type_node,
-+ char_type_node,
-+ unsigned_char_type_node,
-+ NULL_TREE);
-+ tree void_ftype_ulong
-+ = build_function_type_list (void_type_node,
-+ long_unsigned_type_node,
-+ NULL_TREE);
-+
-+ def_builtin ("__builtin_avr_sei", void_ftype_void, AVR_BUILTIN_SEI);
-+ def_builtin ("__builtin_avr_cli", void_ftype_void, AVR_BUILTIN_CLI);
-+ def_builtin ("__builtin_avr_wdr", void_ftype_void, AVR_BUILTIN_WDR);
-+ def_builtin ("__builtin_avr_sleep", void_ftype_void, AVR_BUILTIN_SLEEP);
-+
-+ if (AVR_HAVE_MUL)
-+ {
-+ def_builtin ("__builtin_avr_fmul", uint_ftype_uchar_uchar,
-+ AVR_BUILTIN_FMUL);
-+ def_builtin ("__builtin_avr_fmuls", int_ftype_char_char,
-+ AVR_BUILTIN_FMULS);
-+ def_builtin ("__builtin_avr_fmulsu", int_ftype_char_uchar,
-+ AVR_BUILTIN_FMULSU);
-+ }
-+
-+ def_builtin ("__builtin_avr_swap", uchar_ftype_uchar, AVR_BUILTIN_SWAP);
-+ def_builtin ("__builtin_avr_delay_cycles", void_ftype_ulong,
-+ AVR_BUILTIN_DELAY_CYCLES);
-+}
-+
-+struct builtin_description
-+{
-+ const enum insn_code icode;
-+ const char *const name;
-+ const enum avr_builtins code;
-+};
-+
-+static const struct builtin_description bdesc_1arg[] =
-+{
-+ { CODE_FOR_swap, "__builtin_avr_swap", AVR_BUILTIN_SWAP }
-+};
-+
-+static const struct builtin_description bdesc_2arg[] =
-+{
-+ { CODE_FOR_fmul, "__builtin_avr_fmul", AVR_BUILTIN_FMUL },
-+ { CODE_FOR_fmuls, "__builtin_avr_fmuls", AVR_BUILTIN_FMULS },
-+ { CODE_FOR_fmulsu, "__builtin_avr_fmulsu", AVR_BUILTIN_FMULSU }
-+};
-+
-+/* Subroutine of avr_expand_builtin to take care of unop insns. */
-+
-+static rtx
-+avr_expand_unop_builtin (enum insn_code icode, tree exp,
-+ rtx target)
-+{
-+ rtx pat;
-+ tree arg0 = CALL_EXPR_ARG (exp, 0);
-+ rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
-+ enum machine_mode op0mode = GET_MODE (op0);
-+ enum machine_mode tmode = insn_data[icode].operand[0].mode;
-+ enum machine_mode mode0 = insn_data[icode].operand[1].mode;
-+
-+ if (! target
-+ || GET_MODE (target) != tmode
-+ || ! (*insn_data[icode].operand[0].predicate) (target, tmode))
-+ target = gen_reg_rtx (tmode);
-+
-+ if (op0mode == SImode && mode0 == HImode)
-+ {
-+ op0mode = HImode;
-+ op0 = gen_lowpart (HImode, op0);
-+ }
-+ gcc_assert (op0mode == mode0 || op0mode == VOIDmode);
-+
-+ if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
-+ op0 = copy_to_mode_reg (mode0, op0);
-+
-+ pat = GEN_FCN (icode) (target, op0);
-+ if (! pat)
-+ return 0;
-+ emit_insn (pat);
-+ return target;
-+}
-+
-+/* Subroutine of avr_expand_builtin to take care of binop insns. */
-+
-+static rtx
-+avr_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
-+{
-+ rtx pat;
-+ tree arg0 = CALL_EXPR_ARG (exp, 0);
-+ tree arg1 = CALL_EXPR_ARG (exp, 1);
-+ rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
-+ rtx op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
-+ enum machine_mode op0mode = GET_MODE (op0);
-+ enum machine_mode op1mode = GET_MODE (op1);
-+ enum machine_mode tmode = insn_data[icode].operand[0].mode;
-+ enum machine_mode mode0 = insn_data[icode].operand[1].mode;
-+ enum machine_mode mode1 = insn_data[icode].operand[2].mode;
-+
-+ if (! target
-+ || GET_MODE (target) != tmode
-+ || ! (*insn_data[icode].operand[0].predicate) (target, tmode))
-+ target = gen_reg_rtx (tmode);
-+
-+ if ((op0mode == SImode || op0mode == VOIDmode) && mode0 == HImode)
-+ {
-+ op0mode = HImode;
-+ op0 = gen_lowpart (HImode, op0);
-+ }
-+ if ((op1mode == SImode || op1mode == VOIDmode) && mode1 == HImode)
-+ {
-+ op1mode = HImode;
-+ op1 = gen_lowpart (HImode, op1);
-+ }
-+ /* In case the insn wants input operands in modes different from
-+ the result, abort. */
-+ gcc_assert ((op0mode == mode0 || op0mode == VOIDmode)
-+ && (op1mode == mode1 || op1mode == VOIDmode));
-+
-+ if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
-+ op0 = copy_to_mode_reg (mode0, op0);
-+ if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
-+ op1 = copy_to_mode_reg (mode1, op1);
-+
-+ pat = GEN_FCN (icode) (target, op0, op1);
-+ if (! pat)
-+ return 0;
-+
-+ emit_insn (pat);
-+ return target;
-+}
-+
-+/* Expand an expression EXP that calls a built-in function,
-+ with result going to TARGET if that's convenient
-+ (and in mode MODE if that's convenient).
-+ SUBTARGET may be used as the target for computing one of EXP's operands.
-+ IGNORE is nonzero if the value is to be ignored. */
-+
-+static rtx
-+avr_expand_builtin (tree exp, rtx target,
-+ rtx subtarget ATTRIBUTE_UNUSED,
-+ enum machine_mode mode ATTRIBUTE_UNUSED,
-+ int ignore ATTRIBUTE_UNUSED)
-+{
-+ size_t i;
-+ const struct builtin_description *d;
-+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
-+ unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
-+ rtx pat;
-+ tree arg0;
-+ rtx op0;
-+
-+ switch (fcode)
-+ {
-+ case AVR_BUILTIN_SEI:
-+ emit_insn (gen_enable_interrupt ());
-+ return 0;
-+ case AVR_BUILTIN_CLI:
-+ emit_insn (gen_disable_interrupt ());
-+ return 0;
-+ case AVR_BUILTIN_WDR:
-+ emit_insn (gen_wdr ());
-+ return 0;
-+ case AVR_BUILTIN_SLEEP:
-+ emit_insn (gen_sleep ());
-+ return 0;
-+ case AVR_BUILTIN_DELAY_CYCLES:
-+ {
-+ arg0 = CALL_EXPR_ARG (exp, 0);
-+ op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
-+
-+ if (!CONSTANT_P (op0))
-+ error ("__builtin_avr_delay_cycles expects an integer constant.");
-+
-+ emit_insn (gen_delay_cycles (op0));
-+ return 0;
-+ }
-+ }
-+
-+ for (i = 0, d = bdesc_1arg; i < ARRAY_SIZE (bdesc_1arg); i++, d++)
-+ if (d->code == fcode)
-+ return avr_expand_unop_builtin (d->icode, exp, target);
-+
-+ for (i = 0, d = bdesc_1arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++)
-+ if (d->code == fcode)
-+ return avr_expand_binop_builtin (d->icode, exp, target);
-+
-+ gcc_unreachable ();
-+}
-+
- #include "gt-avr.h"
-diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2011-10-27 17:53:20.000000000 +0530
-+++ gcc/config/avr/avr.md 2011-10-27 18:00:50.000000000 +0530
-@@ -50,14 +50,29 @@
-
- (UNSPEC_STRLEN 0)
- (UNSPEC_INDEX_JMP 1)
-- (UNSPEC_SEI 2)
-- (UNSPEC_CLI 3)
-+ (UNSPEC_SWAP 2)
-+ (UNSPEC_FMUL 3)
-+ (UNSPEC_FMULS 4)
-+ (UNSPEC_FMULSU 5)
-+
-
- (UNSPECV_PROLOGUE_SAVES 0)
- (UNSPECV_EPILOGUE_RESTORES 1)
- (UNSPECV_WRITE_SP_IRQ_ON 2)
- (UNSPECV_WRITE_SP_IRQ_OFF 3)
-- (UNSPECV_GOTO_RECEIVER 4)])
-+ (UNSPECV_GOTO_RECEIVER 4)
-+ (UNSPECV_SEI 5)
-+ (UNSPECV_CLI 6)
-+ (UNSPECV_NOP 7)
-+ (UNSPECV_NOP2 8)
-+ (UNSPECV_SLEEP 9)
-+ (UNSPECV_WDR 10)
-+
-+ (UNSPECV_DELAY_CYCLES 100)
-+ (UNSPECV_DELAY_CYCLES_1 101)
-+ (UNSPECV_DELAY_CYCLES_2 102)
-+ (UNSPECV_DELAY_CYCLES_3 103)
-+ (UNSPECV_DELAY_CYCLES_4 104)])
-
- (include "predicates.md")
- (include "constraints.md")
-@@ -2820,13 +2835,6 @@
- (const_int 1))
- (const_int 3)])])
-
--(define_insn "nop"
-- [(const_int 0)]
-- ""
-- "nop"
-- [(set_attr "cc" "none")
-- (set_attr "length" "1")])
--
- ; indirect jump
-
- (define_expand "indirect_jump"
-@@ -3220,7 +3228,7 @@
-
- ;; Enable Interrupts
- (define_insn "enable_interrupt"
-- [(unspec [(const_int 0)] UNSPEC_SEI)]
-+ [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
- ""
- "sei"
- [(set_attr "length" "1")
-@@ -3229,7 +3237,7 @@
-
- ;; Disable Interrupts
- (define_insn "disable_interrupt"
-- [(unspec [(const_int 0)] UNSPEC_CLI)]
-+ [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
- ""
- "cli"
- [(set_attr "length" "1")
-@@ -3329,3 +3337,219 @@
- expand_epilogue ();
- DONE;
- }")
-+
-+;;delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay
-+;; delay_cycles
-+
-+(define_expand "delay_cycles"
-+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "i")]
-+ UNSPECV_DELAY_CYCLES)]
-+ ""
-+ "
-+ rtx loop_reg;
-+ unsigned int cycles = INTVAL (operands[0]);
-+ if (IN_RANGE(cycles, 83886082, 0xFFFFFFFF))
-+ {
-+ unsigned int loop_count = ((cycles - 9) / 6) + 1;
-+ unsigned int cycles_used = (((loop_count - 1) * 6) + 9);
-+ emit_insn (gen_delay_cycles_4 (gen_int_mode (loop_count, SImode)));
-+ cycles -= cycles_used;
-+ }
-+ if (IN_RANGE(cycles, 262145, 83886081))
-+ {
-+ unsigned int loop_count = ((cycles - 7) / 5) + 1;
-+ if (loop_count > 0xFFFFFF)
-+ loop_count = 0xFFFFFF;
-+ unsigned int cycles_used = (((loop_count - 1) * 5) + 7);
-+ emit_insn (gen_delay_cycles_3 (gen_int_mode (loop_count, SImode)));
-+ cycles -= cycles_used;
-+ }
-+ if (IN_RANGE(cycles, 768, 262144))
-+ {
-+ unsigned int loop_count = ((cycles - 5) / 4) + 1;
-+ if (loop_count > 0xFFFF)
-+ loop_count = 0xFFFF;
-+ unsigned int cycles_used = (((loop_count - 1) * 4) + 5);
-+ emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
-+ cycles -= cycles_used;
-+ }
-+ if (IN_RANGE(cycles, 6, 767))
-+ {
-+ unsigned int loop_count = (cycles/ 3);
-+ if (loop_count > 255)
-+ loop_count = 255;
-+ unsigned int cycles_used = (loop_count * 3);
-+ emit_insn (gen_delay_cycles_1 (gen_int_mode (loop_count, QImode)));
-+ cycles -= cycles_used;
-+ }
-+ while (cycles >= 2)
-+ {
-+ emit_insn (gen_nop2 ());
-+ cycles -= 2;
-+ }
-+ if (cycles == 1)
-+ {
-+ emit_insn (gen_nop ());
-+ cycles--;
-+ }
-+ DONE;
-+ ")
-+
-+(define_insn "delay_cycles_1"
-+[(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_1)
-+ (match_operand:QI 0 "immediate_operand" "")
-+ (clobber (match_scratch:QI 1 "=&d"))]
-+ ""
-+ " ldi %1,lo8(%0)
-+ 1:dec %1
-+ brne 1b"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+(define_insn "delay_cycles_2"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_2)
-+ (match_operand:HI 0 "immediate_operand" "")
-+ (clobber (match_scratch:HI 1 "=&w"))]
-+ ""
-+ " ldi %A1,lo8(%0)
-+ ldi %B1,hi8(%0)
-+ 1:sbiw %A1,1
-+ brne 1b"
-+ [(set_attr "length" "4")
-+ (set_attr "cc" "clobber")])
-+
-+(define_insn "delay_cycles_3"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_3)
-+ (match_operand:SI 0 "immediate_operand" "")
-+ (clobber (match_scratch:SI 1 "=&d"))]
-+ ""
-+ " ldi %A1,lo8(%0)
-+ ldi %B1,hi8(%0)
-+ ldi %C1,hlo8(%0)
-+ 1:subi %A1,1
-+ sbci %B1,0
-+ sbci %C1,0
-+ brne 1b"
-+ [(set_attr "length" "7")
-+ (set_attr "cc" "clobber")])
-+
-+(define_insn "delay_cycles_4"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_4)
-+ (match_operand:SI 0 "immediate_operand" "")
-+ (clobber (match_scratch:SI 1 "=&d"))]
-+ ""
-+ " ldi %A1,lo8(%0)
-+ ldi %B1,hi8(%0)
-+ ldi %C1,hlo8(%0)
-+ ldi %D1,hhi8(%0)
-+ 1:subi %A1,1
-+ sbci %B1,0
-+ sbci %C1,0
-+ sbci %D1,0
-+ brne 1b"
-+ [(set_attr "length" "9")
-+ (set_attr "cc" "clobber")])
-+
-+;; CPU instructions
-+
-+;; NOP
-+(define_insn "nop"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP)]
-+ ""
-+ "nop"
-+ [(set_attr "length" "1")
-+ (set_attr "cc" "none")])
-+
-+;; NOP2
-+(define_insn "nop2"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP2)]
-+ ""
-+ "rjmp ."
-+ [(set_attr "length" "1")
-+ (set_attr "cc" "none")])
-+
-+;; SEI, Enable Interrupts
-+;(define_insn "sei"
-+; [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
-+; ""
-+; "sei"
-+; [(set_attr "length" "1")
-+; (set_attr "cc" "none")
-+; ])
-+
-+;; CLI, Disable Interrupts
-+;(define_insn "cli"
-+; [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
-+; ""
-+; "cli"
-+; [(set_attr "length" "1")
-+; (set_attr "cc" "none")
-+; ])
-+
-+;; SLEEP
-+(define_insn "sleep"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)]
-+ ""
-+ "sleep"
-+ [(set_attr "length" "1")
-+ (set_attr "cc" "none")
-+ ])
-+
-+;; WDR
-+(define_insn "wdr"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_WDR)]
-+ ""
-+ "wdr"
-+ [(set_attr "length" "1")
-+ (set_attr "cc" "none")
-+ ])
-+
-+;; SWAP
-+(define_insn "swap"
-+ [(set (match_operand:QI 0 "register_operand" "=r")
-+ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
-+ UNSPEC_SWAP))]
-+ ""
-+ "swap %0"
-+ [(set_attr "length" "1")
-+ (set_attr "cc" "none")])
-+
-+;; FMUL
-+(define_insn "fmul"
-+ [(set (match_operand:HI 0 "a_register_operand" "=r")
-+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
-+ (match_operand:QI 2 "a_register_operand" "r")]
-+ UNSPEC_FMUL))]
-+ "AVR_HAVE_MUL"
-+ "fmul %1,%2
-+ movw %0,r0
-+ clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+;; FMULS
-+(define_insn "fmuls"
-+ [(set (match_operand:HI 0 "a_register_operand" "=r")
-+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
-+ (match_operand:QI 2 "a_register_operand" "r")]
-+ UNSPEC_FMULS))]
-+ "AVR_HAVE_MUL"
-+ "fmuls %1,%2
-+ movw %0,r0
-+ clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-+;; FMULSU
-+(define_insn "fmulsu"
-+ [(set (match_operand:HI 0 "a_register_operand" "=r")
-+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
-+ (match_operand:QI 2 "a_register_operand" "r")]
-+ UNSPEC_FMULSU))]
-+ "AVR_HAVE_MUL"
-+ "fmulsu %1,%2
-+ movw %0,r0
-+ clr r1"
-+ [(set_attr "length" "3")
-+ (set_attr "cc" "clobber")])
-+
-diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
---- gcc/config/avr/predicates.md 2011-10-27 17:53:20.000000000 +0530
-+++ gcc/config/avr/predicates.md 2011-10-27 18:00:50.000000000 +0530
-@@ -27,6 +27,11 @@
- (and (match_code "reg")
- (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
-
-+;; Registers from r16 to 24.
-+(define_predicate "a_register_operand"
-+ (and (match_code "reg")
-+ (match_test "REGNO (op) >= 16 && REGNO (op) <= 24")))
-+
- (define_predicate "even_register_operand"
- (and (match_code "reg")
- (and (match_test "REGNO (op) <= 31")
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 18:00:50.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 18:05:35.000000000 +0530
-@@ -246,6 +246,9 @@ static const struct default_options avr_
- #undef TARGET_SCALAR_MODE_SUPPORTED_P
- #define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
-
-+#undef TARGET_FIXED_POINT_SUPPORTED_P
-+#define TARGET_FIXED_POINT_SUPPORTED_P avr_fixed_point_supported_p
-+
- #undef TARGET_INIT_BUILTINS
- #define TARGET_INIT_BUILTINS avr_init_builtins
-
-@@ -263,6 +266,17 @@ static const struct default_options avr_
- return default_scalar_mode_supported_p (mode);
- }
-
-+ /* Implement TARGET_FIXED_POINT_SUPPORTED_P. */
-+ static bool
-+ avr_fixed_point_supported_p ()
-+ {
-+ if (AVR_TINY)
-+ return false;
-+
-+ return default_fixed_point_supported_p ();
-+ }
-+
-+
- struct gcc_target targetm = TARGET_INITIALIZER;
- \f
- static void
-diff -Naurp gcc/config/fixed-bit.c gcc/config/fixed-bit.c
---- gcc/config/fixed-bit.c 2011-10-27 17:57:06.000000000 +0530
-+++ gcc/config/fixed-bit.c 2011-10-27 18:05:35.000000000 +0530
-@@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTI
- Floating-point: SF, DF
- Ex: If we define FROM_QQ and TO_SI, the conversion from QQ to SI is
- generated. */
--
-+#if !defined (__AVR_TINY__)
- #include "tconfig.h"
- #include "tsystem.h"
- #include "coretypes.h"
-@@ -1213,4 +1213,4 @@ SATFRACT (FROM_FLOAT_C_TYPE a)
- return c;
- }
- #endif /* defined(SATFRACT) && FROM_TYPE == 3 && TO_TYPE == 4 */
--
-+#endif /* __AVR_TINY__ */
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-27 18:05:35.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-27 18:10:00.000000000 +0530
-@@ -255,6 +255,8 @@ static const struct default_options avr_
- #undef TARGET_EXPAND_BUILTIN
- #define TARGET_EXPAND_BUILTIN avr_expand_builtin
-
-+#undef TARGET_HELP
-+#define TARGET_HELP avr_target_help
-
- /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
- static bool
-@@ -276,7 +278,24 @@ static const struct default_options avr_
- return default_fixed_point_supported_p ();
- }
-
--
-+/* Implement TARGET_HELP. */
-+void
-+avr_target_help (void)
-+{
-+ if (avr_list_supported_parts)
-+ {
-+ const struct mcu_type_s *list_part;
-+ fprintf (stdout, "List of parts supported by avr-gcc:\n");
-+ for (list_part = &avr_mcu_types[0]; (list_part + 1)->name; list_part++)
-+ {
-+ if (!list_part->macro)
-+ list_part++;
-+ fprintf (stdout, "%-20s%s\n", list_part->name, list_part->macro);
-+ }
-+ fprintf (stdout, "\n");
-+ }
-+}
-+
- struct gcc_target targetm = TARGET_INITIALIZER;
- \f
- static void
-diff -Naurp gcc/config/avr/avr.opt gcc/config/avr/avr.opt
---- gcc/config/avr/avr.opt 2011-10-27 18:05:13.000000000 +0530
-+++ gcc/config/avr/avr.opt 2011-10-27 18:10:00.000000000 +0530
-@@ -58,3 +58,8 @@ Relax branches
- mpmem-wrap-around
- Target Report
- Make the linker relaxation machine assume that a program counter wrap-around occurs.
-+
-+mlist-devices
-+Target RejectNegative Var(avr_list_supported_parts)
-+Print the list of parts supported while printing --target-help
-+
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
---- gcc/config/avr/avr-c.c 2012-05-30 14:46:12.000000000 +0530
-+++ gcc/config/avr/avr-c.c 2012-06-06 13:00:15.000000000 +0530
-@@ -95,8 +95,22 @@ avr_cpu_cpp_builtins (struct cpp_reader
- }
-
- if (avr_current_arch->avrtiny)
-- {
-+ {
- cpp_define (pfile, "__AVR_TINY__");
-- }
-+
-+ /*
-+ Define macro "__AVR_TINY_PM_BASE_ADDRESS__" with mapped program memory
-+ start address. This macro shall be referred where mapped program memory
-+ is accessed. (Eg. copying data section (do_copy_data) contents to data
-+ memory region.
-+ NOTE:
-+ Program memory of AVR_TINY devices can not be accessed directly, it has
-+ been mapped to the data memory. For AVR_TINY devices (ATtiny4/ 5/ 9/ 10/
-+ 20 and 40) mapped program memory starts at 0x4000.
-+ */
-+ cpp_define (pfile, "__AVR_TINY_PM_BASE_ADDRESS__=0x4000");
-+ }
-+
-+
- }
-
+++ /dev/null
-diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
---- gcc/config/avr/libgcc.S 2012-05-29 16:32:53.000000000 +0530
-+++ gcc/config/avr/libgcc.S 2012-06-04 18:31:55.000000000 +0530
-@@ -782,7 +782,26 @@ __tablejump__:
- #endif /* defined (L_tablejump) */
- #endif
-
--#if !defined(__AVR_TINY__)
-+#if defined(__AVR_TINY__)
-+#ifdef L_copy_data
-+ .section .init4,"ax",@progbits
-+ .global __do_copy_data
-+__do_copy_data:
-+ ldi r18, hi8(__data_end)
-+ ldi r26, lo8(__data_start)
-+ ldi r27, hi8(__data_start)
-+ ldi r30, lo8(__data_load_start + __AVR_TINY_PM_BASE_ADDRESS__)
-+ ldi r31, hi8(__data_load_start + __AVR_TINY_PM_BASE_ADDRESS__)
-+ rjmp .L__do_copy_data_start
-+.L__do_copy_data_loop:
-+ ld r19, z+
-+ st X+, r19
-+.L__do_copy_data_start:
-+ cpi r26, lo8(__data_end)
-+ cpc r27, r18
-+ brne .L__do_copy_data_loop
-+#endif
-+#else
- #ifdef L_copy_data
- .section .init4,"ax",@progbits
- .global __do_copy_data
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-06-24 10:30:09.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-06-24 10:29:33.000000000 +0530
-@@ -134,6 +134,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0x0100, "90pwm81" },
- /* Enhanced, > 8K, <= 64K. */
- { "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
-+ { "at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 1, 0x0100, "90pwm161" },
-+
- { "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
- { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
- { "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
-@@ -151,6 +153,11 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
- { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
- { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0x0100, "m169pa" },
-+ { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
-+ { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
-+ { "atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 1, 0x0100, "m16hvbrevb" },
-+ { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
-+ { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
- { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
- { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
- { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0100, "m324a" },
-@@ -171,6 +178,10 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
- { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
- { "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
-+ { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
-+ { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
-+ { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
-+ { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
- { "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
- { "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
- { "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
-@@ -188,11 +199,14 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0x0100, "m649a" },
- { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0x0100, "m649p" },
- { "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" },
-- { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
-- { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
-- { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
-- { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
-+ { "atmega6490a", ARCH_AVR5, "__AVR_ATmega6490A__", 0, 0x0100, "m6490a" },
-+ { "atmega6490p", ARCH_AVR5, "__AVR_ATmega6490P__", 0, 0x0100, "m6490p" },
-+ { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__", 0, 0x0100, "m64c1" },
-+ { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0x0100, "m64m1" },
- { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
-+ { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
-+ { "atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 1, 0x0100, "m32hvbrevb" },
-+ { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
- { "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
- { "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
- { "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
-@@ -246,11 +260,13 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
- { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
- { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
-+ { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
- { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
- { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
- { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
- { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
-+ { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
- { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
- /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
- { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-06-24 10:30:09.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-06-24 10:29:06.000000000 +0530
-@@ -129,6 +129,7 @@ MULTILIB_MATCHES = \
- mmcu?avr25=mmcu?attiny85 \
- mmcu?avr25=mmcu?attiny261 \
- mmcu?avr25=mmcu?attiny261a \
-+ mmcu?avr25=mmcu?attiny4313 \
- mmcu?avr25=mmcu?attiny461 \
- mmcu?avr25=mmcu?attiny461a \
- mmcu?avr25=mmcu?attiny861 \
-@@ -148,6 +149,7 @@ MULTILIB_MATCHES = \
- mmcu?avr35=mmcu?atmega16u2 \
- mmcu?avr35=mmcu?atmega32u2 \
- mmcu?avr35=mmcu?attiny167 \
-+ mmcu?avr35=mmcu?attiny327 \
- mmcu?avr4=mmcu?atmega48 \
- mmcu?avr4=mmcu?atmega48a \
- mmcu?avr4=mmcu?atmega48p \
-@@ -165,6 +167,7 @@ MULTILIB_MATCHES = \
- mmcu?avr4=mmcu?at90pwm3 \
- mmcu?avr4=mmcu?at90pwm3b \
- mmcu?avr4=mmcu?at90pwm81 \
-+ mmcu?avr5=mmcu?at90pwm161 \
- mmcu?avr5=mmcu?atmega16 \
- mmcu?avr5=mmcu?atmega16a \
- mmcu?avr5=mmcu?atmega161 \
-@@ -224,7 +227,9 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega16hva \
- mmcu?avr5=mmcu?atmega16hva2 \
- mmcu?avr5=mmcu?atmega16hvb \
-+ mmcu?avr5=mmcu?atmega16hvbrevb \
- mmcu?avr5=mmcu?atmega32hvb \
-+ mmcu?avr5=mmcu?atmega32hvbrevb \
- mmcu?avr5=mmcu?atmega64hve \
- mmcu?avr5=mmcu?at90can32 \
- mmcu?avr5=mmcu?at90can64 \
-@@ -238,6 +243,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega16u4 \
- mmcu?avr5=mmcu?atmega32u4 \
- mmcu?avr5=mmcu?atmega32u6 \
-+ mmcu?avr5=mmcu?atmega64hve \
- mmcu?avr5=mmcu?at90scr100 \
- mmcu?avr5=mmcu?at90usb646 \
- mmcu?avr5=mmcu?at90usb647 \
-@@ -263,11 +269,13 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega5=mmcu?atxmega64a1 \
- mmcu?avrxmega5=mmcu?atxmega64a1u \
- mmcu?avrxmega6=mmcu?atxmega128a3 \
-+ mmcu?avrxmega6=mmcu?atxmega128b1 \
- mmcu?avrxmega6=mmcu?atxmega128d3 \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
- mmcu?avrxmega6=mmcu?atxmega192d3 \
- mmcu?avrxmega6=mmcu?atxmega256a3 \
- mmcu?avrxmega6=mmcu?atxmega256a3b \
-+ mmcu?avrxmega6=mmcu?atxmega256a3bu \
- mmcu?avrxmega6=mmcu?atxmega256d3 \
- mmcu?avrxmega7=mmcu?atxmega128a1 \
- mmcu?avrxmega7=mmcu?atxmega128a1u \
--- /dev/null
+diff -Naurp gcc/config/avr/avr-mcus.def gcc/config/avr/avr-mcus.def
+--- gcc/config/avr/avr-mcus.def 2012-12-21 16:12:57.000000000 +0530
++++ gcc/config/avr/avr-mcus.def 2012-12-21 16:12:12.000000000 +0530
+@@ -32,7 +32,7 @@
+
+ /* "avr2" must be first for the "0" default to work as intended. */
+
+-/* Classic, <= 8K. */
++/* Classic, <= 8K, 2-byte PC. */
+ AVR_MCU ("avr2", ARCH_AVR2, NULL, 0, 1, 0x0060, 6, "s8515")
+ AVR_MCU ("at90s2313", ARCH_AVR2, "__AVR_AT90S2313__", 1, 0, 0x0060, 1, "s2313")
+ AVR_MCU ("at90s2323", ARCH_AVR2, "__AVR_AT90S2323__", 1, 0, 0x0060, 1, "s2323")
+@@ -46,8 +46,9 @@ AVR_MCU ("at90s4434", ARCH_AV
+ AVR_MCU ("at90s8515", ARCH_AVR2, "__AVR_AT90S8515__", 0, 1, 0x0060, 1, "s8515")
+ AVR_MCU ("at90c8534", ARCH_AVR2, "__AVR_AT90C8534__", 0, 0, 0x0060, 1, "c8534")
+ AVR_MCU ("at90s8535", ARCH_AVR2, "__AVR_AT90S8535__", 0, 0, 0x0060, 1, "s8535")
+-/* Classic + MOVW, <= 8K. */
++/* Classic + MOVW/LPMX, <= 8K + 2-byte PC. */
+ AVR_MCU ("avr25", ARCH_AVR25, NULL, 0, 0, 0x0060, 1, "tn85")
++AVR_MCU ("ata5272", ARCH_AVR25, "__AVR_ATA5272__", 0, 0, 0x0100, 1, "a5272")
+ AVR_MCU ("attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0, 0x0060, 1, "tn13")
+ AVR_MCU ("attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0, 0x0060, 1, "tn13a")
+ AVR_MCU ("attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0, 0x0060, 1, "tn2313")
+@@ -72,30 +73,37 @@ AVR_MCU ("attiny43u", ARCH_AV
+ AVR_MCU ("attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0, 0x0100, 1, "tn87")
+ AVR_MCU ("attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0, 0x0100, 1, "tn48")
+ AVR_MCU ("attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0, 0x0100, 1, "tn88")
++AVR_MCU ("attiny828", ARCH_AVR25, "__AVR_ATtiny828__", 0, 0, 0x0100, 1, "tn828")
+ AVR_MCU ("at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 0, 0, 0x0060, 1, "86401")
+-/* Classic, > 8K, <= 64K. */
++/* Classic, > 8K, <= 64K + 2-byte PC + { JMP/CALL }. */
+ AVR_MCU ("avr3", ARCH_AVR3, NULL, 0, 0, 0x0060, 1, "43355")
+ AVR_MCU ("at43usb355", ARCH_AVR3, "__AVR_AT43USB355__", 0, 0, 0x0060, 1, "43355")
+ AVR_MCU ("at76c711", ARCH_AVR3, "__AVR_AT76C711__", 0, 0, 0x0060, 1, "76711")
+-/* Classic, == 128K. */
++/* Classic, == 128K + 2-byte PC + {JMP/CALL, ELPM }. */
+ AVR_MCU ("avr31", ARCH_AVR31, NULL, 0, 1, 0x0060, 2, "m103")
+ AVR_MCU ("atmega103", ARCH_AVR31, "__AVR_ATmega103__", 0, 1, 0x0060, 2, "m103")
+ AVR_MCU ("at43usb320", ARCH_AVR31, "__AVR_AT43USB320__", 0, 0, 0x0060, 2, "43320")
+-/* Classic + MOVW + JMP/CALL. */
++/* Classic, >=16K, <=64K + 2-byte PC + MOVW/LPMX + JMP/CALL. */
+ AVR_MCU ("avr35", ARCH_AVR35, NULL, 0, 0, 0x0100, 1, "usb162")
++AVR_MCU ("ata5505", ARCH_AVR35, "__AVR_ATA5505__", 0, 0, 0x0100, 1, "a5505")
+ AVR_MCU ("at90usb82", ARCH_AVR35, "__AVR_AT90USB82__", 0, 0, 0x0100, 1, "usb82")
+ AVR_MCU ("at90usb162", ARCH_AVR35, "__AVR_AT90USB162__", 0, 0, 0x0100, 1, "usb162")
+ AVR_MCU ("atmega8u2", ARCH_AVR35, "__AVR_ATmega8U2__", 0, 0, 0x0100, 1, "m8u2")
+ AVR_MCU ("atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0, 0x0100, 1, "m16u2")
+ AVR_MCU ("atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0, 0x0100, 1, "m32u2")
+ AVR_MCU ("attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0, 0x0100, 1, "tn167")
+-/* Enhanced, <= 8K. */
++AVR_MCU ("attiny1634", ARCH_AVR35, "__AVR_ATtiny1634__", 0, 0, 0x0100, 1, "tn1634")
++/* Enhanced, <= 8K + 2-byte PC + { MOVW/LPMX, MUL }. */
+ AVR_MCU ("avr4", ARCH_AVR4, NULL, 0, 0, 0x0060, 1, "m8")
+ AVR_MCU ("ata6289", ARCH_AVR4, "__AVR_ATA6289__", 0, 0, 0x0100, 1, "a6289")
++AVR_MCU ("ata6285", ARCH_AVR4, "__AVR_ATA6285__", 0, 0, 0x0100, 1, "a6285")
++AVR_MCU ("ata6286", ARCH_AVR4, "__AVR_ATA6286__", 0, 0, 0x0100, 1, "a6286")
+ AVR_MCU ("atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0, 0x0060, 1, "m8")
++AVR_MCU ("atmega8a", ARCH_AVR4, "__AVR_ATmega8A__", 0, 0, 0x0060, 1, "m8a")
+ AVR_MCU ("atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0, 0x0100, 1, "m48")
+ AVR_MCU ("atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0, 0x0100, 1, "m48a")
+ AVR_MCU ("atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0, 0x0100, 1, "m48p")
++AVR_MCU ("atmega48pa", ARCH_AVR4, "__AVR_ATmega48PA__", 0, 0, 0x0100, 1, "m48pa")
+ AVR_MCU ("atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0, 0x0100, 1, "m88")
+ AVR_MCU ("atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0, 0x0100, 1, "m88a")
+ AVR_MCU ("atmega88p", ARCH_AVR4, "__AVR_ATmega88P__", 0, 0, 0x0100, 1, "m88p")
+@@ -109,8 +117,10 @@ AVR_MCU ("at90pwm2b", ARCH_AV
+ AVR_MCU ("at90pwm3", ARCH_AVR4, "__AVR_AT90PWM3__", 0, 0, 0x0100, 1, "90pwm3")
+ AVR_MCU ("at90pwm3b", ARCH_AVR4, "__AVR_AT90PWM3B__", 0, 0, 0x0100, 1, "90pwm3b")
+ AVR_MCU ("at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0, 0x0100, 1, "90pwm81")
+-/* Enhanced, > 8K, <= 64K. */
++/* Enhanced, > 8K, <= 64K + 2-byte PC + { MOVW/LPMX, JMP/CALL, MUL }. */
+ AVR_MCU ("avr5", ARCH_AVR5, NULL, 0, 0, 0x0060, 1, "m16")
++AVR_MCU ("ata5790", ARCH_AVR5, "__AVR_ATA5790__", 0, 0, 0x0100, 1, "a5790")
++AVR_MCU ("ata5795", ARCH_AVR5, "__AVR_ATA5795__", 0, 0, 0x0100, 1, "a5795")
+ AVR_MCU ("atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0, 0x0060, 1, "m16")
+ AVR_MCU ("atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0, 0x0060, 1, "m16a")
+ AVR_MCU ("atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0, 0x0060, 1, "m161")
+@@ -118,17 +128,21 @@ AVR_MCU ("atmega162", ARCH_AV
+ AVR_MCU ("atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0, 0x0060, 1, "m163")
+ AVR_MCU ("atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0, 0x0100, 1, "m164a")
+ AVR_MCU ("atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0, 0x0100, 1, "m164p")
++AVR_MCU ("atmega164pa", ARCH_AVR5, "__AVR_ATmega164PA__", 0, 0, 0x0100, 1, "m164pa")
+ AVR_MCU ("atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0, 0x0100, 1, "m165")
+ AVR_MCU ("atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0, 0x0100, 1, "m165a")
+ AVR_MCU ("atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0, 0x0100, 1, "m165p")
++AVR_MCU ("atmega165pa", ARCH_AVR5, "__AVR_ATmega165PA__", 0, 0, 0x0100, 1, "m165pa")
+ AVR_MCU ("atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0, 0x0100, 1, "m168")
+ AVR_MCU ("atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0, 0x0100, 1, "m168a")
+ AVR_MCU ("atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0, 0x0100, 1, "m168p")
++AVR_MCU ("atmega168pa", ARCH_AVR5, "__AVR_ATmega168PA__", 0, 0, 0x0100, 1, "m168pa")
+ AVR_MCU ("atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0, 0x0100, 1, "m169")
+ AVR_MCU ("atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0, 0x0100, 1, "m169a")
+ AVR_MCU ("atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0, 0x0100, 1, "m169p")
+ AVR_MCU ("atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0, 0x0100, 1, "m169pa")
+ AVR_MCU ("atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0, 0x0060, 1, "m32")
++AVR_MCU ("atmega32a", ARCH_AVR5, "__AVR_ATmega32A__", 0, 0, 0x0060, 1, "m32a")
+ AVR_MCU ("atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0, 0x0060, 1, "m323")
+ AVR_MCU ("atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0, 0x0100, 1, "m324a")
+ AVR_MCU ("atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0, 0x0100, 1, "m324p")
+@@ -136,9 +150,11 @@ AVR_MCU ("atmega324pa", ARCH_AV
+ AVR_MCU ("atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0, 0x0100, 1, "m325")
+ AVR_MCU ("atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0, 0x0100, 1, "m325a")
+ AVR_MCU ("atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0, 0x0100, 1, "m325p")
++AVR_MCU ("atmega325pa", ARCH_AVR5, "__AVR_ATmega325PA__", 0, 0, 0x0100, 1, "m325pa")
+ AVR_MCU ("atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0, 0x0100, 1, "m3250")
+ AVR_MCU ("atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0, 0x0100, 1, "m3250a")
+ AVR_MCU ("atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0, 0x0100, 1, "m3250p")
++AVR_MCU ("atmega3250pa", ARCH_AVR5, "__AVR_ATmega3250PA__", 0, 0, 0x0100, 1, "m3250pa")
+ AVR_MCU ("atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0, 0x0100, 1, "m328")
+ AVR_MCU ("atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0, 0x0100, 1, "m328p")
+ AVR_MCU ("atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0, 0x0100, 1, "m329")
+@@ -148,8 +164,10 @@ AVR_MCU ("atmega329pa", ARCH_AV
+ AVR_MCU ("atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0, 0x0100, 1, "m3290")
+ AVR_MCU ("atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0, 0x0100, 1, "m3290a")
+ AVR_MCU ("atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0, 0x0100, 1, "m3290p")
++AVR_MCU ("atmega3290pa", ARCH_AVR5, "__AVR_ATmega3290PA__", 0, 0, 0x0100, 1, "m3290pa")
+ AVR_MCU ("atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0, 0x0100, 1, "m406")
+ AVR_MCU ("atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0, 0x0100, 1, "m64")
++AVR_MCU ("atmega64a", ARCH_AVR5, "__AVR_ATmega64A__", 0, 0, 0x0100, 1, "m64a")
+ AVR_MCU ("atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0, 0x0200, 1, "m640")
+ AVR_MCU ("atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0, 0x0100, 1, "m644")
+ AVR_MCU ("atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0, 0x0100, 1, "m644a")
+@@ -165,13 +183,18 @@ AVR_MCU ("atmega649", ARCH_AV
+ AVR_MCU ("atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0, 0x0100, 1, "m649a")
+ AVR_MCU ("atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0, 0x0100, 1, "m649p")
+ AVR_MCU ("atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0, 0x0100, 1, "m6490")
++AVR_MCU ("atmega6490a", ARCH_AVR5, "__AVR_ATmega6490A__", 0, 0, 0x0100, 1, "m6490a")
++AVR_MCU ("atmega6490p", ARCH_AVR5, "__AVR_ATmega6490P__", 0, 0, 0x0100, 1, "m6490p")
+ AVR_MCU ("atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0, 0x0100, 1, "m16hva")
+ AVR_MCU ("atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0, 0x0100, 1, "m16hva2")
+ AVR_MCU ("atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0, 0x0100, 1, "m16hvb")
++AVR_MCU ("atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 0, 0, 0x0100, 1, "m16hvbrevb")
+ AVR_MCU ("atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0, 0x0100, 1, "m32hvb")
++AVR_MCU ("atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 0, 0, 0x0100, 1, "m32hvbrevb")
+ AVR_MCU ("atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0, 0x0100, 1, "m64hve")
+ AVR_MCU ("at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0, 0x0100, 1, "can32")
+ AVR_MCU ("at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0, 0x0100, 1, "can64")
++AVR_MCU ("at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 0, 0, 0x0100, 1, "90pwm161")
+ AVR_MCU ("at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0, 0x0100, 1, "90pwm216")
+ AVR_MCU ("at90pwm316", ARCH_AVR5, "__AVR_AT90PWM316__", 0, 0, 0x0100, 1, "90pwm316")
+ AVR_MCU ("atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0, 0x0100, 1, "m32c1")
+@@ -187,50 +210,76 @@ AVR_MCU ("at90usb646", ARCH_AV
+ AVR_MCU ("at90usb647", ARCH_AVR5, "__AVR_AT90USB647__", 0, 0, 0x0100, 1, "usb647")
+ AVR_MCU ("at94k", ARCH_AVR5, "__AVR_AT94K__", 0, 0, 0x0060, 1, "at94k")
+ AVR_MCU ("m3000", ARCH_AVR5, "__AVR_M3000__", 0, 0, 0x1000, 1, "m3000")
+-/* Enhanced, == 128K. */
++/* Enhanced, == 128K + 2-byte PC + { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
+ AVR_MCU ("avr51", ARCH_AVR51, NULL, 0, 0, 0x0100, 2, "m128")
+ AVR_MCU ("atmega128", ARCH_AVR51, "__AVR_ATmega128__", 0, 0, 0x0100, 2, "m128")
++AVR_MCU ("atmega128a", ARCH_AVR51, "__AVR_ATmega128A__", 0, 0, 0x0100, 2, "m128a")
+ AVR_MCU ("atmega1280", ARCH_AVR51, "__AVR_ATmega1280__", 0, 0, 0x0200, 2, "m1280")
+ AVR_MCU ("atmega1281", ARCH_AVR51, "__AVR_ATmega1281__", 0, 0, 0x0200, 2, "m1281")
++AVR_MCU ("atmega1284", ARCH_AVR51, "__AVR_ATmega1284__", 0, 0, 0x0100, 2, "m1284")
+ AVR_MCU ("atmega1284p", ARCH_AVR51, "__AVR_ATmega1284P__", 0, 0, 0x0100, 2, "m1284p")
+ AVR_MCU ("atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__", 0, 0, 0x0200, 2, "m128rfa1")
+ AVR_MCU ("at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0, 0x0100, 2, "can128")
+ AVR_MCU ("at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0, 0x0100, 2, "usb1286")
+ AVR_MCU ("at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0, 0x0100, 2, "usb1287")
+-/* 3-Byte PC. */
++/* Enhanced, == 256K + 3-Byte PC + { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
+ AVR_MCU ("avr6", ARCH_AVR6, NULL, 0, 0, 0x0200, 4, "m2561")
+ AVR_MCU ("atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0, 0x0200, 4, "m2560")
+ AVR_MCU ("atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0, 0x0200, 4, "m2561")
+ /* Xmega, 16K <= Flash < 64K, RAM <= 64K */
+ AVR_MCU ("avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0, 0x2000, 1, "x32a4")
++AVR_MCU ("atxmega8e5", ARCH_AVRXMEGA2, "__AVR_ATxmega8E5__", 0, 0, 0x2000, 1, "x8e5")
+ AVR_MCU ("atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0, 0x2000, 1, "x16a4")
++AVR_MCU ("atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0, 0x2000, 1, "x16a4u")
++AVR_MCU ("atxmega16c4", ARCH_AVRXMEGA2, "__AVR_ATxmega16C4__", 0, 0, 0x2000, 1, "x16c4")
+ AVR_MCU ("atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0, 0x2000, 1, "x16d4")
++AVR_MCU ("atxmega16e5", ARCH_AVRXMEGA2, "__AVR_ATxmega16E5__", 0, 0, 0x2000, 1, "x16e5")
+ AVR_MCU ("atxmega16x1", ARCH_AVRXMEGA2, "__AVR_ATxmega16X1__", 0, 0, 0x2000, 1, "x16x1")
+ AVR_MCU ("atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0, 0x2000, 1, "x32a4")
++AVR_MCU ("atxmega32a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4U__", 0, 0, 0x2000, 1, "x32a4u")
++AVR_MCU ("atxmega32c4", ARCH_AVRXMEGA2, "__AVR_ATxmega32C4__", 0, 0, 0x2000, 1, "x32c4")
+ AVR_MCU ("atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0, 0x2000, 1, "x32d4")
++AVR_MCU ("atxmega32e5", ARCH_AVRXMEGA2, "__AVR_ATxmega32E5__", 0, 0, 0x2000, 1, "x32e5")
+ AVR_MCU ("atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0, 0x2000, 1, "x32x1")
+ /* Xmega, 64K < Flash <= 128K, RAM <= 64K */
+ AVR_MCU ("avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0, 0x2000, 2, "x64a4")
+ AVR_MCU ("atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0, 0x2000, 2, "x64a3")
++AVR_MCU ("atxmega64a3u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3U__", 0, 0, 0x2000, 2, "x64a3u")
++AVR_MCU ("atxmega64a4u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A4U__", 0, 0, 0x2000, 2, "x64a4u")
++AVR_MCU ("atxmega64b1", ARCH_AVRXMEGA4, "__AVR_ATxmega64B1__", 0, 0, 0x2000, 2, "x64b1")
++AVR_MCU ("atxmega64b3", ARCH_AVRXMEGA4, "__AVR_ATxmega64B3__", 0, 0, 0x2000, 2, "x64b3")
++AVR_MCU ("atxmega64c3", ARCH_AVRXMEGA4, "__AVR_ATxmega64C3__", 0, 0, 0x2000, 2, "x64c3")
+ AVR_MCU ("atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0, 0x2000, 2, "x64d3")
++AVR_MCU ("atxmega64d4", ARCH_AVRXMEGA4, "__AVR_ATxmega64D4__", 0, 0, 0x2000, 2, "x64d4")
+ /* Xmega, 64K < Flash <= 128K, RAM > 64K */
+ AVR_MCU ("avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0, 0x2000, 2, "x64a1")
+ AVR_MCU ("atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0, 0x2000, 2, "x64a1")
+ AVR_MCU ("atxmega64a1u", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1U__", 0, 0, 0x2000, 2, "x64a1u")
+ /* Xmega, 128K < Flash, RAM <= 64K */
+-AVR_MCU ("avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0, 0x2000, 5, "x128a3")
++AVR_MCU ("avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0, 0x2000, 7, "x128a3")
+ AVR_MCU ("atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0, 0x2000, 3, "x128a3")
++AVR_MCU ("atxmega128a3u", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3U__", 0, 0, 0x2000, 3, "x128a3u")
++AVR_MCU ("atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0, 0x2000, 3, "x128b1")
++AVR_MCU ("atxmega128b3", ARCH_AVRXMEGA6, "__AVR_ATxmega128B3__", 0, 0, 0x2000, 3, "x128b3")
+ AVR_MCU ("atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0, 0x2000, 3, "x128d3")
++AVR_MCU ("atxmega128d4", ARCH_AVRXMEGA6, "__AVR_ATxmega128D4__", 0, 0, 0x2000, 3, "x128d4")
+ AVR_MCU ("atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0, 0x2000, 4, "x192a3")
++AVR_MCU ("atxmega192a3u", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0, 0x2000, 4, "x192a3u")
++AVR_MCU ("atxmega192c3", ARCH_AVRXMEGA6, "__AVR_ATxmega192C3__", 0, 0, 0x2000, 4, "x192c3")
+ AVR_MCU ("atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0, 0x2000, 4, "x192d3")
+ AVR_MCU ("atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0, 0x2000, 5, "x256a3")
+ AVR_MCU ("atxmega256a3b", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0, 0x2000, 5, "x256a3b")
+ AVR_MCU ("atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0, 0x2000, 5, "x256a3bu")
++AVR_MCU ("atxmega256c3", ARCH_AVRXMEGA6, "__AVR_ATxmega256C3__", 0, 0, 0x2000, 5, "x256c3")
++AVR_MCU ("atxmega256a3u", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3U__", 0, 0, 0x2000, 5, "x256a3u")
+ AVR_MCU ("atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0, 0x2000, 5, "x256d3")
+-/* Xmega, 128K < Flash, RAM > 64K RAM. */
++AVR_MCU ("atxmega384c3", ARCH_AVRXMEGA6, "__AVR_ATxmega384C3__", 0, 0, 0x2000, 7, "x384c3")
++AVR_MCU ("atxmega384d3", ARCH_AVRXMEGA6, "__AVR_ATxmega384D3__", 0, 0, 0x2000, 7, "x384d3")
++/* Xmega, >= 128K, <= 256K FLASH, > 64K RAM. */
+ AVR_MCU ("avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0, 0x2000, 3, "x128a1")
+ AVR_MCU ("atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0, 0x2000, 3, "x128a1")
+ AVR_MCU ("atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0, 0x2000, 3, "x128a1u")
++AVR_MCU ("atxmega128a4u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A4U__", 0, 0, 0x2000, 3, "x128a4u")
+ /* Tiny family */
+ AVR_MCU ("avrtiny", ARCH_AVRTINY, NULL, 0, 0, 0x0040, 1, "tn10")
+ AVR_MCU ("attiny4", ARCH_AVRTINY, "__AVR_ATtiny4__", 0, 0, 0x0040, 1, "tn4")
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-06-24 10:34:16.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-06-24 10:33:44.000000000 +0530
-@@ -166,9 +166,11 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
- { "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
- { "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
-+ { "atmega325pa", ARCH_AVR5, "__AVR_ATmega325PA__", 0, 0x0100, "m325pa" },
- { "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
- { "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
- { "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
-+ { "atmega3250pa", ARCH_AVR5, "__AVR_ATmega3250PA__", 0, 0x0100, "m3250pa" },
- { "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
- { "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
- { "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
-@@ -178,6 +180,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
- { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
- { "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
-+ { "atmega3290pa", ARCH_AVR5, "__AVR_ATmega3290PA__", 0, 0x0100, "m3290pa" },
- { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
- { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
- { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-06-24 10:34:16.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-06-24 10:33:44.000000000 +0530
-@@ -193,9 +193,11 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega325 \
- mmcu?avr5=mmcu?atmega325a \
- mmcu?avr5=mmcu?atmega325p \
-+ mmcu?avr5=mmcu?atmega325pa \
- mmcu?avr5=mmcu?atmega3250 \
- mmcu?avr5=mmcu?atmega3250a \
- mmcu?avr5=mmcu?atmega3250p \
-+ mmcu?avr5=mmcu?atmega3250pa \
- mmcu?avr5=mmcu?atmega328 \
- mmcu?avr5=mmcu?atmega328p \
- mmcu?avr5=mmcu?atmega329 \
-@@ -205,6 +207,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega3290 \
- mmcu?avr5=mmcu?atmega3290a \
- mmcu?avr5=mmcu?atmega3290p \
-+ mmcu?avr5=mmcu?atmega3290pa \
- mmcu?avr5=mmcu?atmega406 \
- mmcu?avr5=mmcu?atmega64 \
- mmcu?avr5=mmcu?atmega640 \
--- /dev/null
+diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
+--- gcc/config/avr/avr-devices.c 2013-01-28 12:48:37.000000000 +0530
++++ gcc/config/avr/avr-devices.c 2013-01-28 15:22:00.000000000 +0530
+@@ -47,6 +47,7 @@ avr_arch_types[] =
+ { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "5", "avr5" },
+ { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, 32, "51", "avr51" },
+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 32, "6", "avr6" },
++ { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0200, 32, "7", "avr7" },
+
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, 0, "100", "avrtiny" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0, "102", "avrxmega2" },
+diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
+--- gcc/config/avr/avr.h 2013-01-28 12:48:37.000000000 +0530
++++ gcc/config/avr/avr.h 2013-01-28 15:22:00.000000000 +0530
+@@ -86,6 +86,7 @@ enum avr_arch
+ ARCH_AVR5,
+ ARCH_AVR51,
+ ARCH_AVR6,
++ ARCH_AVR7,
+ ARCH_AVRTINY,
+ ARCH_AVRXMEGA2,
+ ARCH_AVRXMEGA4,
+diff -Naurp gcc/config/avr/avr-mcus.def gcc/config/avr/avr-mcus.def
+--- gcc/config/avr/avr-mcus.def 2013-01-28 12:48:37.000000000 +0530
++++ gcc/config/avr/avr-mcus.def 2013-01-28 15:22:00.000000000 +0530
+@@ -65,6 +65,7 @@ AVR_MCU ("attiny45", ARCH_AV
+ AVR_MCU ("attiny85", ARCH_AVR25, "__AVR_ATtiny85__", 0, 0, 0x0060, 1, "tn85")
+ AVR_MCU ("attiny261", ARCH_AVR25, "__AVR_ATtiny261__", 1, 0, 0x0060, 1, "tn261")
+ AVR_MCU ("attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__", 1, 0, 0x0060, 1, "tn261a")
++AVR_MCU ("attiny474", ARCH_AVR25, "__AVR_ATtiny474__", 0, 0, 0x0100, 1, "tn474")
+ AVR_MCU ("attiny461", ARCH_AVR25, "__AVR_ATtiny461__", 0, 0, 0x0060, 1, "tn461")
+ AVR_MCU ("attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__", 0, 0, 0x0060, 1, "tn461a")
+ AVR_MCU ("attiny861", ARCH_AVR25, "__AVR_ATtiny861__", 0, 0, 0x0060, 1, "tn861")
+@@ -74,6 +75,7 @@ AVR_MCU ("attiny87", ARCH_AV
+ AVR_MCU ("attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0, 0x0100, 1, "tn48")
+ AVR_MCU ("attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0, 0x0100, 1, "tn88")
+ AVR_MCU ("attiny828", ARCH_AVR25, "__AVR_ATtiny828__", 0, 0, 0x0100, 1, "tn828")
++AVR_MCU ("attiny841", ARCH_AVR25, "__AVR_ATtiny841__", 0, 0, 0x0100, 1, "tn841")
+ AVR_MCU ("at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 0, 0, 0x0060, 1, "86401")
+ /* Classic, > 8K, <= 64K + 2-byte PC + { JMP/CALL }. */
+ AVR_MCU ("avr3", ARCH_AVR3, NULL, 0, 0, 0x0060, 1, "43355")
+@@ -120,6 +122,7 @@ AVR_MCU ("at90pwm81", ARCH_AV
+ /* Enhanced, > 8K, <= 64K + 2-byte PC + { MOVW/LPMX, JMP/CALL, MUL }. */
+ AVR_MCU ("avr5", ARCH_AVR5, NULL, 0, 0, 0x0060, 1, "m16")
+ AVR_MCU ("ata5790", ARCH_AVR5, "__AVR_ATA5790__", 0, 0, 0x0100, 1, "a5790")
++AVR_MCU ("ata5790n", ARCH_AVR5, "__AVR_ATA5790N__", 0, 0, 0x0100, 1, "a5790n")
+ AVR_MCU ("ata5795", ARCH_AVR5, "__AVR_ATA5795__", 0, 0, 0x0100, 1, "a5795")
+ AVR_MCU ("atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0, 0x0060, 1, "m16")
+ AVR_MCU ("atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0, 0x0060, 1, "m16a")
+@@ -191,7 +194,11 @@ AVR_MCU ("atmega16hvb", ARCH_AV
+ AVR_MCU ("atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 0, 0, 0x0100, 1, "m16hvbrevb")
+ AVR_MCU ("atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0, 0x0100, 1, "m32hvb")
+ AVR_MCU ("atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 0, 0, 0x0100, 1, "m32hvbrevb")
++AVR_MCU ("atmega48hvf", ARCH_AVR5, "__AVR_ATmega48HVF__", 0, 0, 0x0100, 1, "m48hvf")
+ AVR_MCU ("atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0, 0x0100, 1, "m64hve")
++AVR_MCU ("atmega64hve2", ARCH_AVR5, "__AVR_ATmega64HVE2__", 0, 0, 0x0100, 1, "m64hve2")
++AVR_MCU ("atmega64rfa2", ARCH_AVR5, "__AVR_ATmega64RFA2__", 0, 0, 0x0200, 1, "m64rfa2")
++AVR_MCU ("atmega64rfr2", ARCH_AVR5, "__AVR_ATmega64RFR2__", 0, 0, 0x0200, 1, "m64rfr2")
+ AVR_MCU ("at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0, 0x0100, 1, "can32")
+ AVR_MCU ("at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0, 0x0100, 1, "can64")
+ AVR_MCU ("at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 0, 0, 0x0100, 1, "90pwm161")
+@@ -203,6 +210,7 @@ AVR_MCU ("atmega16m1", ARCH_AV
+ AVR_MCU ("atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0, 0x0100, 1, "m32m1")
+ AVR_MCU ("atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0, 0x0100, 1, "m64m1")
+ AVR_MCU ("atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0, 0x0100, 1, "m16u4")
++AVR_MCU ("atmega26hvg", ARCH_AVR5, "__AVR_ATmega26HVG__", 0, 0, 0x0100, 1, "m26hvg")
+ AVR_MCU ("atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0, 0x0100, 1, "m32u4")
+ AVR_MCU ("atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0, 0x0100, 1, "m32u6")
+ AVR_MCU ("at90scr100", ARCH_AVR5, "__AVR_AT90SCR100__", 0, 0, 0x0100, 1, "90scr100")
+@@ -219,16 +227,27 @@ AVR_MCU ("atmega1281", ARCH_AV
+ AVR_MCU ("atmega1284", ARCH_AVR51, "__AVR_ATmega1284__", 0, 0, 0x0100, 2, "m1284")
+ AVR_MCU ("atmega1284p", ARCH_AVR51, "__AVR_ATmega1284P__", 0, 0, 0x0100, 2, "m1284p")
+ AVR_MCU ("atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__", 0, 0, 0x0200, 2, "m128rfa1")
++AVR_MCU ("atmega128rfa2", ARCH_AVR51, "__AVR_ATmega128RFA2__", 0, 0, 0x0200, 2, "m128rfa2")
++AVR_MCU ("atmega128rfr2", ARCH_AVR51, "__AVR_ATmega128RFR2__", 0, 0, 0x0200, 2, "m128rfr2")
+ AVR_MCU ("at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0, 0x0100, 2, "can128")
+ AVR_MCU ("at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0, 0x0100, 2, "usb1286")
+ AVR_MCU ("at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0, 0x0100, 2, "usb1287")
+-/* Enhanced, == 256K + 3-Byte PC + { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
++/* Enhanced, == 256K + 3-Byte PC + { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX, EIJMP/EICALL }. */
+ AVR_MCU ("avr6", ARCH_AVR6, NULL, 0, 0, 0x0200, 4, "m2561")
+ AVR_MCU ("atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0, 0x0200, 4, "m2560")
+ AVR_MCU ("atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0, 0x0200, 4, "m2561")
++AVR_MCU ("atmega256rfa2", ARCH_AVR6, "__AVR_ATmega256RFA2__", 0, 0, 0x0200, 4, "m256rfa2")
++AVR_MCU ("atmega256rfr2", ARCH_AVR6, "__AVR_ATmega256RFR2__", 0, 0, 0x0200, 4, "m256rfr2")
++/* Enhanced, == 20K starts at 0x8000 */
++AVR_MCU ("avr7", ARCH_AVR7, NULL, 0, 0, 0x0200, 1, "a5831")
++AVR_MCU ("ata5831", ARCH_AVR7, "__AVR_ATA5831__", 0, 0, 0x0200, 1, "a5831")
+ /* Xmega, 16K <= Flash < 64K, RAM <= 64K */
+ AVR_MCU ("avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0, 0x2000, 1, "x32a4")
+ AVR_MCU ("atxmega8e5", ARCH_AVRXMEGA2, "__AVR_ATxmega8E5__", 0, 0, 0x2000, 1, "x8e5")
++AVR_MCU ("atmxt112sl", ARCH_AVRXMEGA2, "__AVR_ATMXT112SL__", 0, 0, 0x2000, 1, "mxt112sl")
++AVR_MCU ("atmxt224", ARCH_AVRXMEGA2, "__AVR_ATMXT224__", 0, 0, 0x2000, 1, "mxt224")
++AVR_MCU ("atmxt224e", ARCH_AVRXMEGA2, "__AVR_ATMXT224E__", 0, 0, 0x2000, 1, "mxt224e")
++AVR_MCU ("atmxt336s", ARCH_AVRXMEGA2, "__AVR_ATMXT336S__", 0, 0, 0x2000, 1, "mxt336s")
+ AVR_MCU ("atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0, 0x2000, 1, "x16a4")
+ AVR_MCU ("atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0, 0x2000, 1, "x16a4u")
+ AVR_MCU ("atxmega16c4", ARCH_AVRXMEGA2, "__AVR_ATxmega16C4__", 0, 0, 0x2000, 1, "x16c4")
+@@ -261,8 +280,11 @@ AVR_MCU ("atxmega128a3", ARCH_AVRXME
+ AVR_MCU ("atxmega128a3u", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3U__", 0, 0, 0x2000, 3, "x128a3u")
+ AVR_MCU ("atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0, 0x2000, 3, "x128b1")
+ AVR_MCU ("atxmega128b3", ARCH_AVRXMEGA6, "__AVR_ATxmega128B3__", 0, 0, 0x2000, 3, "x128b3")
++AVR_MCU ("atxmega128c3", ARCH_AVRXMEGA6, "__AVR_ATxmega128C3__", 0, 0, 0x2000, 3, "x128c3")
+ AVR_MCU ("atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0, 0x2000, 3, "x128d3")
+ AVR_MCU ("atxmega128d4", ARCH_AVRXMEGA6, "__AVR_ATxmega128D4__", 0, 0, 0x2000, 3, "x128d4")
++AVR_MCU ("atmxt540s", ARCH_AVRXMEGA6, "__AVR_ATMXT540S__", 0, 0, 0x2000, 3, "mxt540s")
++AVR_MCU ("atmxt540sreva", ARCH_AVRXMEGA6, "__AVR_ATMXT540SREVA__", 0, 0, 0x2000, 3, "mxt540sreva")
+ AVR_MCU ("atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0, 0x2000, 4, "x192a3")
+ AVR_MCU ("atxmega192a3u", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0, 0x2000, 4, "x192a3u")
+ AVR_MCU ("atxmega192c3", ARCH_AVRXMEGA6, "__AVR_ATxmega192C3__", 0, 0, 0x2000, 4, "x192c3")
--- /dev/null
+diff -Naurp gcc/config/avr/avr-mcus.def gcc/config/avr/avr-mcus.def
+--- gcc/config/avr/avr-mcus.def 2013-02-07 12:08:53.000000000 +0530
++++ gcc/config/avr/avr-mcus.def 2013-02-07 12:16:18.000000000 +0530
+@@ -199,6 +199,7 @@ AVR_MCU ("atmega64hve", ARCH_AV
+ AVR_MCU ("atmega64hve2", ARCH_AVR5, "__AVR_ATmega64HVE2__", 0, 0, 0x0100, 1, "m64hve2")
+ AVR_MCU ("atmega64rfa2", ARCH_AVR5, "__AVR_ATmega64RFA2__", 0, 0, 0x0200, 1, "m64rfa2")
+ AVR_MCU ("atmega64rfr2", ARCH_AVR5, "__AVR_ATmega64RFR2__", 0, 0, 0x0200, 1, "m64rfr2")
++AVR_MCU ("atmega644rfr2", ARCH_AVR5, "__AVR_ATmega644RFR2__", 0, 0, 0x0200, 1, "m644rfr2")
+ AVR_MCU ("at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0, 0x0100, 1, "can32")
+ AVR_MCU ("at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0, 0x0100, 1, "can64")
+ AVR_MCU ("at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 0, 0, 0x0100, 1, "90pwm161")
+@@ -229,6 +230,7 @@ AVR_MCU ("atmega1284p", ARCH_AV
+ AVR_MCU ("atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__", 0, 0, 0x0200, 2, "m128rfa1")
+ AVR_MCU ("atmega128rfa2", ARCH_AVR51, "__AVR_ATmega128RFA2__", 0, 0, 0x0200, 2, "m128rfa2")
+ AVR_MCU ("atmega128rfr2", ARCH_AVR51, "__AVR_ATmega128RFR2__", 0, 0, 0x0200, 2, "m128rfr2")
++AVR_MCU ("atmega1284rfr2", ARCH_AVR51, "__AVR_ATmega1284RFR2__", 0, 0, 0x0200, 2, "m1284rfr2")
+ AVR_MCU ("at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0, 0x0100, 2, "can128")
+ AVR_MCU ("at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0, 0x0100, 2, "usb1286")
+ AVR_MCU ("at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0, 0x0100, 2, "usb1287")
+@@ -238,6 +240,7 @@ AVR_MCU ("atmega2560", ARCH_AV
+ AVR_MCU ("atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0, 0x0200, 4, "m2561")
+ AVR_MCU ("atmega256rfa2", ARCH_AVR6, "__AVR_ATmega256RFA2__", 0, 0, 0x0200, 4, "m256rfa2")
+ AVR_MCU ("atmega256rfr2", ARCH_AVR6, "__AVR_ATmega256RFR2__", 0, 0, 0x0200, 4, "m256rfr2")
++AVR_MCU ("atmega2564rfr2", ARCH_AVR6, "__AVR_ATmega2564RFR2__", 0, 0, 0x0200, 4, "m2564rfr2")
+ /* Enhanced, == 20K starts at 0x8000 */
+ AVR_MCU ("avr7", ARCH_AVR7, NULL, 0, 0, 0x0200, 1, "a5831")
+ AVR_MCU ("ata5831", ARCH_AVR7, "__AVR_ATA5831__", 0, 0, 0x0200, 1, "a5831")
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-06-21 19:07:27.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-06-21 19:07:59.000000000 +0530
-@@ -113,6 +113,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0x0100, "m16u2" },
- { "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
- { "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
-+ { "attiny1634", ARCH_AVR35, "__AVR_ATtiny1634__", 0, 0x0100, "tn1634" },
- /* Enhanced, <= 8K. */
- { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
- { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-06-21 19:07:27.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-06-21 19:08:51.000000000 +0530
-@@ -149,6 +149,7 @@ MULTILIB_MATCHES = \
- mmcu?avr35=mmcu?atmega16u2 \
- mmcu?avr35=mmcu?atmega32u2 \
- mmcu?avr35=mmcu?attiny167 \
-+ mmcu?avr35=mmcu?attiny1634 \
- mmcu?avr35=mmcu?attiny327 \
- mmcu?avr4=mmcu?atmega48 \
- mmcu?avr4=mmcu?atmega48a \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-06-21 19:12:43.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-06-21 19:13:11.000000000 +0530
-@@ -119,6 +119,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
- { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
- { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
-+ { "atmega48pa", ARCH_AVR4, "__AVR_ATmega48PA__", 0, 0x0100, "m48pa" },
- { "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
- { "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
- { "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-06-21 19:12:43.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-06-21 19:13:11.000000000 +0530
-@@ -153,6 +153,7 @@ MULTILIB_MATCHES = \
- mmcu?avr35=mmcu?attiny327 \
- mmcu?avr4=mmcu?atmega48 \
- mmcu?avr4=mmcu?atmega48a \
-+ mmcu?avr4=mmcu?atmega48pa \
- mmcu?avr4=mmcu?atmega48p \
- mmcu?avr4=mmcu?atmega8 \
- mmcu?avr4=mmcu?atmega8515 \
--- /dev/null
+diff -Naurp gcc/config/avr/avr-mcus.def gcc/config/avr/avr-mcus.def
+--- gcc/config/avr/avr-mcus.def 2013-03-25 10:50:37.000000000 +0530
++++ gcc/config/avr/avr-mcus.def 2013-03-25 11:52:38.000000000 +0530
+@@ -251,6 +251,7 @@ AVR_MCU ("atmxt112sl", ARCH_AVRXME
+ AVR_MCU ("atmxt224", ARCH_AVRXMEGA2, "__AVR_ATMXT224__", 0, 0, 0x2000, 1, "mxt224")
+ AVR_MCU ("atmxt224e", ARCH_AVRXMEGA2, "__AVR_ATMXT224E__", 0, 0, 0x2000, 1, "mxt224e")
+ AVR_MCU ("atmxt336s", ARCH_AVRXMEGA2, "__AVR_ATMXT336S__", 0, 0, 0x2000, 1, "mxt336s")
++AVR_MCU ("atmxts200", ARCH_AVRXMEGA2, "__AVR_ATMXTS200__", 0, 0, 0x2000, 1, "mxts200")
+ AVR_MCU ("atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0, 0x2000, 1, "x16a4")
+ AVR_MCU ("atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0, 0x2000, 1, "x16a4u")
+ AVR_MCU ("atxmega16c4", ARCH_AVRXMEGA2, "__AVR_ATxmega16C4__", 0, 0, 0x2000, 1, "x16c4")
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-06-24 10:37:25.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-06-24 10:36:43.000000000 +0530
-@@ -55,7 +55,7 @@ const struct base_arch_s avr_arch_types[
- - avr-libc. */
-
- const struct mcu_type_s avr_mcu_types[] = {
-- /* Classic, <= 8K. */
-+ /* Classic, <= 8K, 2-byte PC. */
- { "avr2", ARCH_AVR2, NULL, 0, 0x0060, "s8515" },
- { "at90s2313", ARCH_AVR2, "__AVR_AT90S2313__", 1, 0x0060, "s2313" },
- { "at90s2323", ARCH_AVR2, "__AVR_AT90S2323__", 1, 0x0060, "s2323" },
-@@ -69,7 +69,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "at90s8515", ARCH_AVR2, "__AVR_AT90S8515__", 0, 0x0060, "s8515" },
- { "at90c8534", ARCH_AVR2, "__AVR_AT90C8534__", 0, 0x0060, "c8534" },
- { "at90s8535", ARCH_AVR2, "__AVR_AT90S8535__", 0, 0x0060, "s8535" },
-- /* Classic + MOVW, <= 8K. */
-+ /* Classic, <= 8K + 2-byte PC + { MOVW/LPMX }. */
- { "avr25", ARCH_AVR25, NULL, 0, 0x0060, "tn85" },
- { "ata6289", ARCH_AVR25, "__AVR_ATA6289__", 0, 0x0100, "a6289" },
- { "attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0x0060, "tn13" },
-@@ -97,15 +97,15 @@ const struct mcu_type_s avr_mcu_types[]
- { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" },
- { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0x0100, "tn88" },
- { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 1, 0x0060, "86401" },
-- /* Classic, > 8K, <= 64K. */
-+ /* Classic, > 8K, <= 64K +2-byte PC + { JMP/CALL }. */
- { "avr3", ARCH_AVR3, NULL, 0, 0x0060, "43355" },
- { "at43usb355", ARCH_AVR3, "__AVR_AT43USB355__", 0, 0x0060, "43355" },
- { "at76c711", ARCH_AVR3, "__AVR_AT76C711__", 0, 0x0060, "76711" },
-- /* Classic, == 128K. */
-+ /* Classic, == 128K + 2-byte PC + { JMP/CALL, ELPM }. */
- { "avr31", ARCH_AVR31, NULL, 0, 0x0060, "m103" },
- { "atmega103", ARCH_AVR31, "__AVR_ATmega103__", 0, 0x0060, "m103" },
- { "at43usb320", ARCH_AVR31, "__AVR_AT43USB320__", 0, 0x0060, "43320" },
-- /* Classic + MOVW + JMP/CALL. */
-+ /* Classic, >=16K, <=64K + 2-byte PC + { MOVW/LPMX + JMP/CALL }. */
- { "avr35", ARCH_AVR35, NULL, 0, 0x0100, "usb162" },
- { "at90usb82", ARCH_AVR35, "__AVR_AT90USB82__", 0, 0x0100, "usb82" },
- { "at90usb162", ARCH_AVR35, "__AVR_AT90USB162__", 0, 0x0100, "usb162" },
-@@ -114,7 +114,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
- { "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
- { "attiny1634", ARCH_AVR35, "__AVR_ATtiny1634__", 0, 0x0100, "tn1634" },
-- /* Enhanced, <= 8K. */
-+ /* Enhanced, <= 8K + 2-byte PC + { MOVW/LPMX, MUL }. */
- { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
- { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
- { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
-@@ -134,7 +134,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "at90pwm3", ARCH_AVR4, "__AVR_AT90PWM3__", 0, 0x0100, "90pwm3" },
- { "at90pwm3b", ARCH_AVR4, "__AVR_AT90PWM3B__", 0, 0x0100, "90pwm3b" },
- { "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0x0100, "90pwm81" },
-- /* Enhanced, > 8K, <= 64K. */
-+ /* Enhanced, > 8K, <= 64K + 2-byte PC +
-+ { MOVW/LPMX, JMP/CALL, MUL }. */
- { "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
- { "at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 1, 0x0100, "90pwm161" },
-
-@@ -229,7 +230,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__", 0, 0x0100, "usb647" },
- { "at94k", ARCH_AVR5, "__AVR_AT94K__", 0, 0x0060, "at94k" },
- { "m3000", ARCH_AVR5, "__AVR_M3000__", 0, 0x1000, "m3000" },
-- /* Enhanced, == 128K. */
-+ /* Enhanced, == 128K + 2-byte PC +
-+ { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
- { "avr51", ARCH_AVR51, NULL, 0, 0x0100, "m128" },
- { "atmega128", ARCH_AVR51, "__AVR_ATmega128__", 0, 0x0100, "m128" },
- { "atmega1280", ARCH_AVR51, "__AVR_ATmega1280__", 0, 0x0200, "m1280" },
-@@ -239,7 +241,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0x0100, "can128" },
- { "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0x0100, "usb1286" },
- { "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0x0100, "usb1286" },
-- /* 3-Byte PC. */
-+/* Enhanced, ==256K + 3-Byte PC +
-+ { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
- { "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
- { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
- { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
-@@ -248,8 +251,10 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
- { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
- { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
-+ { "atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0x2000, "x16a4u" },
- { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
- { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" },
-+ { "atxmega32a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4U__", 0, 0x2000, "x32a4u" },
- { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
- { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
- /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
-@@ -273,7 +278,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
- { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
- { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
-- /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
-+ /* Xmega, >= 128K, <= 256K FLASH, > 64K RAM. */
- { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
- { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
- { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-06-24 10:37:25.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-06-24 10:36:43.000000000 +0530
-@@ -265,9 +265,11 @@ MULTILIB_MATCHES = \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561 \
- mmcu?avrxmega2=mmcu?atxmega16a4 \
-+ mmcu?avrxmega2=mmcu?atxmega16a4u \
- mmcu?avrxmega2=mmcu?atxmega16d4 \
- mmcu?avrxmega2=mmcu?atxmega32d4 \
- mmcu?avrxmega2=mmcu?atxmega32a4 \
-+ mmcu?avrxmega2=mmcu?atxmega32a4u \
- mmcu?avrxmega2=mmcu?atxmega32x1 \
- mmcu?avrxmega4=mmcu?atxmega64a3 \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-06-24 10:38:47.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-06-24 10:38:36.000000000 +0530
-@@ -262,6 +262,7 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
- { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
- { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
-+ { "atxmega64a3u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3U__", 0, 0x2000, "x64a3u"},
- { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
- /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
- { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" },
-@@ -270,11 +271,14 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
- { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
- { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
-+ { "atxmega128a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega128A3U__", 0, 0x2000, "x128a3u"},
- { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
- { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
-+ { "atxmega192a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0x2000, "x192a3u"},
- { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
- { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
-+ { "atxmega256a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3U__", 0, 0x2000, "x256a3u"},
- { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
- { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
- { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-06-24 10:38:47.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-06-24 10:38:36.000000000 +0530
-@@ -272,15 +272,19 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega2=mmcu?atxmega32a4u \
- mmcu?avrxmega2=mmcu?atxmega32x1 \
- mmcu?avrxmega4=mmcu?atxmega64a3 \
-+ mmcu?avrxmega4=mmcu?atxmega64a3u \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
- mmcu?avrxmega5=mmcu?atxmega64a1 \
- mmcu?avrxmega5=mmcu?atxmega64a1u \
- mmcu?avrxmega6=mmcu?atxmega128a3 \
-+ mmcu?avrxmega6=mmcu?atxmega128a3u \
- mmcu?avrxmega6=mmcu?atxmega128b1 \
- mmcu?avrxmega6=mmcu?atxmega128d3 \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
-+ mmcu?avrxmega6=mmcu?atxmega192a3u \
- mmcu?avrxmega6=mmcu?atxmega192d3 \
- mmcu?avrxmega6=mmcu?atxmega256a3 \
-+ mmcu?avrxmega6=mmcu?atxmega256a3u \
- mmcu?avrxmega6=mmcu?atxmega256a3b \
- mmcu?avrxmega6=mmcu?atxmega256a3bu \
- mmcu?avrxmega6=mmcu?atxmega256d3 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-08-12 11:47:21.000000000 +0300
-+++ gcc/config/avr/avr-devices.c 2011-08-12 11:42:24.000000000 +0300
-@@ -210,6 +210,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__", 0, 0x0100, "m64c1" },
- { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0x0100, "m64m1" },
- { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
-+ { "atmega64rfa2", ARCH_AVR5, "__AVR_ATmega64RFA2__", 0, 0x0200, "m64rfa2"},
-+ { "atmega64rfr2", ARCH_AVR5, "__AVR_ATmega64RFR2__", 0, 0x0200, "m64rfr2"},
- { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
- { "atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 1, 0x0100, "m32hvbrevb" },
- { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
-@@ -238,14 +240,18 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega1281", ARCH_AVR51, "__AVR_ATmega1281__", 0, 0x0200, "m1281" },
- { "atmega1284p", ARCH_AVR51, "__AVR_ATmega1284P__", 0, 0x0100, "m1284p" },
- { "atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__", 0, 0x0200, "m128rfa1" },
-+ { "atmega128rfa2", ARCH_AVR51, "__AVR_ATmega128RFA2__", 0, 0x0200, "m128rfa2" },
-+ { "atmega128rfr2", ARCH_AVR51, "__AVR_ATmega128RFR2__", 0, 0x0200, "m128rfr2" },
- { "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0x0100, "can128" },
- { "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0x0100, "usb1286" },
- { "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0x0100, "usb1286" },
- /* Enhanced, ==256K + 3-Byte PC +
-- { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
-+ { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX, EIJMP/EICALL }. */
- { "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
- { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
- { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
-+ { "atmega256rfa2", ARCH_AVR6, "__AVR_ATmega256RFA2__", 0, 0x0200, "m256rfa2" },
-+ { "atmega256rfr2", ARCH_AVR6, "__AVR_ATmega256RFR2__", 0, 0x0200, "m256rfr2" },
- /* Enhanced, == 256K. */
- /* Xmega, <= 8K FLASH. */
- /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-08-12 11:47:21.000000000 +0300
-+++ gcc/config/avr/t-avr 2011-08-12 11:45:16.000000000 +0300
-@@ -211,6 +211,8 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega3290p \
- mmcu?avr5=mmcu?atmega3290pa \
- mmcu?avr5=mmcu?atmega406 \
-+ mmcu?avr5=mmcu?atmega64rfa2 \
-+ mmcu?avr5=mmcu?atmega64rfr2 \
- mmcu?avr5=mmcu?atmega64 \
- mmcu?avr5=mmcu?atmega640 \
- mmcu?avr5=mmcu?atmega644 \
-@@ -259,9 +261,13 @@ MULTILIB_MATCHES = \
- mmcu?avr51=mmcu?atmega1281 \
- mmcu?avr51=mmcu?atmega1284p \
- mmcu?avr51=mmcu?atmega128rfa1 \
-+ mmcu?avr51=mmcu?atmega128rfa2 \
-+ mmcu?avr51=mmcu?atmega128rfr2 \
- mmcu?avr51=mmcu?at90can128 \
- mmcu?avr51=mmcu?at90usb1286 \
- mmcu?avr51=mmcu?at90usb1287 \
-+ mmcu?avr6=mmcu?atmega256rfa2 \
-+ mmcu?avr6=mmcu?atmega256rfr2 \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561 \
- mmcu?avrxmega2=mmcu?atxmega16a4 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-08-12 11:50:23.000000000 +0300
-+++ gcc/config/avr/avr-devices.c 2011-08-12 11:50:43.000000000 +0300
-@@ -149,6 +149,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
- { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
- { "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
-+ { "atmega165pa", ARCH_AVR5, "__AVR_ATmega165PA__", 0, 0x0100, "m165pa" },
- { "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
- { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
- { "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-08-12 11:50:23.000000000 +0300
-+++ gcc/config/avr/t-avr 2011-08-12 11:50:43.000000000 +0300
-@@ -180,6 +180,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega165 \
- mmcu?avr5=mmcu?atmega165a \
- mmcu?avr5=mmcu?atmega165p \
-+ mmcu?avr5=mmcu?atmega165pa \
- mmcu?avr5=mmcu?atmega168 \
- mmcu?avr5=mmcu?atmega168a \
- mmcu?avr5=mmcu?atmega168p \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 11:14:59.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 11:44:14.000000000 +0530
-@@ -275,7 +275,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" },
- { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0x2000, "x64a1" },
- { "atxmega64a1u", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1U__", 0, 0x2000, "x64a1u" },
-- /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
-+ /* Xmega, >= 128K FLASH, <= 64K RAM. */
- { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
- { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
- { "atxmega128a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega128A3U__", 0, 0x2000, "x128a3u"},
-@@ -289,7 +289,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
- { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
- { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
-- /* Xmega, >= 128K, <= 256K FLASH, > 64K RAM. */
-+ { "atxmega384c3", ARCH_AVRXMEGA6, "__AVR_ATxmega384C3__", 0, 0x2000, "x384c3" },
-+ /* Xmega, >= 128K FLASH, > 64K RAM. */
- { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
- { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
- { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 11:14:59.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 11:40:24.000000000 +0530
-@@ -295,6 +295,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega256a3b \
- mmcu?avrxmega6=mmcu?atxmega256a3bu \
- mmcu?avrxmega6=mmcu?atxmega256d3 \
-+ mmcu?avrxmega6=mmcu?atxmega384c3 \
- mmcu?avrxmega7=mmcu?atxmega128a1 \
- mmcu?avrxmega7=mmcu?atxmega128a1u \
- mmcu?avrtiny10=mmcu?attiny4 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 11:55:44.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 12:00:41.000000000 +0530
-@@ -294,6 +294,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
- { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
- { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
-+ { "atxmega128a4u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A4U__", 0, 0x2000, "x128a4u" },
- /* tiny10 family */
- { "avrtiny10", ARCH_AVRTINY10, NULL, 0, 0x0040, "tn10" },
- { "attiny4", ARCH_AVRTINY10, "__AVR_ATtiny4__", 0, 0x0040, "tn4" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 11:55:44.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 12:00:41.000000000 +0530
-@@ -298,6 +298,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega384c3 \
- mmcu?avrxmega7=mmcu?atxmega128a1 \
- mmcu?avrxmega7=mmcu?atxmega128a1u \
-+ mmcu?avrxmega7=mmcu?atxmega128a4u \
- mmcu?avrtiny10=mmcu?attiny4 \
- mmcu?avrtiny10=mmcu?attiny5 \
- mmcu?avrtiny10=mmcu?attiny9 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 12:00:41.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 12:06:09.000000000 +0530
-@@ -271,6 +271,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
- { "atxmega64a3u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3U__", 0, 0x2000, "x64a3u"},
- { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
-+ { "atxmega64d4", ARCH_AVRXMEGA4, "__AVR_ATxmega64D4__", 0, 0x2000, "x64d4" },
- /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
- { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" },
- { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0x2000, "x64a1" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 12:00:41.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 12:04:00.000000000 +0530
-@@ -281,6 +281,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega4=mmcu?atxmega64a3 \
- mmcu?avrxmega4=mmcu?atxmega64a3u \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
-+ mmcu?avrxmega4=mmcu?atxmega64d4 \
- mmcu?avrxmega5=mmcu?atxmega64a1 \
- mmcu?avrxmega5=mmcu?atxmega64a1u \
- mmcu?avrxmega6=mmcu?atxmega128a3 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 12:06:09.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 12:15:49.000000000 +0530
-@@ -146,6 +146,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" },
- { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0x0100, "m164a" },
- { "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" },
-+ { "atmega164pa", ARCH_AVR5, "__AVR_ATmega164PA__", 0, 0x0100, "m164pa" },
- { "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
- { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
- { "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
-@@ -153,6 +154,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
- { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
- { "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
-+ { "atmega168pa", ARCH_AVR5, "__AVR_ATmega168PA__", 0, 0x0100, "m168pa" },
- { "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" },
- { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
- { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
-@@ -163,6 +165,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
- { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
- { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
-+ { "atmega32a", ARCH_AVR5, "__AVR_ATmega32A__", 0, 0x0060, "m32a" },
- { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
- { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0100, "m324a" },
- { "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" },
-@@ -191,6 +194,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
- { "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
- { "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
-+ { "atmega64a", ARCH_AVR5, "__AVR_ATmega64A__", 0, 0x0100, "m64a" },
- { "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
- { "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" },
- { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0x0100, "m644a" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 12:04:00.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 12:15:49.000000000 +0530
-@@ -177,6 +177,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega163 \
- mmcu?avr5=mmcu?atmega164a \
- mmcu?avr5=mmcu?atmega164p \
-+ mmcu?avr5=mmcu?atmega164pa \
- mmcu?avr5=mmcu?atmega165 \
- mmcu?avr5=mmcu?atmega165a \
- mmcu?avr5=mmcu?atmega165p \
-@@ -184,11 +185,13 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega168 \
- mmcu?avr5=mmcu?atmega168a \
- mmcu?avr5=mmcu?atmega168p \
-+ mmcu?avr5=mmcu?atmega168pa \
- mmcu?avr5=mmcu?atmega169 \
- mmcu?avr5=mmcu?atmega169a \
- mmcu?avr5=mmcu?atmega169p \
- mmcu?avr5=mmcu?atmega169pa \
- mmcu?avr5=mmcu?atmega32 \
-+ mmcu?avr5=mmcu?atmega32a \
- mmcu?avr5=mmcu?atmega323 \
- mmcu?avr5=mmcu?atmega324a \
- mmcu?avr5=mmcu?atmega324p \
-@@ -215,6 +218,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega64rfa2 \
- mmcu?avr5=mmcu?atmega64rfr2 \
- mmcu?avr5=mmcu?atmega64 \
-+ mmcu?avr5=mmcu?atmega64a \
- mmcu?avr5=mmcu?atmega640 \
- mmcu?avr5=mmcu?atmega644 \
- mmcu?avr5=mmcu?atmega644a \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 12:15:49.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 14:31:05.000000000 +0530
-@@ -274,6 +274,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
- { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
- { "atxmega64a3u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3U__", 0, 0x2000, "x64a3u"},
-+ { "atxmega64b3", ARCH_AVRXMEGA4, "__AVR_ATxmega64B3__", 0, 0x2000, "x64b3"},
- { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
- { "atxmega64d4", ARCH_AVRXMEGA4, "__AVR_ATxmega64D4__", 0, 0x2000, "x64d4" },
- /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
-@@ -285,6 +286,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
- { "atxmega128a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega128A3U__", 0, 0x2000, "x128a3u"},
- { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
-+ { "atxmega128b3", ARCH_AVRXMEGA6, "__AVR_ATxmega128B3__", 0, 0x2000, "x128b3" },
- { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
- { "atxmega192a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0x2000, "x192a3u"},
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 12:15:49.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 14:31:05.000000000 +0530
-@@ -284,6 +284,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega2=mmcu?atxmega32x1 \
- mmcu?avrxmega4=mmcu?atxmega64a3 \
- mmcu?avrxmega4=mmcu?atxmega64a3u \
-+ mmcu?avrxmega4=mmcu?atxmega64b3 \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
- mmcu?avrxmega4=mmcu?atxmega64d4 \
- mmcu?avrxmega5=mmcu?atxmega64a1 \
-@@ -291,6 +292,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega128a3 \
- mmcu?avrxmega6=mmcu?atxmega128a3u \
- mmcu?avrxmega6=mmcu?atxmega128b1 \
-+ mmcu?avrxmega6=mmcu?atxmega128b3 \
- mmcu?avrxmega6=mmcu?atxmega128d3 \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
- mmcu?avrxmega6=mmcu?atxmega192a3u \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 14:31:05.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 14:34:49.000000000 +0530
-@@ -274,6 +274,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
- { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
- { "atxmega64a3u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3U__", 0, 0x2000, "x64a3u"},
-+ { "atxmega64b1", ARCH_AVRXMEGA4, "__AVR_ATxmega64B1__", 0, 0x2000, "x64b1" },
- { "atxmega64b3", ARCH_AVRXMEGA4, "__AVR_ATxmega64B3__", 0, 0x2000, "x64b3"},
- { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
- { "atxmega64d4", ARCH_AVRXMEGA4, "__AVR_ATxmega64D4__", 0, 0x2000, "x64d4" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 14:31:05.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 14:34:49.000000000 +0530
-@@ -284,6 +284,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega2=mmcu?atxmega32x1 \
- mmcu?avrxmega4=mmcu?atxmega64a3 \
- mmcu?avrxmega4=mmcu?atxmega64a3u \
-+ mmcu?avrxmega4=mmcu?atxmega64b1 \
- mmcu?avrxmega4=mmcu?atxmega64b3 \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
- mmcu?avrxmega4=mmcu?atxmega64d4 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 14:34:49.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 14:39:27.000000000 +0530
-@@ -117,6 +117,7 @@ const struct mcu_type_s avr_mcu_types[]
- /* Enhanced, <= 8K + 2-byte PC + { MOVW/LPMX, MUL }. */
- { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
- { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
-+ { "atmega8a", ARCH_AVR4, "__AVR_ATmega8A__", 0, 0x0060, "m8a" },
- { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
- { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
- { "atmega48pa", ARCH_AVR4, "__AVR_ATmega48PA__", 0, 0x0100, "m48pa" },
-@@ -241,8 +242,10 @@ const struct mcu_type_s avr_mcu_types[]
- { MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
- { "avr51", ARCH_AVR51, NULL, 0, 0x0100, "m128" },
- { "atmega128", ARCH_AVR51, "__AVR_ATmega128__", 0, 0x0100, "m128" },
-+ { "atmega128a", ARCH_AVR51, "__AVR_ATmega128A__", 0, 0x0100, "m128a" },
- { "atmega1280", ARCH_AVR51, "__AVR_ATmega1280__", 0, 0x0200, "m1280" },
- { "atmega1281", ARCH_AVR51, "__AVR_ATmega1281__", 0, 0x0200, "m1281" },
-+ { "atmega1284", ARCH_AVR51, "__AVR_ATmega1284__", 0, 0x0100, "m1284" },
- { "atmega1284p", ARCH_AVR51, "__AVR_ATmega1284P__", 0, 0x0100, "m1284p" },
- { "atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__", 0, 0x0200, "m128rfa1" },
- { "atmega128rfa2", ARCH_AVR51, "__AVR_ATmega128RFA2__", 0, 0x0200, "m128rfa2" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 14:55:08.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 14:52:10.000000000 +0530
-@@ -156,6 +156,7 @@ MULTILIB_MATCHES = \
- mmcu?avr4=mmcu?atmega48pa \
- mmcu?avr4=mmcu?atmega48p \
- mmcu?avr4=mmcu?atmega8 \
-+ mmcu?avr4=mmcu?atmega8a \
- mmcu?avr4=mmcu?atmega8515 \
- mmcu?avr4=mmcu?atmega8535 \
- mmcu?avr4=mmcu?atmega88 \
-@@ -262,8 +263,10 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?at94k \
- mmcu?avr5=mmcu?m3000 \
- mmcu?avr51=mmcu?atmega128 \
-+ mmcu?avr51=mmcu?atmega128a \
- mmcu?avr51=mmcu?atmega1280 \
- mmcu?avr51=mmcu?atmega1281 \
-+ mmcu?avr51=mmcu?atmega1284 \
- mmcu?avr51=mmcu?atmega1284p \
- mmcu?avr51=mmcu?atmega128rfa1 \
- mmcu?avr51=mmcu?atmega128rfa2 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 14:39:27.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 14:59:12.000000000 +0530
-@@ -277,6 +277,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
- { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
- { "atxmega64a3u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3U__", 0, 0x2000, "x64a3u"},
-+ { "atxmega64a4u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A4U__", 0, 0x2000, "x64a4u"},
- { "atxmega64b1", ARCH_AVRXMEGA4, "__AVR_ATxmega64B1__", 0, 0x2000, "x64b1" },
- { "atxmega64b3", ARCH_AVRXMEGA4, "__AVR_ATxmega64B3__", 0, 0x2000, "x64b3"},
- { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 14:52:10.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 14:59:12.000000000 +0530
-@@ -287,6 +287,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega2=mmcu?atxmega32x1 \
- mmcu?avrxmega4=mmcu?atxmega64a3 \
- mmcu?avrxmega4=mmcu?atxmega64a3u \
-+ mmcu?avrxmega4=mmcu?atxmega64a4u \
- mmcu?avrxmega4=mmcu?atxmega64b1 \
- mmcu?avrxmega4=mmcu?atxmega64b3 \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
-
-4
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 14:59:12.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 15:04:23.000000000 +0530
-@@ -293,6 +293,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
- { "atxmega128b3", ARCH_AVRXMEGA6, "__AVR_ATxmega128B3__", 0, 0x2000, "x128b3" },
- { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
-+ { "atxmega128d4", ARCH_AVRXMEGA6, "__AVR_ATxmega128D4__", 0, 0x2000, "x128d4" },
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
- { "atxmega192a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0x2000, "x192a3u"},
- { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 14:59:12.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 15:04:23.000000000 +0530
-@@ -299,6 +299,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega128b1 \
- mmcu?avrxmega6=mmcu?atxmega128b3 \
- mmcu?avrxmega6=mmcu?atxmega128d3 \
-+ mmcu?avrxmega6=mmcu?atxmega128d4 \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
- mmcu?avrxmega6=mmcu?atxmega192a3u \
- mmcu?avrxmega6=mmcu?atxmega192d3 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-10-28 15:04:23.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-10-28 15:06:36.000000000 +0530
-@@ -264,6 +264,7 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, <= 8K FLASH. */
- /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
- { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
-+ { "atmxt336s", ARCH_AVRXMEGA2, "__AVR_ATMXT336S__", 0, 0x2000, "mxt336s"},
- { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
- { "atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0x2000, "x16a4u" },
- { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-10-28 15:04:23.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-10-28 15:06:36.000000000 +0530
-@@ -278,6 +278,7 @@ MULTILIB_MATCHES = \
- mmcu?avr6=mmcu?atmega256rfr2 \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561 \
-+ mmcu?avrxmega2=mmcu?atmxt336s \
- mmcu?avrxmega2=mmcu?atxmega16a4 \
- mmcu?avrxmega2=mmcu?atxmega16a4u \
- mmcu?avrxmega2=mmcu?atxmega16d4 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-11-08 17:00:35.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-11-08 17:04:10.000000000 +0530
-@@ -267,9 +267,11 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmxt336s", ARCH_AVRXMEGA2, "__AVR_ATMXT336S__", 0, 0x2000, "mxt336s"},
- { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
- { "atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0x2000, "x16a4u" },
-+ { "atxmega16c4", ARCH_AVRXMEGA2, "__AVR_ATxmega16C4__", 0, 0x2000, "x16c4" },
- { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
- { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" },
- { "atxmega32a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4U__", 0, 0x2000, "x32a4u" },
-+ { "atxmega32c4", ARCH_AVRXMEGA2, "__AVR_ATxmega32C4__", 0, 0x2000, "x32c4" },
- { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
- { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
- /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
-@@ -293,6 +295,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega128a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega128A3U__", 0, 0x2000, "x128a3u"},
- { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
- { "atxmega128b3", ARCH_AVRXMEGA6, "__AVR_ATxmega128B3__", 0, 0x2000, "x128b3" },
-+ { "atxmega128c3", ARCH_AVRXMEGA6, "__AVR_ATxmega128C3__", 0, 0x2000, "x128c3" },
- { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
- { "atxmega128d4", ARCH_AVRXMEGA6, "__AVR_ATxmega128D4__", 0, 0x2000, "x128d4" },
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
-@@ -302,6 +305,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega256a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3U__", 0, 0x2000, "x256a3u"},
- { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
- { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
-+ { "atxmega256c3", ARCH_AVRXMEGA6, "__AVR_ATxmega256C3__", 0, 0x2000, "x256c3" },
- { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
- { "atxmega384c3", ARCH_AVRXMEGA6, "__AVR_ATxmega384C3__", 0, 0x2000, "x384c3" },
- /* Xmega, >= 128K FLASH, > 64K RAM. */
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-11-08 17:00:35.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-11-08 17:02:00.000000000 +0530
-@@ -281,7 +281,9 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega2=mmcu?atmxt336s \
- mmcu?avrxmega2=mmcu?atxmega16a4 \
- mmcu?avrxmega2=mmcu?atxmega16a4u \
-+ mmcu?avrxmega2=mmcu?atxmega16c4 \
- mmcu?avrxmega2=mmcu?atxmega16d4 \
-+ mmcu?avrxmega2=mmcu?atxmega32c4 \
- mmcu?avrxmega2=mmcu?atxmega32d4 \
- mmcu?avrxmega2=mmcu?atxmega32a4 \
- mmcu?avrxmega2=mmcu?atxmega32a4u \
-@@ -299,6 +301,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega128a3u \
- mmcu?avrxmega6=mmcu?atxmega128b1 \
- mmcu?avrxmega6=mmcu?atxmega128b3 \
-+ mmcu?avrxmega6=mmcu?atxmega128c3 \
- mmcu?avrxmega6=mmcu?atxmega128d3 \
- mmcu?avrxmega6=mmcu?atxmega128d4 \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
-@@ -308,6 +311,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega256a3u \
- mmcu?avrxmega6=mmcu?atxmega256a3b \
- mmcu?avrxmega6=mmcu?atxmega256a3bu \
-+ mmcu?avrxmega6=mmcu?atxmega256c3 \
- mmcu?avrxmega6=mmcu?atxmega256d3 \
- mmcu?avrxmega6=mmcu?atxmega384c3 \
- mmcu?avrxmega7=mmcu?atxmega128a1 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-11-08 17:37:12.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-11-08 17:38:18.000000000 +0530
-@@ -308,6 +308,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega256c3", ARCH_AVRXMEGA6, "__AVR_ATxmega256C3__", 0, 0x2000, "x256c3" },
- { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
- { "atxmega384c3", ARCH_AVRXMEGA6, "__AVR_ATxmega384C3__", 0, 0x2000, "x384c3" },
-+ { "atxmega384d3", ARCH_AVRXMEGA6, "__AVR_ATxmega384D3__", 0, 0x2000, "x384d3" },
- /* Xmega, >= 128K FLASH, > 64K RAM. */
- { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
- { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-11-08 17:37:12.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-11-08 17:38:18.000000000 +0530
-@@ -314,6 +314,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega256c3 \
- mmcu?avrxmega6=mmcu?atxmega256d3 \
- mmcu?avrxmega6=mmcu?atxmega384c3 \
-+ mmcu?avrxmega6=mmcu?atxmega384d3 \
- mmcu?avrxmega7=mmcu?atxmega128a1 \
- mmcu?avrxmega7=mmcu?atxmega128a1u \
- mmcu?avrxmega7=mmcu?atxmega128a4u \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-11-16 18:28:11.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-11-16 18:33:39.000000000 +0530
-@@ -221,6 +221,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
- { "atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 1, 0x0100, "m32hvbrevb" },
- { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
-+ { "atmega48hvf", ARCH_AVR5, "__AVR_ATmega48HVF__", 0, 0x0100, "m48hvf" },
- { "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
- { "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
- { "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-11-16 18:28:11.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-11-16 18:34:34.000000000 +0530
-@@ -244,6 +244,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega32hvb \
- mmcu?avr5=mmcu?atmega32hvbrevb \
- mmcu?avr5=mmcu?atmega64hve \
-+ mmcu?avr5=mmcu?atmega48hvf \
- mmcu?avr5=mmcu?at90can32 \
- mmcu?avr5=mmcu?at90can64 \
- mmcu?avr5=mmcu?at90pwm216 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2011-12-08 14:24:48.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2011-12-08 14:38:53.000000000 +0530
-@@ -165,6 +165,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 1, 0x0100, "m16hvbrevb" },
- { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
- { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
-+ { "atmega26hvg", ARCH_AVR5, "__AVR_ATmega26HVG__", 0, 0x0100, "m26hvg" },
- { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
- { "atmega32a", ARCH_AVR5, "__AVR_ATmega32A__", 0, 0x0060, "m32a" },
- { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-12-08 14:24:48.000000000 +0530
-+++ gcc/config/avr/t-avr 2011-12-08 14:41:10.000000000 +0530
-@@ -191,6 +191,7 @@ MULTILIB_MATCHES = \
- mmcu?avr5=mmcu?atmega169a \
- mmcu?avr5=mmcu?atmega169p \
- mmcu?avr5=mmcu?atmega169pa \
-+ mmcu?avr5=mmcu?atmega26hvg \
- mmcu?avr5=mmcu?atmega32 \
- mmcu?avr5=mmcu?atmega32a \
- mmcu?avr5=mmcu?atmega323 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-02-10 20:08:47.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-02-10 20:16:45.000000000 +0530
-@@ -266,6 +266,8 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, <= 8K FLASH. */
- /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
- { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
-+ { "atmxt224", ARCH_AVRXMEGA2, "__AVR_ATMXT224__", 0, 0x2000, "mxt224"},
-+ { "atmxt224e", ARCH_AVRXMEGA2, "__AVR_ATMXT224E__", 0, 0x2000, "mxt224e"},
- { "atmxt336s", ARCH_AVRXMEGA2, "__AVR_ATMXT336S__", 0, 0x2000, "mxt336s"},
- { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
- { "atxmega16a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4U__", 0, 0x2000, "x16a4u" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-02-10 20:08:47.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-02-10 20:16:45.000000000 +0530
-@@ -280,6 +280,8 @@ MULTILIB_MATCHES = \
- mmcu?avr6=mmcu?atmega256rfr2 \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561 \
-+ mmcu?avrxmega2=mmcu?atmxt224 \
-+ mmcu?avrxmega2=mmcu?atmxt224e \
- mmcu?avrxmega2=mmcu?atmxt336s \
- mmcu?avrxmega2=mmcu?atxmega16a4 \
- mmcu?avrxmega2=mmcu?atxmega16a4u \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-02-10 20:20:51.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-02-10 20:21:25.000000000 +0530
-@@ -304,6 +304,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega128d4", ARCH_AVRXMEGA6, "__AVR_ATxmega128D4__", 0, 0x2000, "x128d4" },
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
- { "atxmega192a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0x2000, "x192a3u"},
-+ { "atxmega192c3", ARCH_AVRXMEGA6, "__AVR_ATxmega192C3__", 0, 0x2000, "x192c3" },
- { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
- { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
- { "atxmega256a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3U__", 0, 0x2000, "x256a3u"},
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-02-10 20:20:51.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-02-10 20:21:25.000000000 +0530
-@@ -310,6 +310,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega128d4 \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
- mmcu?avrxmega6=mmcu?atxmega192a3u \
-+ mmcu?avrxmega6=mmcu?atxmega192c3 \
- mmcu?avrxmega6=mmcu?atxmega192d3 \
- mmcu?avrxmega6=mmcu?atxmega256a3 \
- mmcu?avrxmega6=mmcu?atxmega256a3u \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-02-10 20:23:45.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-02-10 20:24:34.000000000 +0530
-@@ -266,6 +266,7 @@ const struct mcu_type_s avr_mcu_types[]
- /* Xmega, <= 8K FLASH. */
- /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
- { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
-+ { "atmxt112sl", ARCH_AVRXMEGA2, "__AVR_ATMXT112SL__", 0, 0x2000, "mxt112sl"},
- { "atmxt224", ARCH_AVRXMEGA2, "__AVR_ATMXT224__", 0, 0x2000, "mxt224"},
- { "atmxt224e", ARCH_AVRXMEGA2, "__AVR_ATMXT224E__", 0, 0x2000, "mxt224e"},
- { "atmxt336s", ARCH_AVRXMEGA2, "__AVR_ATMXT336S__", 0, 0x2000, "mxt336s"},
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-02-10 20:23:45.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-02-10 20:24:34.000000000 +0530
-@@ -280,6 +280,7 @@ MULTILIB_MATCHES = \
- mmcu?avr6=mmcu?atmega256rfr2 \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561 \
-+ mmcu?avrxmega2=mmcu?atmxt112sl \
- mmcu?avrxmega2=mmcu?atmxt224 \
- mmcu?avrxmega2=mmcu?atmxt224e \
- mmcu?avrxmega2=mmcu?atmxt336s \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-02-10 20:28:58.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-02-10 20:29:40.000000000 +0530
-@@ -288,6 +288,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega64a4u", ARCH_AVRXMEGA4, "__AVR_ATxmega64A4U__", 0, 0x2000, "x64a4u"},
- { "atxmega64b1", ARCH_AVRXMEGA4, "__AVR_ATxmega64B1__", 0, 0x2000, "x64b1" },
- { "atxmega64b3", ARCH_AVRXMEGA4, "__AVR_ATxmega64B3__", 0, 0x2000, "x64b3"},
-+ { "atxmega64c3", ARCH_AVRXMEGA4, "__AVR_ATxmega64C3__", 0, 0x2000, "x64c3"},
- { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
- { "atxmega64d4", ARCH_AVRXMEGA4, "__AVR_ATxmega64D4__", 0, 0x2000, "x64d4" },
- /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-02-10 20:28:58.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-02-10 20:29:40.000000000 +0530
-@@ -298,6 +298,7 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega4=mmcu?atxmega64a4u \
- mmcu?avrxmega4=mmcu?atxmega64b1 \
- mmcu?avrxmega4=mmcu?atxmega64b3 \
-+ mmcu?avrxmega4=mmcu?atxmega64c3 \
- mmcu?avrxmega4=mmcu?atxmega64d3 \
- mmcu?avrxmega4=mmcu?atxmega64d4 \
- mmcu?avrxmega5=mmcu?atxmega64a1 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-02-15 14:00:53.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-02-17 11:04:27.000000000 +0530
-@@ -116,6 +116,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "attiny1634", ARCH_AVR35, "__AVR_ATtiny1634__", 0, 0x0100, "tn1634" },
- /* Enhanced, <= 8K + 2-byte PC + { MOVW/LPMX, MUL }. */
- { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
-+ { "ata6285", ARCH_AVR4, "__AVR_ATA6285__", 0, 0x0100, "a6285" },
-+ { "ata6286", ARCH_AVR4, "__AVR_ATA6286__", 0, 0x0100, "a6286" },
- { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
- { "atmega8a", ARCH_AVR4, "__AVR_ATmega8A__", 0, 0x0060, "m8a" },
- { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-02-15 14:00:53.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-02-17 11:30:56.000000000 +0530
-@@ -151,6 +151,8 @@ MULTILIB_MATCHES = \
- mmcu?avr35=mmcu?attiny167 \
- mmcu?avr35=mmcu?attiny1634 \
- mmcu?avr35=mmcu?attiny327 \
-+ mmcu?avr4=mmcu?ata6285 \
-+ mmcu?avr4=mmcu?ata6286 \
- mmcu?avr4=mmcu?atmega48 \
- mmcu?avr4=mmcu?atmega48a \
- mmcu?avr4=mmcu?atmega48pa \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-05-31 14:44:29.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-05-31 14:44:40.000000000 +0530
-@@ -96,6 +96,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" },
- { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" },
- { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0x0100, "tn88" },
-+ { "attiny828", ARCH_AVR25, "__AVR_ATtiny828__", 0, 0x0100, "tn828" },
- { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 1, 0x0060, "86401" },
- /* Classic, > 8K, <= 64K +2-byte PC + { JMP/CALL }. */
- { "avr3", ARCH_AVR3, NULL, 0, 0x0060, "43355" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-05-31 14:44:29.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-05-31 14:44:40.000000000 +0530
-@@ -138,6 +138,7 @@ MULTILIB_MATCHES = \
- mmcu?avr25=mmcu?attiny87 \
- mmcu?avr25=mmcu?attiny48 \
- mmcu?avr25=mmcu?attiny88 \
-+ mmcu?avr25=mmcu?attiny828 \
- mmcu?avr25=mmcu?at86rf401 \
- mmcu?avr3=mmcu?at43usb355 \
- mmcu?avr3=mmcu?at76c711 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-02-27 09:26:40.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-02-27 09:27:37.000000000 +0530
-@@ -143,6 +143,9 @@ const struct mcu_type_s avr_mcu_types[]
- { "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
- { "at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 1, 0x0100, "90pwm161" },
-
-+ { "ata5790", ARCH_AVR5, "__AVR_ATA5790__", 0, 0x0100, "a5790"},
-+ { "ata5790n", ARCH_AVR5, "__AVR_ATA5790N__", 0, 0x0100, "a5790n"},
-+ { "ata5795", ARCH_AVR5, "__AVR_ATA5795__", 0, 0x0100, "a5795"},
- { "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
- { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
- { "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-02-27 09:26:40.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-02-27 09:27:37.000000000 +0530
-@@ -174,6 +174,9 @@ MULTILIB_MATCHES = \
- mmcu?avr4=mmcu?at90pwm3b \
- mmcu?avr4=mmcu?at90pwm81 \
- mmcu?avr5=mmcu?at90pwm161 \
-+ mmcu?avr5=mmcu?ata5790 \
-+ mmcu?avr5=mmcu?ata5790n \
-+ mmcu?avr5=mmcu?ata5795 \
- mmcu?avr5=mmcu?atmega16 \
- mmcu?avr5=mmcu?atmega16a \
- mmcu?avr5=mmcu?atmega161 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-03-27 20:49:18.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-03-30 13:49:00.000000000 +0530
-@@ -72,6 +72,7 @@ const struct mcu_type_s avr_mcu_types[]
- /* Classic, <= 8K + 2-byte PC + { MOVW/LPMX }. */
- { "avr25", ARCH_AVR25, NULL, 0, 0x0060, "tn85" },
- { "ata6289", ARCH_AVR25, "__AVR_ATA6289__", 0, 0x0100, "a6289" },
-+ { "ata5272", ARCH_AVR25, "__AVR_ATA5272__", 0, 0x0100, "a5272" },
- { "attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0x0060, "tn13" },
- { "attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0x0060, "tn13a" },
- { "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0x0060, "tn2313" },
-@@ -108,6 +109,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "at43usb320", ARCH_AVR31, "__AVR_AT43USB320__", 0, 0x0060, "43320" },
- /* Classic, >=16K, <=64K + 2-byte PC + { MOVW/LPMX + JMP/CALL }. */
- { "avr35", ARCH_AVR35, NULL, 0, 0x0100, "usb162" },
-+ { "ata5505", ARCH_AVR35, "__AVR_ATA5505__", 0, 0x0100, "a5505" },
- { "at90usb82", ARCH_AVR35, "__AVR_AT90USB82__", 0, 0x0100, "usb82" },
- { "at90usb162", ARCH_AVR35, "__AVR_AT90USB162__", 0, 0x0100, "usb162" },
- { "atmega8u2", ARCH_AVR35, "__AVR_ATmega8U2__", 0, 0x0100, "m8u2" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-03-27 20:49:18.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-03-30 13:56:27.000000000 +0530
-@@ -112,6 +112,7 @@ MULTILIB_DIRNAMES = avr2 avr25 avr3 avr3
-
- # The many avr2 matches are not listed here - this is the default.
- MULTILIB_MATCHES = \
-+ mmcu?avr25=mmcu?ata5272 \
- mmcu?avr25=mmcu?ata6289 \
- mmcu?avr25=mmcu?attiny13 \
- mmcu?avr25=mmcu?attiny13a \
-@@ -146,6 +147,7 @@ MULTILIB_MATCHES = \
- mmcu?avr31=mmcu?at43usb320 \
- mmcu?avr35=mmcu?at90usb82 \
- mmcu?avr35=mmcu?at90usb162 \
-+ mmcu?avr35=mmcu?ata5505 \
- mmcu?avr35=mmcu?atmega8u2 \
- mmcu?avr35=mmcu?atmega16u2 \
- mmcu?avr35=mmcu?atmega32u2 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-06-28 16:20:39.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-06-28 16:23:31.000000000 +0530
-@@ -312,6 +312,8 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega128c3", ARCH_AVRXMEGA6, "__AVR_ATxmega128C3__", 0, 0x2000, "x128c3" },
- { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
- { "atxmega128d4", ARCH_AVRXMEGA6, "__AVR_ATxmega128D4__", 0, 0x2000, "x128d4" },
-+ { "atmxt540s", ARCH_AVRXMEGA6, "__AVR_ATMXT540S__", 0, 0x2000, "mxt540s"},
-+ { "atmxt540sreva", ARCH_AVRXMEGA6, "__AVR_ATMXT540SREVA__", 0, 0x2000, "mxt540sreva"},
- { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
- { "atxmega192a3u",ARCH_AVRXMEGA6, "__AVR_ATxmega192A3U__", 0, 0x2000, "x192a3u"},
- { "atxmega192c3", ARCH_AVRXMEGA6, "__AVR_ATxmega192C3__", 0, 0x2000, "x192c3" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-06-28 16:20:39.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-06-28 16:37:18.000000000 +0530
-@@ -318,6 +318,8 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega6=mmcu?atxmega128c3 \
- mmcu?avrxmega6=mmcu?atxmega128d3 \
- mmcu?avrxmega6=mmcu?atxmega128d4 \
-+ mmcu?avrxmega6=mmcu?atmxt540s \
-+ mmcu?avrxmega6=mmcu?atmxt540sreva \
- mmcu?avrxmega6=mmcu?atxmega192a3 \
- mmcu?avrxmega6=mmcu?atxmega192a3u \
- mmcu?avrxmega6=mmcu?atxmega192c3 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-04-20 18:52:19.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-04-20 18:52:59.000000000 +0530
-@@ -37,6 +37,7 @@ const struct base_arch_s avr_arch_types[
- { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
- { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
-+ { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0200, "__AVR_ARCH__=7", "avr7" },
- { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
- { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
- { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
-@@ -270,6 +271,9 @@ const struct mcu_type_s avr_mcu_types[]
- { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
- { "atmega256rfa2", ARCH_AVR6, "__AVR_ATmega256RFA2__", 0, 0x0200, "m256rfa2" },
- { "atmega256rfr2", ARCH_AVR6, "__AVR_ATmega256RFR2__", 0, 0x0200, "m256rfr2" },
-+ /* Enhanced, == 20K starts at 0x8000 */
-+ { "avr7", ARCH_AVR7, NULL, 0, 0x0200, "a5831" },
-+ { "ata5831", ARCH_AVR7, "__AVR_ATA5831__", 0, 0x0200, "a5831" },
- /* Enhanced, == 256K. */
- /* Xmega, <= 8K FLASH. */
- /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
-diff -Naurp gcc/config/avr/avr.h gcc-4.6.2-src/gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2012-04-20 18:52:19.000000000 +0530
-+++ gcc/config/avr/avr.h 2012-04-20 18:52:59.000000000 +0530
-@@ -79,6 +79,7 @@ enum avr_arch
- ARCH_AVR5,
- ARCH_AVR51,
- ARCH_AVR6,
-+ ARCH_AVR7,
- ARCH_AVRXMEGA1,
- ARCH_AVRXMEGA2,
- ARCH_AVRXMEGA3,
-diff -Naurp gcc-4.6.2-base/gcc/config/avr/t-avr gcc-4.6.2-src/gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-04-20 18:52:19.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-04-20 18:52:59.000000000 +0530
-@@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
-
- FPBIT = fp-bit.c
-
--MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7/mmcu=avrtiny10
--MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny10
-+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avr7/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7/mmcu=avrtiny10
-+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avr7 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny10
-
- # The many avr2 matches are not listed here - this is the default.
- MULTILIB_MATCHES = \
-@@ -288,6 +288,7 @@ MULTILIB_MATCHES = \
- mmcu?avr6=mmcu?atmega256rfr2 \
- mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561 \
-+ mmcu?avr7=mmcu?ata5831 \
- mmcu?avrxmega2=mmcu?atmxt112sl \
- mmcu?avrxmega2=mmcu?atmxt224 \
- mmcu?avrxmega2=mmcu?atmxt224e \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-06-12 11:41:02.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-06-12 11:48:03.000000000 +0530
-@@ -99,6 +99,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" },
- { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0x0100, "tn88" },
- { "attiny828", ARCH_AVR25, "__AVR_ATtiny828__", 0, 0x0100, "tn828" },
-+ { "attiny841", ARCH_AVR25, "__AVR_ATtiny841__", 0, 0x0100, "tn841" },
- { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 1, 0x0060, "86401" },
- /* Classic, > 8K, <= 64K +2-byte PC + { JMP/CALL }. */
- { "avr3", ARCH_AVR3, NULL, 0, 0x0060, "43355" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-06-12 11:41:02.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-06-12 11:45:26.000000000 +0530
-@@ -140,6 +140,7 @@ MULTILIB_MATCHES = \
- mmcu?avr25=mmcu?attiny48 \
- mmcu?avr25=mmcu?attiny88 \
- mmcu?avr25=mmcu?attiny828 \
-+ mmcu?avr25=mmcu?attiny841 \
- mmcu?avr25=mmcu?at86rf401 \
- mmcu?avr3=mmcu?at43usb355 \
- mmcu?avr3=mmcu?at76c711 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-10-16 16:56:11.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-10-16 16:55:50.000000000 +0530
-@@ -291,6 +291,9 @@ const struct mcu_type_s avr_mcu_types[]
- { "atxmega32a4u", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4U__", 0, 0x2000, "x32a4u" },
- { "atxmega32c4", ARCH_AVRXMEGA2, "__AVR_ATxmega32C4__", 0, 0x2000, "x32c4" },
- { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
-+ { "atxmega16e5", ARCH_AVRXMEGA2, "__AVR_ATxmega16E5__", 0, 0x2000, "x16e5" },
-+ { "atxmega8e5", ARCH_AVRXMEGA2, "__AVR_ATxmega8E5__", 0, 0x2000, "x8e5" },
-+ { "atxmega32e5", ARCH_AVRXMEGA2, "__AVR_ATxmega32E5__", 0, 0x2000, "x32e5" },
- { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
- /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
- /* { "avrxmega3", ARCH_AVRXMEGA3, NULL }, */
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-10-16 16:56:11.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-10-16 16:55:50.000000000 +0530
-@@ -300,6 +300,9 @@ MULTILIB_MATCHES = \
- mmcu?avrxmega2=mmcu?atxmega16d4 \
- mmcu?avrxmega2=mmcu?atxmega32c4 \
- mmcu?avrxmega2=mmcu?atxmega32d4 \
-+ mmcu?avrxmega2=mmcu?atxmega32e5 \
-+ mmcu?avrxmega2=mmcu?atxmega16e5 \
-+ mmcu?avrxmega2=mmcu?atxmega8e5 \
- mmcu?avrxmega2=mmcu?atxmega32a4 \
- mmcu?avrxmega2=mmcu?atxmega32a4u \
- mmcu?avrxmega2=mmcu?atxmega32x1 \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-10-28 15:06:06.000000000 +0530
-+++ gcc/config/avr/avr.c 2011-10-28 15:10:36.000000000 +0530
-@@ -3474,8 +3474,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- AS2 (out,%m0-%2,%A1));
- }
- if (AVR_XMEGA)
-- return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
-- AS2 (sts,%B0,%B1));
-+ return *l = 4, (AS2 (sts,%m0,%A1) CR_TAB
-+ AS2 (sts,%m0+1,%B1));
- else
- return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
- AS2 (sts,%m0,%A1));
--- /dev/null
+diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
+--- gcc/config/avr/avr.c 2012-11-09 19:05:47.000000000 +0530
++++ gcc/config/avr/avr.c 2012-11-14 13:57:13.000000000 +0530
+@@ -2801,6 +2801,35 @@ avr_out_xload (rtx insn ATTRIBUTE_UNUSED
+ return "";
+ }
+
++/*
++AVRTC-579
++if operand is symbol or constant expression with value > 0xbf
++ return false, otherwise true
++This check is used to avoid lds/sts instruction with invalid memory
++access range (valid range 0x40..0xbf). For io operand range 0x0..0x3f,
++in/out instruction will be generated.
++*/
++bool tiny_valid_direct_memory_access_range(rtx op, enum machine_mode mode)
++{
++ rtx x;
++
++ if (!AVR_TINY)
++ return true;
++
++ x = XEXP(op,0);
++
++ if (MEM_P(op) && x && (GET_CODE(x) == SYMBOL_REF))
++ {
++ return false;
++ }
++ if (MEM_P(op) && x && (CONSTANT_ADDRESS_P (x)) &&
++ !(IN_RANGE (INTVAL (x), 0, 0xC0 - GET_MODE_SIZE (mode))))
++ {
++ return false;
++ }
++
++ return true;
++}
+
+ const char*
+ output_movqi (rtx insn, rtx operands[], int *real_l)
+@@ -2956,9 +2985,10 @@ out_movqi_r_mr (rtx insn, rtx op[], int
+
+ if (CONSTANT_ADDRESS_P (x))
+ {
++ int n_words = AVR_TINY ? 1 : 2;
+ return optimize > 0 && io_address_operand (x, QImode)
+ ? avr_asm_len ("in %0,%i1", op, plen, -1)
+- : avr_asm_len ("lds %0,%m1", op, plen, -2);
++ : avr_asm_len ("lds %0,%m1", op, plen, -n_words);
+ }
+
+
+@@ -3213,12 +3243,13 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+ }
+ else if (CONSTANT_ADDRESS_P (base))
+ {
++ int n_words = AVR_TINY ? 2 : 4;
+ return optimize > 0 && io_address_operand (base, HImode)
+ ? avr_asm_len ("in %A0,%i1" CR_TAB
+ "in %B0,%i1+1", op, plen, -2)
+
+ : avr_asm_len ("lds %A0,%m1" CR_TAB
+- "lds %B0,%m1+1", op, plen, -4);
++ "lds %B0,%m1+1", op, plen, -n_words);
+ }
+
+ fatal_insn ("unknown move insn:",insn);
+@@ -3478,10 +3509,24 @@ out_movsi_r_mr (rtx insn, rtx op[], int
+ "ld %C0,%1" CR_TAB
+ "ld %D0,%1");
+ else if (CONSTANT_ADDRESS_P (base))
+- return *l=8, ("lds %A0,%m1" CR_TAB
+- "lds %B0,%m1+1" CR_TAB
+- "lds %C0,%m1+2" CR_TAB
+- "lds %D0,%m1+3");
++ {
++ if (io_address_operand (base, SImode))
++ {
++ *l = 4;
++ return ("in %A0,%i1" CR_TAB
++ "in %B0,%i1+1" CR_TAB
++ "in %C0,%i1+2" CR_TAB
++ "in %D0,%i1+3");
++ }
++ else
++ {
++ *l = AVR_TINY ? 4 : 8;
++ return ("lds %A0,%m1" CR_TAB
++ "lds %B0,%m1+1" CR_TAB
++ "lds %C0,%m1+2" CR_TAB
++ "lds %D0,%m1+3");
++ }
++ }
+
+ fatal_insn ("unknown move insn:",insn);
+ return "";
+@@ -3608,10 +3653,24 @@ out_movsi_mr_r (rtx insn, rtx op[], int
+ l = &tmp;
+
+ if (CONSTANT_ADDRESS_P (base))
+- return *l=8,("sts %m0,%A1" CR_TAB
+- "sts %m0+1,%B1" CR_TAB
+- "sts %m0+2,%C1" CR_TAB
+- "sts %m0+3,%D1");
++ {
++ if (io_address_operand (base, SImode))
++ {
++ return *l=4,("out %i0, %A1" CR_TAB
++ "out %i0+1,%B1" CR_TAB
++ "out %i0+2,%C1" CR_TAB
++ "out %i0+3,%D1");
++ }
++ else
++ {
++ *l = AVR_TINY ? 4 : 8;
++ return ("sts %m0,%A1" CR_TAB
++ "sts %m0+1,%B1" CR_TAB
++ "sts %m0+2,%C1" CR_TAB
++ "sts %m0+3,%D1");
++ }
++ }
++
+ if (reg_base > 0) /* (r) */
+ {
+ if (AVR_TINY)
+@@ -4031,9 +4090,12 @@ avr_out_load_psi (rtx insn, rtx *op, int
+ "ld %C0,%1", op, plen, -3);
+
+ else if (CONSTANT_ADDRESS_P (base))
++ {
++ int n_words = AVR_TINY ? 3 : 6;
+ return avr_asm_len ("lds %A0,%m1" CR_TAB
+ "lds %B0,%m1+1" CR_TAB
+- "lds %C0,%m1+2", op, plen , -6);
++ "lds %C0,%m1+2", op, plen , -n_words);
++ }
+
+ fatal_insn ("unknown move insn:",insn);
+ return "";
+@@ -4129,9 +4191,12 @@ avr_out_store_psi (rtx insn, rtx *op, in
+ int reg_base = true_regnum (base);
+
+ if (CONSTANT_ADDRESS_P (base))
++ {
++ int n_words = AVR_TINY ? 3 : 6;
+ return avr_asm_len ("sts %m0,%A1" CR_TAB
+ "sts %m0+1,%B1" CR_TAB
+- "sts %m0+2,%C1", op, plen, -6);
++ "sts %m0+2,%C1", op, plen, -n_words);
++ }
+
+ if (reg_base > 0) /* (r) */
+ {
+@@ -4314,9 +4379,10 @@ out_movqi_mr_r (rtx insn, rtx op[], int
+
+ if (CONSTANT_ADDRESS_P (x))
+ {
++ int n_words = AVR_TINY ? 1 : 2;
+ return optimize > 0 && io_address_operand (x, QImode)
+ ? avr_asm_len ("out %i0,%1", op, plen, -1)
+- : avr_asm_len ("sts %m0,%1", op, plen, -2);
++ : avr_asm_len ("sts %m0,%1", op, plen, -n_words);
+ }
+ else if (GET_CODE (x) == PLUS
+ && REG_P (XEXP (x, 0))
+@@ -4389,12 +4455,15 @@ avr_out_movhi_mr_r_xmega (rtx insn, rtx
+ int mem_volatile_p = MEM_VOLATILE_P (dest);
+
+ if (CONSTANT_ADDRESS_P (base))
++ {
++ int n_words = AVR_TINY ? 2 : 4;
+ return optimize > 0 && io_address_operand (base, HImode)
+ ? avr_asm_len ("out %i0,%A1" CR_TAB
+ "out %i0+1,%B1", op, plen, -2)
+
+ : avr_asm_len ("sts %m0,%A1" CR_TAB
+- "sts %m0+1,%B1", op, plen, -4);
++ "sts %m0+1,%B1", op, plen, -n_words);
++ }
+
+ if (reg_base > 0)
+ {
+@@ -4574,12 +4643,15 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+ mem_volatile_p = MEM_VOLATILE_P (dest);
+
+ if (CONSTANT_ADDRESS_P (base))
++ {
++ int n_words = AVR_TINY ? 2 : 4;
+ return optimize > 0 && io_address_operand (base, HImode)
+ ? avr_asm_len ("out %i0+1,%B1" CR_TAB
+ "out %i0,%A1", op, plen, -2)
+
+ : avr_asm_len ("sts %m0+1,%B1" CR_TAB
+- "sts %m0,%A1", op, plen, -4);
++ "sts %m0,%A1", op, plen, -n_words);
++ }
+
+ if (reg_base > 0)
+ {
+diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
+--- gcc/config/avr/avr.md 2012-11-09 19:05:47.000000000 +0530
++++ gcc/config/avr/avr.md 2012-11-14 13:57:13.000000000 +0530
+@@ -629,6 +629,32 @@
+ DONE;
+ }
+
++ /* AVRTC-579
++ if the source operand expression is out of range for 'lds' instruction
++ copy source operand expression to register
++ For tiny core, LDS instruction's memory access range limited to 0x40..0xbf
++ */
++ if (!tiny_valid_direct_memory_access_range(src,<MODE>mode))
++ {
++ rtx srcx = XEXP(src,0);
++ operands[1] = src = replace_equiv_address (src,copy_to_mode_reg (GET_MODE(srcx),srcx));
++ emit_move_insn(dest,src);
++ DONE;
++ }
++
++ /* AVRTC-579
++ if the destination operand expression is out of range for 'sts' instruction
++ copy destination operand expression to register
++ For tiny core, STS instruction's memory access range limited to 0x40..0xbf
++ */
++ if (!tiny_valid_direct_memory_access_range(dest,<MODE>mode))
++ {
++ rtx destx = XEXP(dest,0);
++ operands[0] = dest = replace_equiv_address (dest,copy_to_mode_reg (GET_MODE(destx),destx));
++ emit_move_insn(dest,src);
++ DONE;
++ }
++
+ /* ; The only address-space for which we use plain MEM and reload
+ ; machinery are 1-byte loads from __flash. */
+ })
+@@ -645,9 +671,14 @@
+ (define_insn "movqi_insn"
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=r ,d,Qm,r ,q,r,*r")
+ (match_operand:QI 1 "nox_general_operand" "rL,i,rL,Qm,r,q,i"))]
+- "register_operand (operands[0], QImode)
++ "(register_operand (operands[0], QImode)
+ || register_operand (operands[1], QImode)
+- || const0_rtx == operands[1]"
++ || const0_rtx == operands[1]) &&
++ /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
++ though access range is checked during define_expand, it is required
++ here to avoid merging rtls during combine pass */
++ tiny_valid_direct_memory_access_range(operands[0],QImode) &&
++ tiny_valid_direct_memory_access_range(operands[1],QImode)"
+ {
+ return output_movqi (insn, operands, NULL);
+ }
+@@ -732,9 +763,14 @@
+ (define_insn "*movhi"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m ,d,*r,q,r")
+ (match_operand:HI 1 "nox_general_operand" "r,L,m,rL,i,i ,r,q"))]
+- "register_operand (operands[0], HImode)
++ "(register_operand (operands[0], HImode)
+ || register_operand (operands[1], HImode)
+- || const0_rtx == operands[1]"
++ || const0_rtx == operands[1]) &&
++ /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
++ though access range is checked during define_expand, it is required
++ here to avoid merging rtls during combine pass */
++ tiny_valid_direct_memory_access_range(operands[0],HImode) &&
++ tiny_valid_direct_memory_access_range(operands[1],HImode)"
+ {
+ return output_movhi (insn, operands, NULL);
+ }
+@@ -842,9 +878,15 @@
+ (define_insn "*movsi"
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,Qm,!d,r")
+ (match_operand:SI 1 "nox_general_operand" "r,L,Qm,rL,i ,i"))]
+- "register_operand (operands[0], SImode)
++ "((register_operand (operands[0], SImode)
+ || register_operand (operands[1], SImode)
+- || const0_rtx == operands[1]"
++ || const0_rtx == operands[1]) &&
++ /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
++ though access range is checked during define_expand, it is required
++ here to avoid merging rtls during combine pass */
++ tiny_valid_direct_memory_access_range(operands[0],SImode) &&
++ tiny_valid_direct_memory_access_range(operands[1],SImode))
++ "
+ {
+ return output_movsisf (insn, operands, NULL);
+ }
+@@ -858,9 +900,15 @@
+ (define_insn "*movsf"
+ [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r ,Qm,!d,r")
+ (match_operand:SF 1 "nox_general_operand" "r,G,Qm,rG,F ,F"))]
+- "register_operand (operands[0], SFmode)
++ "((register_operand (operands[0], SFmode)
+ || register_operand (operands[1], SFmode)
+- || operands[1] == CONST0_RTX (SFmode)"
++ || operands[1] == CONST0_RTX (SFmode)) &&
++ /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
++ though access range is checked during define_expand, it is required
++ here to avoid merging rtls during combine pass */
++ tiny_valid_direct_memory_access_range(operands[0],SFmode) &&
++ tiny_valid_direct_memory_access_range(operands[1],SFmode))
++ "
+ {
+ return output_movsisf (insn, operands, NULL);
+ }
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2012-04-23 11:17:05.000000000 +0530
-+++ gcc/config/avr/avr.h 2012-04-23 11:17:24.000000000 +0530
-@@ -137,7 +137,7 @@ extern GTY(()) section *progmem_section;
- #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
- #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
-
--#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
-+#define AVR_IO_OFFSET ((AVR_XMEGA || AVR_TINY) ? 0 : 0x20)
- #define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
- #define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
- #define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
-diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
---- gcc/config/avr/predicates.md 2012-04-23 11:07:59.000000000 +0530
-+++ gcc/config/avr/predicates.md 2012-04-23 11:17:24.000000000 +0530
-@@ -50,21 +50,24 @@
- ;; Return true if OP is a valid address for lower half of I/O space.
- (define_predicate "low_io_address_operand"
- (and (match_code "const_int")
-- (if_then_else (match_test "AVR_XMEGA")
-+ (if_then_else (ior (match_test "AVR_XMEGA")
-+ (match_test "AVR_TINY"))
- (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
-
- ;; Return true if OP is a valid address for high half of I/O space.
- (define_predicate "high_io_address_operand"
- (and (match_code "const_int")
-- (if_then_else (match_test "AVR_XMEGA")
-+ (if_then_else (ior (match_test "AVR_XMEGA")
-+ (match_test "AVR_TINY"))
- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
- (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
-
- ;; Return true if OP is a valid address of I/O space.
- (define_predicate "io_address_operand"
- (and (match_code "const_int")
-- (if_then_else (match_test "AVR_XMEGA")
-+ (if_then_else (ior (match_test "AVR_XMEGA")
-+ (match_test "AVR_TINY"))
- (match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))))
-
+++ /dev/null
-diff -raupN gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2011-07-08 10:58:56.000000000 +0530
-+++ gcc/config/avr/avr.md 2011-07-08 12:04:01.000000000 +0530
-@@ -1079,8 +1079,8 @@
- (set_attr "cc" "clobber")])
-
- (define_expand "<any_extend:u>mulhisi3"
-- [(set (reg:HI 18) (match_operand:SI 1 "register_operand" ""))
-- (set (reg:HI 20) (match_operand:SI 2 "register_operand" ""))
-+ [(set (reg:HI 18) (match_operand:HI 1 "register_operand" ""))
-+ (set (reg:HI 20) (match_operand:HI 2 "register_operand" ""))
- (set (reg:SI 22)
- (mult:SI (any_extend:SI (reg:HI 18))
- (any_extend:SI (reg:HI 20))))
--- /dev/null
+diff -Naurp gcc/alias.c gcc/alias.c
+--- gcc/alias.c 2012-03-01 22:28:11.000000000 +0530
++++ gcc/alias.c 2012-11-06 15:25:38.000000000 +0530
+@@ -1595,6 +1595,9 @@ find_base_term (rtx x)
+ if (!val)
+ return ret;
+
++ if (cselib_sp_based_value_p (val))
++ return static_reg_base_value[STACK_POINTER_REGNUM];
++
+ f = val->locs;
+ /* Temporarily reset val->locs to avoid infinite recursion. */
+ val->locs = NULL;
+diff -Naurp gcc/cselib.c gcc/cselib.c
+--- gcc/cselib.c 2012-03-01 22:28:11.000000000 +0530
++++ gcc/cselib.c 2012-11-06 15:25:38.000000000 +0530
+@@ -209,6 +209,9 @@ void (*cselib_record_sets_hook) (rtx ins
+ #define PRESERVED_VALUE_P(RTX) \
+ (RTL_FLAG_CHECK1("PRESERVED_VALUE_P", (RTX), VALUE)->unchanging)
+
++#define SP_BASED_VALUE_P(RTX) \
++ (RTL_FLAG_CHECK1("SP_BASED_VALUE_P", (RTX), VALUE)->jump)
++
+ \f
+
+ /* Allocate a struct elt_list and fill in its two elements with the
+@@ -738,6 +741,23 @@ cselib_preserve_only_values (void)
+ gcc_assert (first_containing_mem == &dummy_val);
+ }
+
++/* Arrange for a value to be marked as based on stack pointer
++ for find_base_term purposes. */
++
++void
++cselib_set_value_sp_based (cselib_val *v)
++{
++ SP_BASED_VALUE_P (v->val_rtx) = 1;
++}
++
++/* Test whether a value is preserved. */
++
++bool
++cselib_sp_based_value_p (cselib_val *v)
++{
++ return SP_BASED_VALUE_P (v->val_rtx);
++}
++
+ /* Return the mode in which a register was last set. If X is not a
+ register, return its mode. If the mode in which the register was
+ set is not known, or the value was already clobbered, return
+diff -Naurp gcc/cselib.h gcc/cselib.h
+--- gcc/cselib.h 2012-03-01 22:28:11.000000000 +0530
++++ gcc/cselib.h 2012-11-06 15:25:38.000000000 +0530
+@@ -99,6 +99,8 @@ extern void cselib_preserve_only_values
+ extern void cselib_preserve_cfa_base_value (cselib_val *, unsigned int);
+ extern void cselib_add_permanent_equiv (cselib_val *, rtx, rtx);
+ extern bool cselib_have_permanent_equivalences (void);
++extern void cselib_set_value_sp_based (cselib_val *);
++extern bool cselib_sp_based_value_p (cselib_val *);
+
+ extern void dump_cselib_table (FILE *);
+
+diff -Naurp gcc/rtl.h gcc/rtl.h
+--- gcc/rtl.h 2012-01-25 00:36:38.000000000 +0530
++++ gcc/rtl.h 2012-11-06 15:25:38.000000000 +0530
+@@ -266,7 +266,8 @@ struct GTY((chain_next ("RTX_NEXT (&%h)"
+ 1 in a CALL_INSN if it is a sibling call.
+ 1 in a SET that is for a return.
+ In a CODE_LABEL, part of the two-bit alternate entry field.
+- 1 in a CONCAT is VAL_EXPR_IS_COPIED in var-tracking.c. */
++ 1 in a CONCAT is VAL_EXPR_IS_COPIED in var-tracking.c.
++ 1 in a VALUE is SP_BASED_VALUE_P in cselib.c. */
+ unsigned int jump : 1;
+ /* In a CODE_LABEL, part of the two-bit alternate entry field.
+ 1 in a MEM if it cannot trap.
+diff -Naurp gcc/testsuite/gcc.dg/guality/pr54796.c gcc/testsuite/gcc.dg/guality/pr54796.c
+--- gcc/testsuite/gcc.dg/guality/pr54796.c 1970-01-01 05:30:00.000000000 +0530
++++ gcc/testsuite/gcc.dg/guality/pr54796.c 2012-11-06 15:25:38.000000000 +0530
+@@ -0,0 +1,25 @@
++/* PR debug/54796 */
++/* { dg-do run } */
++/* { dg-options "-g" } */
++
++__attribute__((noinline, noclone)) void
++bar (char *a, int b)
++{
++ __asm volatile ("" : "+r" (a), "+r" (b) : : "memory");
++}
++
++__attribute__((noinline, noclone)) void
++foo (int a, int b)
++{
++ int c = a;
++ char d[b]; /* { dg-final { gdb-test 17 "a" "5" } } */
++ bar (d, 2); /* { dg-final { gdb-test 17 "b" "6" } } */
++ bar (d, 4); /* { dg-final { gdb-test 17 "c" "5" } } */
++}
++
++int
++main ()
++{
++ foo (5, 6);
++ return 0;
++}
+diff -Naurp gcc/var-tracking.c gcc/var-tracking.c
+--- gcc/var-tracking.c 2012-02-25 17:39:27.000000000 +0530
++++ gcc/var-tracking.c 2012-11-06 15:25:38.000000000 +0530
+@@ -5521,6 +5521,11 @@ add_stores (rtx loc, const_rtx expr, voi
+
+ resolve = preserve = !cselib_preserved_value_p (v);
+
++ if (loc == stack_pointer_rtx
++ && hard_frame_pointer_adjustment != -1
++ && preserve)
++ cselib_set_value_sp_based (v);
++
+ nloc = replace_expr_with_values (oloc);
+ if (nloc)
+ oloc = nloc;
+@@ -9446,6 +9451,19 @@ vt_initialize (void)
+ {
+ vt_init_cfa_base ();
+ hard_frame_pointer_adjustment = fp_cfa_offset;
++ /* Disassociate sp from fp now. */
++ if (MAY_HAVE_DEBUG_INSNS)
++ {
++ cselib_val *v;
++ cselib_invalidate_rtx (stack_pointer_rtx);
++ v = cselib_lookup (stack_pointer_rtx, Pmode, 1,
++ VOIDmode);
++ if (v && !cselib_preserved_value_p (v))
++ {
++ cselib_set_value_sp_based (v);
++ preserve_value (v);
++ }
++ }
+ }
+ }
+ }
--- /dev/null
+diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
+--- gcc/config/avr/avr.c 2012-12-06 19:22:10.000000000 +0530
++++ gcc/config/avr/avr.c 2012-12-06 19:23:44.000000000 +0530
+@@ -169,7 +169,7 @@ static bool avr_rtx_costs (rtx, int, int
+ #define FIRST_CUM_REG 26
+
+ /* Last call saved register */
+-#define LAST_CALLEE_SAVED_REG (AVR_TINY ? 21 : 17)
++#define LAST_CALLEE_SAVED_REG (AVR_TINY ? 19 : 17)
+
+ /* Implicit target register of LPM instruction (R0) */
+ extern GTY(()) rtx lpm_reg_rtx;
+@@ -7451,7 +7451,8 @@ avr_assemble_integer (rtx x, unsigned in
+ static bool
+ avr_class_likely_spilled_p (reg_class_t c)
+ {
+- return (c != ALL_REGS && c != ADDW_REGS);
++ return (c != ALL_REGS &&
++ (AVR_TINY ? 1 : c != ADDW_REGS));
+ }
+
+ /* Valid attributes:
+@@ -8168,12 +8169,13 @@ order_regs_for_local_alloc (void)
+ 32,33,34,35
+ };
+ static const int tiny_order_0[] = {
+- 24,25,
++ 20,21,
+ 22,23,
++ 24,25,
+ 30,31,
+ 26,27,
+ 28,29,
+- 21,20,19,18,
++ 19,18,
+ 16,17,
+ 32,33,34,35,
+ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
+@@ -8220,7 +8222,7 @@ order_regs_for_local_alloc (void)
+ devices has only 16 registers, so different allocation order should be used
+ */
+ const int *order = (TARGET_ORDER_1 ? (AVR_TINY ? tiny_order_1 : order_1) :
+- TARGET_ORDER_2 ? (AVR_TINY ? tiny_order_1 : order_2) :
++ TARGET_ORDER_2 ? (AVR_TINY ? tiny_order_0 : order_2) :
+ (AVR_TINY ? tiny_order_0 : order_0));
+
+ for (i=0; i < ARRAY_SIZE (order_0); ++i)
+@@ -10090,12 +10092,13 @@ avr_conditional_register_usage(void) {
+ unsigned int i;
+
+ const int tiny_reg_alloc_order[] = {
+- 24,25,
++ 20,21,
+ 22,23,
++ 24,25,
+ 30,31,
+ 26,27,
+ 28,29,
+- 21,20,19,18,
++ 19,18,
+ 16,17,
+ 32,33,34,35,
+ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-03-27 16:11:43.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-03-28 11:36:52.000000000 +0530
-@@ -38,14 +38,14 @@ const struct base_arch_s avr_arch_types[
- { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
- { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0200, "__AVR_ARCH__=7", "avr7" },
-+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=100", "avrtiny10" },
- { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
- { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
- { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
- { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
- { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
- { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
-- { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" },
-- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=201", "avrtiny10" }
-+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
- };
-
- /* List of all known AVR MCU types - if updated, it has to be kept
-diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2012-03-27 16:44:27.000000000 +0530
-+++ gcc/config/avr/avr.h 2012-03-28 11:38:15.000000000 +0530
-@@ -80,14 +80,14 @@ enum avr_arch
- ARCH_AVR51,
- ARCH_AVR6,
- ARCH_AVR7,
-+ ARCH_AVRTINY10,
- ARCH_AVRXMEGA1,
- ARCH_AVRXMEGA2,
- ARCH_AVRXMEGA3,
- ARCH_AVRXMEGA4,
- ARCH_AVRXMEGA5,
- ARCH_AVRXMEGA6,
-- ARCH_AVRXMEGA7,
-- ARCH_AVRTINY10
-+ ARCH_AVRXMEGA7
- };
-
- struct mcu_type_s {
--- /dev/null
+diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
+--- gcc/config/avr/avr.h
++++ gcc/config/avr/avr.h
+@@ -627,7 +627,8 @@ extern const char *avr_device_to_sp8 (in
+ #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
+ mmcu=*:-mmcu=%*} \
+ %{mmcu=*:%{!mmcu=avr2:%{!mmcu=at90s8515:%{!mmcu=avr31:%{!mmcu=atmega103:\
+--mno-skip-bug}}}}}"
++-mno-skip-bug}}}}} \
++%{mrelax:-mlink-relax}"
+
+ #define LINK_SPEC "\
+ %{mrelax:--relax\
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-04-23 11:22:39.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-04-23 11:26:15.000000000 +0530
-@@ -96,6 +96,7 @@ static struct machine_function * avr_ini
- static void avr_init_builtins (void);
- static rtx avr_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
- static rtx avr_builtin_setjmp_frame_value (void);
-+static void avr_conditional_register_usage (void);
- static bool avr_hard_regno_scratch_ok (unsigned int);
- static unsigned int avr_case_values_threshold (void);
- static bool avr_frame_pointer_required_p (void);
-@@ -212,6 +213,8 @@ static const struct default_options avr_
- #undef TARGET_BUILTIN_SETJMP_FRAME_VALUE
- #define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value
-
-+#undef TARGET_CONDITIONAL_REGISTER_USAGE
-+#define TARGET_CONDITIONAL_REGISTER_USAGE avr_conditional_register_usage
- #undef TARGET_HARD_REGNO_SCRATCH_OK
- #define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok
- #undef TARGET_CASE_VALUES_THRESHOLD
-@@ -7388,6 +7391,19 @@ avr_output_addr_vec_elt (FILE *stream, i
- fprintf (stream, "\trjmp .L%d\n", value);
- }
-
-+static void
-+avr_conditional_register_usage(void) {
-+ if (AVR_TINY) {
-+ int i;
-+ for (i = 0; i <= 17; i++) {
-+ fixed_regs[i] = 1;
-+ call_used_regs[i] = 1;
-+ }
-+ CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]);
-+ CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]);
-+ }
-+}
-+
- /* Returns true if SCRATCH are safe to be allocated as a scratch
- registers (for a define_peephole2) in the current function. */
-
-diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2012-04-23 11:25:46.000000000 +0530
-+++ gcc/config/avr/avr.h 2012-04-23 11:26:15.000000000 +0530
-@@ -314,41 +314,6 @@ enum reg_class {
- {0xffffffff,0x00000003} /* ALL_REGS */ \
- }
-
--/* Zero or more C statements that may conditionally modify five variables
-- fixed_regs, call_used_regs, global_regs, reg_names, and reg_class_contents,
-- to take into account any dependence of these register sets on target flags.
-- The first three of these are of type char [] (interpreted as Boolean
-- vectors). global_regs is a const char *[], and reg_class_contents is a
-- HARD_REG_SET. Before the macro is called, fixed_regs, call_used_regs,
-- reg_class_contents, and reg_names have been initialized from
-- FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS, and
-- REGISTER_NAMES, respectively. global_regs has been cleared, and any
-- \91-ffixed-reg\92, \91-fcall-used-reg\92 and \91-fcall-saved-reg\92 command options
-- have been applied.
--
-- You need not define this macro if it has no work to do.
--
-- If the usage of an entire class of registers depends on the target flags,
-- you may indicate this to GCC by using this macro to modify fixed_regs and
-- call_used_regs to 1 for each of the registers in the classes which should
-- not be used by GCC. Also define the macro REG_CLASS_FROM_LETTER /
-- REG_CLASS_FROM_CONSTRAINT to return NO_REGS if it is called with a letter
-- for a class that shouldn\92t be used. (However, if this class is not included
-- in GENERAL_REGS and all of the insn patterns whose constraints permit this
-- class are controlled by target switches, then GCC will automatically avoid
-- using these registers when the target switches are opposed to them.) */
--
--#define CONDITIONAL_REGISTER_USAGE \
-- if (AVR_TINY) { \
-- int i; \
-- for (i = 0; i <= 17; i++) { \
-- fixed_regs[i] = 1; \
-- call_used_regs[i] = 1; \
-- } \
-- CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]); \
-- CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]); \
-- }
--
- #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
-
- /* The following macro defines cover classes for Integrated Register
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2012-04-13 11:19:25.000000000 +0530
-+++ gcc/config/avr/avr.md 2012-04-13 13:21:49.000000000 +0530
-@@ -72,7 +72,8 @@
- (UNSPECV_DELAY_CYCLES_1 101)
- (UNSPECV_DELAY_CYCLES_2 102)
- (UNSPECV_DELAY_CYCLES_3 103)
-- (UNSPECV_DELAY_CYCLES_4 104)])
-+ (UNSPECV_DELAY_CYCLES_4 104)
-+ (UNSPECV_DELAY_CYCLES_2_TINY 105)])
-
- (include "predicates.md")
- (include "constraints.md")
-@@ -3370,7 +3371,12 @@
- if (loop_count > 0xFFFF)
- loop_count = 0xFFFF;
- unsigned int cycles_used = (((loop_count - 1) * 4) + 5);
-- emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
-+ if (AVR_TINY) {
-+ emit_insn (gen_delay_cycles_2_tiny (gen_int_mode (loop_count, HImode)));
-+ }
-+ else {
-+ emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
-+ }
- cycles -= cycles_used;
- }
- if (IN_RANGE(cycles, 6, 767))
-@@ -3418,6 +3424,19 @@
- [(set_attr "length" "4")
- (set_attr "cc" "clobber")])
-
-+(define_insn "delay_cycles_2_tiny"
-+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_2_TINY)
-+ (match_operand:HI 0 "immediate_operand" "")
-+ (clobber (match_scratch:HI 1 "=&d"))]
-+ ""
-+ " ldi %A1,lo8(%0)
-+ ldi %B1,hi8(%0)
-+ 1:subi %A1,1
-+ sbci %B1,0
-+ brne 1b"
-+ [(set_attr "length" "5")
-+ (set_attr "cc" "clobber")])
-+
- (define_insn "delay_cycles_3"
- [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_3)
- (match_operand:SI 0 "immediate_operand" "")
--- /dev/null
+diff -Naurp libgcc/config/avr/lib1funcs.S libgcc/config/avr/lib1funcs.S
+--- libgcc/config/avr/lib1funcs.S 2013-01-21 18:58:03.000000000 +0530
++++ libgcc/config/avr/lib1funcs.S 2013-01-21 19:12:51.000000000 +0530
+@@ -2010,7 +2010,21 @@ ENDF __do_clear_bss
+ #ifdef L_ctors
+ .section .init6,"ax",@progbits
+ DEFUN __do_global_ctors
+-#if defined(__AVR_HAVE_ELPM__)
++#if defined(__AVR_TINY__)
++ ldi r18, hi8(__ctors_start)
++ ldi r28, lo8(__ctors_end)
++ ldi r29, hi8(__ctors_end)
++ rjmp .L__do_global_ctors_start
++.L__do_global_ctors_loop:
++ wsubi 28, 2
++ mov_h r31, r29
++ mov_l r30, r28
++ XCALL __tablejump__
++.L__do_global_ctors_start:
++ cpi r28, lo8(__ctors_start)
++ cpc r29, r18
++ brne .L__do_global_ctors_loop
++#elif defined(__AVR_HAVE_ELPM__)
+ ldi r17, hi8(__ctors_start)
+ ldi r28, lo8(__ctors_end)
+ ldi r29, hi8(__ctors_end)
+@@ -2035,7 +2049,7 @@ DEFUN __do_global_ctors
+ ldi r29, hi8(__ctors_end)
+ rjmp .L__do_global_ctors_start
+ .L__do_global_ctors_loop:
+- wsubi r28, 2
++ sbiw r28, 2
+ mov_h r31, r29
+ mov_l r30, r28
+ XCALL __tablejump__
+@@ -2050,7 +2064,21 @@ ENDF __do_global_ctors
+ #ifdef L_dtors
+ .section .fini6,"ax",@progbits
+ DEFUN __do_global_dtors
+-#if defined(__AVR_HAVE_ELPM__)
++#if defined(__AVR_TINY__)
++ ldi r18, hi8(__dtors_end)
++ ldi r28, lo8(__dtors_start)
++ ldi r29, hi8(__dtors_start)
++ rjmp .L__do_global_dtors_start
++.L__do_global_dtors_loop:
++ mov_h r31, r29
++ mov_l r30, r28
++ XCALL __tablejump__
++ wsubi 28, -2
++.L__do_global_dtors_start:
++ cpi r28, lo8(__dtors_end)
++ cpc r29, r18
++ brne .L__do_global_dtors_loop
++#elif defined(__AVR_HAVE_ELPM__)
+ ldi r17, hi8(__dtors_end)
+ ldi r28, lo8(__dtors_start)
+ ldi r29, hi8(__dtors_start)
+@@ -2079,7 +2107,7 @@ DEFUN __do_global_dtors
+ mov_l r30, r28
+ XCALL __tablejump__
+ #if defined (__AVR_TINY__)
+- wsubi r28, -2
++ wsubi 28, -2
+ #else
+ adiw r28, 2
+ #endif
+++ /dev/null
-diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
---- gcc/config/avr/libgcc.S 2012-06-12 12:43:40.000000000 +0530
-+++ gcc/config/avr/libgcc.S 2012-06-12 12:44:08.000000000 +0530
-@@ -862,6 +862,12 @@ __do_copy_data:
- cpc r27, r17
- brne .L__do_copy_data_loop
- #endif /* !defined(__AVR_HAVE_ELPMX__) && !defined(__AVR_HAVE_ELPM__) */
-+
-+;Clear RAMPZ in case it was set during copy_data
-+#if defined(__AVR_HAVE_ELPMX__ ) || defined(__AVR_HAVE_ELPM__)
-+ out __RAMPZ__, __zero_reg__
-+#endif
-+
- #endif /* L_copy_data */
- #endif
-
-@@ -941,6 +947,12 @@ __do_global_ctors:
- cpc r29, r17
- brne .L__do_global_ctors_loop
- #endif /* defined(__AVR_HAVE_RAMPZ__) */
-+
-+;Clear RAMPZ in case it was set
-+#if defined(__AVR_HAVE_RAMPZ__)
-+ out __RAMPZ__, __zero_reg__
-+#endif
-+
- #endif /* L_ctors */
-
- #ifdef L_dtors
-@@ -992,6 +1004,12 @@ __do_global_dtors:
- cpc r29, r17
- brne .L__do_global_dtors_loop
- #endif /* defined(__AVR_HAVE_RAMPZ__) */
-+
-+;Clear RAMPZ in case it was set
-+#if defined(__AVR_HAVE_RAMPZ__)
-+ out __RAMPZ__, __zero_reg__
-+#endif
-+
- #endif /* L_dtors */
-
- #if !defined (__AVR_TINY__)
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-05-31 11:55:38.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-06-15 12:10:49.000000000 +0530
-@@ -738,7 +738,8 @@ expand_prologue (void)
- && !cfun->machine->is_signal
- && !cfun->machine->is_OS_task
- && !cfun->machine->is_OS_main
-- && live_seq);
-+ && live_seq
-+ && !AVR_TINY);
-
- if (cfun->machine->is_interrupt || cfun->machine->is_signal)
- {
-@@ -1068,7 +1069,8 @@ expand_epilogue (void)
- && !cfun->machine->is_signal
- && !cfun->machine->is_OS_task
- && !cfun->machine->is_OS_main
-- && live_seq);
-+ && live_seq
-+ && !AVR_TINY);
-
- if (minimize && (frame_pointer_needed || live_seq > 4))
- {
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2012-06-27 15:36:22.000000000 +0530
-+++ gcc/config/avr/avr.h 2012-06-27 15:38:34.000000000 +0530
-@@ -369,7 +369,7 @@ enum reg_class {
-
- #define ARG_POINTER_REGNUM 34
-
--#define STATIC_CHAIN_REGNUM 2
-+#define STATIC_CHAIN_REGNUM ((AVR_TINY)?18:2)
-
- #define ELIMINABLE_REGS { \
- {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-06-22 15:29:05.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-06-28 12:50:23.000000000 +0530
-@@ -111,6 +111,9 @@ static void avr_help (void);
- /* Allocate registers from r25 to r8 for parameters for function calls. */
- #define FIRST_CUM_REG 26
-
-+/* Last call saved register */
-+#define LAST_CALLEE_SAVED_REG (AVR_TINY ? 21 : 17)
-+
- /* Temporary register RTX (gen_rtx_REG (QImode, TMP_REGNO)) */
- static GTY(()) rtx tmp_reg_rtx;
-
-@@ -611,7 +614,7 @@ sequent_regs_live (void)
- int live_seq=0;
- int cur_seq=0;
-
-- for (reg = 0; reg < 18; ++reg)
-+ for (reg = 0; reg <= LAST_CALLEE_SAVED_REG; ++reg)
- {
- if (fixed_regs[reg])
- {
-@@ -838,11 +841,11 @@ expand_prologue (void)
-
- /* Note that live_seq always contains r28+r29, but the other
- registers to be saved are all below 18. */
-- first_reg = 18 - (live_seq - 2);
-+ first_reg = (LAST_CALLEE_SAVED_REG + 1) - (live_seq - 2);
-
- for (reg = 29, offset = -live_seq + 1;
- reg >= first_reg;
-- reg = (reg == 28 ? 17 : reg - 1), ++offset)
-+ reg = (reg == 28 ? (LAST_CALLEE_SAVED_REG) : reg - 1), ++offset)
- {
- rtx m, r;
-
-@@ -6375,6 +6378,17 @@ order_regs_for_local_alloc (void)
- 0,1,
- 32,33,34,35
- };
-+ static const int tiny_order_0[] = {
-+ 24,25,
-+ 22,23,
-+ 30,31,
-+ 26,27,
-+ 28,29,
-+ 21,20,19,18,
-+ 16,17,
-+ 32,33,34,35,
-+ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
-+ };
- static const int order_1[] = {
- 18,19,
- 20,21,
-@@ -6387,6 +6401,17 @@ order_regs_for_local_alloc (void)
- 0,1,
- 32,33,34,35
- };
-+ static const int tiny_order_1[] = {
-+ 22,23,
-+ 24,25,
-+ 30,31,
-+ 26,27,
-+ 28,29,
-+ 21,20,19,18,
-+ 16,17,
-+ 32,33,34,35,
-+ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
-+ };
- static const int order_2[] = {
- 25,24,
- 23,22,
-@@ -6400,10 +6425,15 @@ order_regs_for_local_alloc (void)
- 1,0,
- 32,33,34,35
- };
--
-- const int *order = (TARGET_ORDER_1 ? order_1 :
-- TARGET_ORDER_2 ? order_2 :
-- order_0);
-+
-+ /*
-+ Select specific register allocation order. Tiny Core (attiny4/5/9/10/20/40)
-+ devices has only 16 registers, so different allocation order should be used
-+ */
-+ const int *order = (TARGET_ORDER_1 ? (AVR_TINY ? tiny_order_1 : order_1) :
-+ TARGET_ORDER_2 ? (AVR_TINY ? tiny_order_1 : order_2) :
-+ (AVR_TINY ? tiny_order_0 : order_0));
-+
- for (i=0; i < ARRAY_SIZE (order_0); ++i)
- reg_alloc_order[i] = order[i];
- }
-@@ -7395,15 +7425,45 @@ avr_output_addr_vec_elt (FILE *stream, i
-
- static void
- avr_conditional_register_usage(void) {
-- if (AVR_TINY) {
-- int i;
-- for (i = 0; i <= 17; i++) {
-- fixed_regs[i] = 1;
-- call_used_regs[i] = 1;
-- }
-- CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]);
-- CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]);
-- }
-+ if (AVR_TINY) {
-+ int i;
-+
-+ const int tiny_reg_alloc_order[] = {
-+ 24,25,
-+ 22,23,
-+ 30,31,
-+ 26,27,
-+ 28,29,
-+ 21,20,19,18,
-+ 16,17,
-+ 32,33,34,35,
-+ 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
-+ };
-+
-+ /* Set R0-R17 as fixed registers. Reset R0-R17 in call used register list
-+ - R0-R15 are not available in Tiny Core devices
-+ - R16 and R17 are fixed registers
-+ */
-+ for (i = 0; i <= 17; i++) {
-+ fixed_regs[i] = 1;
-+ call_used_regs[i] = 1;
-+ }
-+
-+ /* Set R18 to R21 as call used register
-+ - R18, R19, R20 and R21 are the call used registers in Tiny Core devices
-+ */
-+ for (i = 18; i <= LAST_CALLEE_SAVED_REG; i++) {
-+ call_used_regs[i] = 0;
-+ }
-+
-+ /*update register allocation order for Tiny Core devices */
-+ for (i=0; i < ARRAY_SIZE (tiny_reg_alloc_order); i++) {
-+ reg_alloc_order[i] = tiny_reg_alloc_order[i];
-+ }
-+
-+ CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]);
-+ CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]);
-+ }
- }
-
- /* Returns true if SCRATCH are safe to be allocated as a scratch
-@@ -7553,13 +7613,20 @@ avr_asm_out_dtor (rtx symbol, int priori
- static bool
- avr_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
- {
-- if (TYPE_MODE (type) == BLKmode)
-- {
-- HOST_WIDE_INT size = int_size_in_bytes (type);
-- return (size == -1 || size > 8);
-- }
-+ HOST_WIDE_INT size = int_size_in_bytes (type);
-+ HOST_WIDE_INT ret_size_limit = AVR_TINY ? 4 : 8;
-+
-+ /* In avr, there are 8 return registers. But, for Tiny Core
-+ (attiny4/5/9/10/20/40) devices, only 4 registers available.
-+ Return true if size is unknown or greater than the limit */
-+ if ((size == -1) || (size > ret_size_limit))
-+ {
-+ return true;
-+ }
- else
-+ {
- return false;
-+ }
- }
-
- /* Worker function for CASE_VALUES_THRESHOLD. */
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-06-27 15:41:23.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-06-27 15:42:02.000000000 +0530
-@@ -751,15 +751,15 @@ expand_prologue (void)
- emit_insn (gen_enable_interrupt ());
-
- /* Push zero reg. */
-- emit_push_byte (ZERO_REGNO, true);
-+ emit_push_byte ((AVR_TINY)?ZERO_REGNO_AVRTINY10:ZERO_REGNO, true);
-
- /* Push tmp reg. */
-- emit_push_byte (TMP_REGNO, true);
-+ emit_push_byte ((AVR_TINY)?TMP_REGNO_AVRTINY10:TMP_REGNO, true);
-
- /* Push SREG. */
- /* ??? There's no dwarf2 column reserved for SREG. */
- emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
-- emit_push_byte (TMP_REGNO, false);
-+ emit_push_byte ((AVR_TINY)?TMP_REGNO_AVRTINY10:TMP_REGNO, false);
-
- /* Push RAMPD, RAMPX, RAMPY. */
- /*
-@@ -1217,16 +1217,16 @@ expand_epilogue (void)
- }
-
- /* Restore SREG using tmp reg as scratch. */
-- emit_pop_byte (TMP_REGNO);
-+ emit_pop_byte ((AVR_TINY)?TMP_REGNO_AVRTINY10:TMP_REGNO);
-
- emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)),
- tmp_reg_rtx);
-
- /* Restore tmp REG. */
-- emit_pop_byte (TMP_REGNO);
-+ emit_pop_byte ((AVR_TINY)?TMP_REGNO_AVRTINY10:TMP_REGNO);
-
- /* Restore zero REG. */
-- emit_pop_byte (ZERO_REGNO);
-+ emit_pop_byte ((AVR_TINY)?ZERO_REGNO_AVRTINY10:ZERO_REGNO);
- }
-
- emit_jump_insn (gen_return ());
+++ /dev/null
-diff -Naurp gcc/combine.c gcc/combine.c
---- gcc/combine.c 2011-07-29 14:05:59.000000000 +0530
-+++ gcc/combine.c 2012-06-28 15:51:12.000000000 +0530
-@@ -1666,6 +1666,7 @@ can_combine_p (rtx insn, rtx i3, rtx pre
- rtx link;
- #endif
- bool all_adjacent = true;
-+ int (*is_volatile_p) (const_rtx);
-
- if (succ)
- {
-@@ -1914,11 +1915,17 @@ can_combine_p (rtx insn, rtx i3, rtx pre
- && REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER)
- return 0;
-
-- /* If there are any volatile insns between INSN and I3, reject, because
-- they might affect machine state. */
--
-+ /* If INSN contains volatile references (specifically volatile MEMs),
-+ we cannot combine across any other volatile references.
-+ Even if INSN doesn't contain volatile references, any intervening
-+ volatile insn might affect machine state. */
-+
-+ is_volatile_p = volatile_refs_p (PATTERN (insn))
-+ ? volatile_refs_p
-+ : volatile_insn_p;
-+
- for (p = NEXT_INSN (insn); p != i3; p = NEXT_INSN (p))
-- if (INSN_P (p) && p != succ && p != succ2 && volatile_insn_p (PATTERN (p)))
-+ if (INSN_P (p) && p != succ && p != succ2 && is_volatile_p (PATTERN (p)))
- return 0;
-
- /* If INSN contains an autoincrement or autodecrement, make sure that
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-06-28 15:47:34.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-06-28 15:51:12.000000000 +0530
-@@ -6307,6 +6307,7 @@ avr_encode_section_info (tree decl, rtx
- if (new_decl_p
- && decl && DECL_P (decl)
- && NULL_TREE == DECL_INITIAL (decl)
-+ && !DECL_EXTERNAL (decl)
- && avr_progmem_p (decl, DECL_ATTRIBUTES (decl)))
- {
- warning (OPT_Wuninitialized,
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-07-05 14:23:46.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-07-06 17:30:38.000000000 +0530
-@@ -2191,19 +2191,28 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src)))
-- return *l = 3, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o1-63))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o1-63))) CR_TAB
-- AS2 (subi,r28,lo8(-63)) CR_TAB
-- AS2 (sbci,r29,hi8(-63)) CR_TAB
-- AS2 (ld,%0,Y) CR_TAB
-- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,hi8(63)) CR_TAB
-- AS2 (subi,r28,lo8(%o1-63)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1-63)))
-- : (AS2 (adiw,r28,%o1-63) CR_TAB
-- AS2 (ldd,%0,Y+63) CR_TAB
-- AS2 (sbiw,r28,%o1-63));
--
-+ {
-+ if (AVR_TINY)
-+ {
-+ *l = 9;
-+ return (AS2 (subi,r28,lo8(-(%o1-63))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o1-63))) CR_TAB
-+ AS2 (subi,r28,lo8(-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(-63)) CR_TAB
-+ AS2 (ld,%0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1-63)));
-+ }
-+ else
-+ {
-+ *l = 3;
-+ return (AS2 (adiw,r28,%o1-63) CR_TAB
-+ AS2 (ldd,%0,Y+63) CR_TAB
-+ AS2 (sbiw,r28,%o1-63));
-+ }
-+ }
-
- return *l = 5, (AS2 (subi,r28,lo8(-%o1)) CR_TAB
- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-@@ -2217,38 +2226,75 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- it but I have this situation with extremal optimizing options. */
- if (reg_overlap_mentioned_p (dest, XEXP (x,0))
- || reg_unused_after (insn, XEXP (x,0)))
-- return *l = 2, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%0,X))
-- : (AS2 (adiw,r26,%o1) CR_TAB
-- AS2 (ld,%0,X));
--
-- return *l = 3, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%0,X) CR_TAB
-- AS2 (subi,r26,lo8(%o1)) CR_TAB
-- AS2 (sbci,r27,hi8(%o1)))
-- : (AS2 (adiw,r26,%o1) CR_TAB
-- AS2 (ld,%0,X) CR_TAB
-- AS2 (sbiw,r26,%o1));
-+ {
-+ if (AVR_TINY)
-+ {
-+ *l = 3;
-+ return (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,X));
-+ }
-+ else
-+ {
-+ *l = 2;
-+ return (AS2 (adiw,r26,%o1) CR_TAB
-+ AS2 (ld,%0,X));
-+ }
-+ }
-+
-+ if (AVR_TINY)
-+ {
-+ *l = 5;
-+ return (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,X) CR_TAB
-+ AS2 (subi,r26,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o1)));
-+ }
-+ else
-+ {
-+ *l = 3;
-+ return (AS2 (adiw,r26,%o1) CR_TAB
-+ AS2 (ld,%0,X) CR_TAB
-+ AS2 (sbiw,r26,%o1));
-+ }
- }
-
-- *l = 1;
- op[2] = XEXP(x, 0);
- if(REGNO(op[2]) == REG_Y)
-- return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%0,Y) CR_TAB
-- AS2 (subi,%A2,lo8(%o1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1)))
-- : AS2 (ldd,%0,%1);
-+ {
-+ if (AVR_TINY)
-+ {
-+ *l = 5;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)));
-+ }
-+ else
-+ {
-+ *l = 1;
-+ return (AS2 (ldd,%0,%1));
-+ }
-+ }
- if(REGNO(op[2]) == REG_Z)
-- return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%0,Z) CR_TAB
-- AS2 (subi,%A2,lo8(%o1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1)))
-- : AS2 (ldd,%0,%1);
-+ {
-+ if (AVR_TINY)
-+ {
-+ *l = 5;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)));
-+ }
-+ else
-+ {
-+ *l = 1;
-+ return (AS2 (ldd,%0,%1));
-+ }
-+ }
- }
- *l = 1;
- return AS2 (ld,%0,%1);
-@@ -2287,36 +2333,57 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- return (AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X));
- }
-- *l = 3;
-- return AVR_TINY ? (AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)))
-- : (AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (sbiw,r26,1));
-+
-+ if (AVR_TINY)
-+ {
-+ *l = 4;
-+ return (AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)));
-+ }
-+ else
-+ {
-+ *l = 3;
-+ return (AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (sbiw,r26,1));
-+ }
- }
- else /* (R) */
- {
-- *l = 2;
- if(reg_base == REG_Y)
-- return AVR_TINY ? (AS2 (ld,%A0,%1) CR_TAB
-- AS2 (subi,r28,lo8((-1))) CR_TAB
-- AS2 (sbci,r29,hi8((-1))) CR_TAB
-- AS2 (ld,%B0,%1) CR_TAB
-- AS2 (subi,r28,lo8(1)) CR_TAB
-- AS2 (sbci,r29,hi8(1)))
-- : (AS2 (ld,%A0,%1) CR_TAB
-- AS2 (ldd,%B0,%1+1));
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (subi,r28,lo8((-1))) CR_TAB
-+ AS2 (sbci,r29,hi8((-1))) CR_TAB
-+ AS2 (ld,%B0,%1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1));
-+ }
-+ }
- if(reg_base == REG_Z)
-- return AVR_TINY ? (AS2 (ld,%A0,%1) CR_TAB
-- AS2 (subi,r30,lo8((-1))) CR_TAB
-- AS2 (sbci,r31,hi8((-1))) CR_TAB
-- AS2 (ld,%B0,%1) CR_TAB
-- AS2 (subi,r30,lo8(1)) CR_TAB
-- AS2 (sbci,r31,hi8(1)))
-- : (AS2 (ld,%A0,%1) CR_TAB
-- AS2 (ldd,%B0,%1+1));
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (subi,r30,lo8((-1))) CR_TAB
-+ AS2 (sbci,r31,hi8((-1))) CR_TAB
-+ AS2 (ld,%B0,%1) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1));
-+ }
-+ }
- }
- }
- else if (GET_CODE (base) == PLUS) /* (R + i) */
-@@ -2330,35 +2397,47 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src)))
-- return *l = 4, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o1-62))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o1-62))) CR_TAB
-- AS2 (subi,r28,lo8(-62)) CR_TAB
-- AS2 (sbci,r29,hi8(-62)) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y) CR_TAB
-- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,hi8(63)) CR_TAB
-- AS2 (subi,r28,lo8(%o1-62)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1-62)))
-- : (AS2 (adiw,r28,%o1-62) CR_TAB
-- AS2 (ldd,%A0,Y+62) CR_TAB
-- AS2 (ldd,%B0,Y+63) CR_TAB
-- AS2 (sbiw,r28,%o1-62));
--
-- return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y) CR_TAB
-- AS2 (subi,r28,lo8(1)) CR_TAB
-- AS2 (sbci,r29,hi8(1)) CR_TAB
-- AS2 (subi,r28,lo8(%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1)))
-- : (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-- AS2 (ld,%A0,Y) CR_TAB
-- AS2 (ldd,%B0,Y+1) CR_TAB
-- AS2 (subi,r28,lo8(%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1)));
-+ {
-+ if (AVR_TINY) {
-+ *l = 10;
-+ return (AS2 (subi,r28,lo8(-(%o1-62))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o1-62))) CR_TAB
-+ AS2 (subi,r28,lo8(-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(-62)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1-62)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r28,%o1-62) CR_TAB
-+ AS2 (ldd,%A0,Y+62) CR_TAB
-+ AS2 (ldd,%B0,Y+63) CR_TAB
-+ AS2 (sbiw,r28,%o1-62));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,Y) CR_TAB
-+ AS2 (ldd,%B0,Y+1) CR_TAB
-+ AS2 (subi,r28,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1)));
-+ }
- }
- if (reg_base == REG_X)
- {
-@@ -2366,80 +2445,114 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- it but I have this situation with extremal
- optimization options. */
-
-- *l = 4;
-- if (reg_base == reg_dest)
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-%o1)) CR_TAB
-- AS2 (sbci,r27,hi8(-%o1)) CR_TAB
-- AS2 (ld,__tmp_reg__,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (mov,%A0,__tmp_reg__))
-- : (AS2 (adiw,r26,%o1) CR_TAB
-- AS2 (ld,__tmp_reg__,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (mov,%A0,__tmp_reg__));
--
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-%o1)) CR_TAB
-- AS2 (sbci,r27,hi8(-%o1)) CR_TAB
-- AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (subi,r26,lo8(%o1+1)) CR_TAB
-- AS2 (sbci,r27,hi8(%o1+1)))
-- : (AS2 (adiw,r26,%o1) CR_TAB
-- AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (sbiw,r26,%o1+1));
-+ if (reg_base == reg_dest) {
-+ if (AVR_TINY) {
-+ *l = 5;
-+ return (AS2 (subi,r26,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-%o1)) CR_TAB
-+ AS2 (ld,__tmp_reg__,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r26,%o1) CR_TAB
-+ AS2 (ld,__tmp_reg__,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,r26,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (subi,r26,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o1+1)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r26,%o1) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (sbiw,r26,%o1+1));
-+ }
- }
-
- if (reg_base == reg_dest)
- {
-- *l = 3;
- op[2] = XEXP(base, 0);
-
-- if(REGNO(op[2]) == REG_Y)
-- return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,__tmp_reg__,Y+) CR_TAB
-- AS2 (ld,%B0,Y) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+1)) CR_TAB
-- AS2 (mov,%A0,__tmp_reg__))
-- : (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1) CR_TAB
-- AS2 (mov,%A0,__tmp_reg__));
-- if(REGNO(op[2]) == REG_Z)
-- return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,__tmp_reg__,Z+) CR_TAB
-- AS2 (ld,%B0,Z) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+1)) CR_TAB
-- AS2 (mov,%A0,__tmp_reg__))
-- : (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1) CR_TAB
-- AS2 (mov,%A0,__tmp_reg__));
-+ if(REGNO(op[2]) == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,__tmp_reg__,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ } else {
-+ *l = 3;
-+ return (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,__tmp_reg__,Z+) CR_TAB
-+ AS2 (ld,%B0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ } else {
-+ *l = 3;
-+ return (AS2 (ldd,__tmp_reg__,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (mov,%A0,__tmp_reg__));
-+ }
-+ }
- }
-- *l = 2;
-
- op[2] = XEXP(base, 0);
-
- if(REGNO(op[2]) == REG_Y)
-- return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+1)))
-- : (AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1));
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1));
-+ }
-+ }
- if(REGNO(op[2]) == REG_Z)
-- return AVR_TINY ? ( AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,Z+) CR_TAB
-- AS2 (ld,%B0,Z) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+1)))
-- : (AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1));
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1));
-+ }
-+ }
-
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
-@@ -2450,35 +2563,43 @@ out_movhi_r_mr (rtx insn, rtx op[], int
- if (mem_volatile_p)
- {
- if (REGNO (XEXP (base, 0)) == REG_X)
-- {
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,r26,lo8(2)) CR_TAB
-+ AS2 (sbci,r27,hi8(2)) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)));
-+ } else {
- *l = 4;
-- return AVR_TINY ? (AS2 (subi,r26,lo8(2)) CR_TAB
-- AS2 (sbci,r27,hi8(2)) CR_TAB
-- AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)))
-- : (AS2 (sbiw,r26,2) CR_TAB
-+ return (AS2 (sbiw,r26,2) CR_TAB
- AS2 (ld,%A0,X+) CR_TAB
- AS2 (ld,%B0,X) CR_TAB
- AS2 (sbiw,r26,1));
- }
-+ }
- else
-- {
-+ {
-+ //FIXME:check the code once again for AVR_TINY
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,%A1,lo8(3)) CR_TAB
-+ AS2 (sbci,%B1,hi8(3)) CR_TAB
-+ AS2 (ld,%A0,%p1) CR_TAB
-+ AS2 (subi,%A1,lo8(-1)) CR_TAB
-+ AS2 (sbci,%B1,hi8(-1)) CR_TAB
-+ AS2 (ld,%B0,%p1) CR_TAB
-+ AS2 (subi,%A1,lo8(1)) CR_TAB
-+ AS2 (sbci,%B1,hi8(1)));
-+ } else {
- *l = 3;
-- //FIXME:check the code once again for AVR_TINY
-- return AVR_TINY ? (AS2 (subi,%A1,lo8(3)) CR_TAB
-- AS2 (sbci,%B1,hi8(3)) CR_TAB
-- AS2 (ld,%A0,%p1) CR_TAB
-- AS2 (subi,%A1,lo8(-1)) CR_TAB
-- AS2 (sbci,%B1,hi8(-1)) CR_TAB
-- AS2 (ld,%B0,%p1) CR_TAB
-- AS2 (subi,%A1,lo8(1)) CR_TAB
-- AS2 (sbci,%B1,hi8(1)))
-- : (AS2 (sbiw,%r1,2) CR_TAB
-- AS2 (ld,%A0,%p1) CR_TAB
-+ return (AS2 (sbiw,%r1,2) CR_TAB
-+ AS2 (ld,%A0,%p1) CR_TAB
- AS2 (ldd,%B0,%p1+1));
- }
-+ }
- }
-
- *l = 2;
-@@ -2529,24 +2650,30 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- {
- if (reg_base == REG_X) /* (R26) */
- {
-- if (reg_dest == REG_X)
-+ if (reg_dest == REG_X) {
- /* "ld r26,-X" is undefined */
-- return *l=7, AVR_TINY ? (AS2 (subi,r26,lo8(-3)) CR_TAB
-- AS2 (sbci,r27,hi8(-3)) CR_TAB
-- AS2 (ld,r29,X) CR_TAB
-- AS2 (ld,r28,-X) CR_TAB
-- AS2 (ld,__tmp_reg__,-X) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)) CR_TAB
-- AS2 (ld,r26,X) CR_TAB
-- AS2 (mov,r27,__tmp_reg__))
-- : (AS2 (adiw,r26,3) CR_TAB
-- AS2 (ld,r29,X) CR_TAB
-- AS2 (ld,r28,-X) CR_TAB
-- AS2 (ld,__tmp_reg__,-X) CR_TAB
-- AS2 (sbiw,r26,1) CR_TAB
-- AS2 (ld,r26,X) CR_TAB
-- AS2 (mov,r27,__tmp_reg__));
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,r26,lo8(-3)) CR_TAB
-+ AS2 (sbci,r27,hi8(-3)) CR_TAB
-+ AS2 (ld,r29,X) CR_TAB
-+ AS2 (ld,r28,-X) CR_TAB
-+ AS2 (ld,__tmp_reg__,-X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)) CR_TAB
-+ AS2 (ld,r26,X) CR_TAB
-+ AS2 (mov,r27,__tmp_reg__));
-+ } else {
-+ *l = 7;
-+ return (AS2 (adiw,r26,3) CR_TAB
-+ AS2 (ld,r29,X) CR_TAB
-+ AS2 (ld,r28,-X) CR_TAB
-+ AS2 (ld,__tmp_reg__,-X) CR_TAB
-+ AS2 (sbiw,r26,1) CR_TAB
-+ AS2 (ld,r26,X) CR_TAB
-+ AS2 (mov,r27,__tmp_reg__));
-+ }
-+ }
-
- else if (reg_dest == REG_X - 2)
- return *l=5, (AS2 (ld,%A0,X+) CR_TAB
-@@ -2559,113 +2686,154 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- AS2 (ld,%B0,X+) CR_TAB
- AS2 (ld,%C0,X+) CR_TAB
- AS2 (ld,%D0,X));
-- else
-- return *l=5, AVR_TINY ? (AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X+) CR_TAB
-- AS2 (ld,%C0,X+) CR_TAB
-- AS2 (ld,%D0,X) CR_TAB
-- AS2 (subi,r26,lo8(3)) CR_TAB
-- AS2 (sbci,r27,hi8(3)))
-- : (AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X+) CR_TAB
-- AS2 (ld,%C0,X+) CR_TAB
-- AS2 (ld,%D0,X) CR_TAB
-- AS2 (sbiw,r26,3));
-+ else {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X+) CR_TAB
-+ AS2 (ld,%C0,X+) CR_TAB
-+ AS2 (ld,%D0,X) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X+) CR_TAB
-+ AS2 (ld,%C0,X+) CR_TAB
-+ AS2 (ld,%D0,X) CR_TAB
-+ AS2 (sbiw,r26,3));
-+ }
-+ }
- }
- else
- {
- if (reg_dest == reg_base)
-- {
-- if(reg_base == REG_Y)
-- return *l=5, AVR_TINY ? (AS2 (subi,r28,lo8(-3)) CR_TAB
-- AS2 (sbci,r29,hi8(-3)) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (ld,%C0,-Y) CR_TAB
-- AS2 (subi,r28,lo8(1)) CR_TAB
-- AS2 (sbci,r29,hi8(1)) CR_TAB
-- AS2 (ld,__tmp_reg__,%1) CR_TAB
-- AS2 (subi,r28,lo8(1)) CR_TAB
-- AS2 (sbci,r29,hi8(1)) CR_TAB
-- AS2 (ld,%A0,%1) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__))
-- : (AS2 (ldd,%D0,%1+3) CR_TAB
-- AS2 (ldd,%C0,%1+2) CR_TAB
-- AS2 (ldd,__tmp_reg__,%1+1) CR_TAB
-- AS2 (ld,%A0,%1) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__));
-- if(reg_base == REG_Z)
-- return *l=5, AVR_TINY ? (AS2 (subi,r30,lo8(-3)) CR_TAB
-- AS2 (sbci,r31,hi8(-3)) CR_TAB
-- AS2 (ld,%D0,Z) CR_TAB
-- AS2 (ld,%C0,-Z) CR_TAB
-- AS2 (subi,r30,lo8(1)) CR_TAB
-- AS2 (sbci,r31,hi8(1)) CR_TAB
-- AS2 (ld,__tmp_reg__,%1) CR_TAB
-- AS2 (subi,r30,lo8(1)) CR_TAB
-- AS2 (sbci,r31,hi8(1)) CR_TAB
-- AS2 (ld,%A0,%1) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__))
-- : (AS2 (ldd,%D0,%1+3) CR_TAB
-- AS2 (ldd,%C0,%1+2) CR_TAB
-- AS2 (ldd,__tmp_reg__,%1+1) CR_TAB
-- AS2 (ld,%A0,%1) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__));
-- }
-+ {
-+ if(reg_base == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 11;
-+ return (AS2 (subi,r28,lo8(-3)) CR_TAB
-+ AS2 (sbci,r29,hi8(-3)) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (ld,%C0,-Y) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (ld,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ldd,%D0,%1+3) CR_TAB
-+ AS2 (ldd,%C0,%1+2) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%1+1) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ }
-+ }
-
-+ if(reg_base == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 11;
-+ return (AS2 (subi,r30,lo8(-3)) CR_TAB
-+ AS2 (sbci,r31,hi8(-3)) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (ld,%C0,-Z) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)) CR_TAB
-+ AS2 (ld,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ldd,%D0,%1+3) CR_TAB
-+ AS2 (ldd,%C0,%1+2) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%1+1) CR_TAB
-+ AS2 (ld,%A0,%1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ }
-+ }
-+ }
- else if (reg_base == reg_dest + 2)
-- {
-- if(reg_base == REG_Y)
-- return *l=5, AVR_TINY ? (AS2 (ld ,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y+) CR_TAB
-- AS2 (ld,__tmp_reg__,Y+) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,hi8(3)) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__))
-- : (AS2 (ld ,%A0,%1) CR_TAB
-- AS2 (ldd,%B0,%1+1) CR_TAB
-- AS2 (ldd,__tmp_reg__,%1+2) CR_TAB
-- AS2 (ldd,%D0,%1+3) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__));
-- if(reg_base == REG_Z)
-- return *l=5, AVR_TINY ? (AS2 (ld ,%A0,Z+) CR_TAB
-- AS2 (ld,%B0,Z+) CR_TAB
-- AS2 (ld,__tmp_reg__,Z+) CR_TAB
-- AS2 (ld,%D0,Z) CR_TAB
-- AS2 (subi,r30,lo8(3)) CR_TAB
-- AS2 (sbci,r31,hi8(3)) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__))
-- : (AS2 (ld ,%A0,%1) CR_TAB
-- AS2 (ldd,%B0,%1+1) CR_TAB
-- AS2 (ldd,__tmp_reg__,%1+2) CR_TAB
-- AS2 (ldd,%D0,%1+3) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__));
-- }
-- else
-- {
-- if(reg_base == REG_Y)
-- return *l=4, AVR_TINY ? (AS2 (ld ,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y+) CR_TAB
-- AS2 (ld,%C0,Y+) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,hi8(3)))
-- : (AS2 (ld ,%A0,%1) CR_TAB
-- AS2 (ldd,%B0,%1+1) CR_TAB
-- AS2 (ldd,%C0,%1+2) CR_TAB
-- AS2 (ldd,%D0,%1+3));
-- if(reg_base == REG_Z)
-- return *l=4, AVR_TINY ? (AS2 (ld ,%A0,Z+) CR_TAB
-- AS2 (ld,%B0,Z+) CR_TAB
-- AS2 (ld,%C0,Z+) CR_TAB
-- AS2 (ld,%D0,Z) CR_TAB
-- AS2 (subi,r30,lo8(3)) CR_TAB
-- AS2 (sbci,r31,hi8(3)))
-- : (AS2 (ld ,%A0,%1) CR_TAB
-- AS2 (ldd,%B0,%1+1) CR_TAB
-- AS2 (ldd,%C0,%1+2) CR_TAB
-- AS2 (ldd,%D0,%1+3));
-- }
-+ {
-+ if(reg_base == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (ld ,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ld ,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%1+2) CR_TAB
-+ AS2 (ldd,%D0,%1+3) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ }
-+ }
-+
-+ if(reg_base == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (ld ,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,r30,lo8(3)) CR_TAB
-+ AS2 (sbci,r31,hi8(3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ld ,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%1+2) CR_TAB
-+ AS2 (ldd,%D0,%1+3) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ }
-+ }
-+ } else {
-+ if(reg_base == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (ld ,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (ld ,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1) CR_TAB
-+ AS2 (ldd,%C0,%1+2) CR_TAB
-+ AS2 (ldd,%D0,%1+3));
-+ }
-+ }
-+ if(reg_base == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (ld ,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,%C0,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,r30,lo8(3)) CR_TAB
-+ AS2 (sbci,r31,hi8(3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (ld ,%A0,%1) CR_TAB
-+ AS2 (ldd,%B0,%1+1) CR_TAB
-+ AS2 (ldd,%C0,%1+2) CR_TAB
-+ AS2 (ldd,%D0,%1+3));
-+ }
-+ }
-+ }
- }
- }
- else if (GET_CODE (base) == PLUS) /* (R + i) */
-@@ -2677,44 +2845,54 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- if (REGNO (XEXP (base, 0)) != REG_Y)
- fatal_insn ("incorrect insn:",insn);
-
-- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src)))
-- return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o1-60))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o1-60))) CR_TAB
-- AS2 (subi,r28,lo8(-60)) CR_TAB
-- AS2 (sbci,r29,hi8(-60)) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y+) CR_TAB
-- AS2 (ld,%C0,Y+) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,hi8(63)) CR_TAB
-- AS2 (subi,r28,lo8(%o1-60)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1-60)))
-- : (AS2 (adiw,r28,%o1-60) CR_TAB
-- AS2 (ldd,%A0,Y+60) CR_TAB
-- AS2 (ldd,%B0,Y+61) CR_TAB
-- AS2 (ldd,%C0,Y+62) CR_TAB
-- AS2 (ldd,%D0,Y+63) CR_TAB
-- AS2 (sbiw,r28,%o1-60));
--
-- return *l = 8, AVR_TINY ? (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y+) CR_TAB
-- AS2 (ld,%C0,Y+) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,hi8(3)) CR_TAB
-- AS2 (subi,r28,lo8(%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1)))
-- : (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-- AS2 (ld,%A0,Y) CR_TAB
-- AS2 (ldd,%B0,Y+1) CR_TAB
-- AS2 (ldd,%C0,Y+2) CR_TAB
-- AS2 (ldd,%D0,Y+3) CR_TAB
-- AS2 (subi,r28,lo8(%o1)) CR_TAB
-- AS2 (sbci,r29,hi8(%o1)));
-+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (src))) {
-+ if (AVR_TINY) {
-+ *l = 12;
-+ return (AS2 (subi,r28,lo8(-(%o1-60))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o1-60))) CR_TAB
-+ AS2 (subi,r28,lo8(-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(-60)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1-60)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (adiw,r28,%o1-60) CR_TAB
-+ AS2 (ldd,%A0,Y+60) CR_TAB
-+ AS2 (ldd,%B0,Y+61) CR_TAB
-+ AS2 (ldd,%C0,Y+62) CR_TAB
-+ AS2 (ldd,%D0,Y+63) CR_TAB
-+ AS2 (sbiw,r28,%o1-60));
-+ }
-+ }
-+ if (AVR_TINY) {
-+ *l = 10;
-+ return (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)) CR_TAB
-+ AS2 (subi,r28,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1)));
-+ } else {
-+ *l = 8;
-+ return (AS2 (subi,r28,lo8(-%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o1)) CR_TAB
-+ AS2 (ld,%A0,Y) CR_TAB
-+ AS2 (ldd,%B0,Y+1) CR_TAB
-+ AS2 (ldd,%C0,Y+2) CR_TAB
-+ AS2 (ldd,%D0,Y+3) CR_TAB
-+ AS2 (subi,r28,lo8(%o1)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o1)));
-+ }
- }
-
- reg_base = true_regnum (XEXP (base, 0));
-@@ -2722,154 +2900,204 @@ out_movsi_r_mr (rtx insn, rtx op[], int
- {
- /* R = (X + d) */
- if (reg_dest == REG_X)
-- {
-- *l = 7;
-- /* "ld r26,-X" is undefined */
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1+3))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o1+3))) CR_TAB
-- AS2 (ld,r29,X) CR_TAB
-- AS2 (ld,r28,-X) CR_TAB
-- AS2 (ld,__tmp_reg__,-X) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)) CR_TAB
-- AS2 (ld,r26,X) CR_TAB
-- AS2 (mov,r27,__tmp_reg__))
-- : (AS2 (adiw,r26,%o1+3) CR_TAB
-- AS2 (ld,r29,X) CR_TAB
-- AS2 (ld,r28,-X) CR_TAB
-- AS2 (ld,__tmp_reg__,-X) CR_TAB
-- AS2 (sbiw,r26,1) CR_TAB
-- AS2 (ld,r26,X) CR_TAB
-- AS2 (mov,r27,__tmp_reg__));
-- }
-- *l = 6;
-- if (reg_dest == REG_X - 2)
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-- AS2 (ld,r24,X+) CR_TAB
-- AS2 (ld,r25,X+) CR_TAB
-- AS2 (ld,__tmp_reg__,X+) CR_TAB
-- AS2 (ld,r27,X) CR_TAB
-- AS2 (mov,r26,__tmp_reg__))
-- : (AS2 (adiw,r26,%o1) CR_TAB
-- AS2 (ld,r24,X+) CR_TAB
-- AS2 (ld,r25,X+) CR_TAB
-- AS2 (ld,__tmp_reg__,X+) CR_TAB
-- AS2 (ld,r27,X) CR_TAB
-- AS2 (mov,r26,__tmp_reg__));
--
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X+) CR_TAB
-- AS2 (ld,%C0,X+) CR_TAB
-- AS2 (ld,%D0,X) CR_TAB
-- AS2 (subi,r26,lo8(%o1+3)) CR_TAB
-- AS2 (sbci,r27,hi8(%o1+3)))
-- : (AS2 (adiw,r26,%o1) CR_TAB
-- AS2 (ld,%A0,X+) CR_TAB
-- AS2 (ld,%B0,X+) CR_TAB
-- AS2 (ld,%C0,X+) CR_TAB
-- AS2 (ld,%D0,X) CR_TAB
-- AS2 (sbiw,r26,%o1+3));
-+ {
-+ /* "ld r26,-X" is undefined */
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,r26,lo8(-(%o1+3))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1+3))) CR_TAB
-+ AS2 (ld,r29,X) CR_TAB
-+ AS2 (ld,r28,-X) CR_TAB
-+ AS2 (ld,__tmp_reg__,-X) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)) CR_TAB
-+ AS2 (ld,r26,X) CR_TAB
-+ AS2 (mov,r27,__tmp_reg__));
-+ } else {
-+ *l = 7;
-+ return (AS2 (adiw,r26,%o1+3) CR_TAB
-+ AS2 (ld,r29,X) CR_TAB
-+ AS2 (ld,r28,-X) CR_TAB
-+ AS2 (ld,__tmp_reg__,-X) CR_TAB
-+ AS2 (sbiw,r26,1) CR_TAB
-+ AS2 (ld,r26,X) CR_TAB
-+ AS2 (mov,r27,__tmp_reg__));
-+ }
-+ }
-+
-+ if (reg_dest == REG_X - 2) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,r24,X+) CR_TAB
-+ AS2 (ld,r25,X+) CR_TAB
-+ AS2 (ld,__tmp_reg__,X+) CR_TAB
-+ AS2 (ld,r27,X) CR_TAB
-+ AS2 (mov,r26,__tmp_reg__));
-+ } else {
-+ *l = 6;
-+ return (AS2 (adiw,r26,%o1) CR_TAB
-+ AS2 (ld,r24,X+) CR_TAB
-+ AS2 (ld,r25,X+) CR_TAB
-+ AS2 (ld,__tmp_reg__,X+) CR_TAB
-+ AS2 (ld,r27,X) CR_TAB
-+ AS2 (mov,r26,__tmp_reg__));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,r26,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X+) CR_TAB
-+ AS2 (ld,%C0,X+) CR_TAB
-+ AS2 (ld,%D0,X) CR_TAB
-+ AS2 (subi,r26,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o1+3)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (adiw,r26,%o1) CR_TAB
-+ AS2 (ld,%A0,X+) CR_TAB
-+ AS2 (ld,%B0,X+) CR_TAB
-+ AS2 (ld,%C0,X+) CR_TAB
-+ AS2 (ld,%D0,X) CR_TAB
-+ AS2 (sbiw,r26,%o1+3));
-+ }
- }
- if (reg_dest == reg_base)
-- {
-- op[2] = XEXP(base, 0);
-+ {
-+ op[2] = XEXP(base, 0);
-
-- if(REGNO(op[2]) == REG_Y)
-- return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1+4))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1+4))) CR_TAB
-- AS2 (ld,%D0,-Y) CR_TAB
-- AS2 (ld,%C0,-Y) CR_TAB
-- AS2 (ld,__tmp_reg__,-Y) CR_TAB
-- AS2 (ld,%A0,-Y) CR_TAB
-- AS2 (subi,%A2,lo8(%o1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1)) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__))
-- : (AS2 (ldd,%D0,%D1) CR_TAB
-- AS2 (ldd,%C0,%C1) CR_TAB
-- AS2 (ldd,__tmp_reg__,%B1) CR_TAB
-- AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__));
-- if(REGNO(op[2]) == REG_Z)
-- return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1+4))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1+4))) CR_TAB
-- AS2 (ld,%D0,-Z) CR_TAB
-- AS2 (ld,%C0,-Z) CR_TAB
-- AS2 (ld,__tmp_reg__,-Z) CR_TAB
-- AS2 (ld,%A0,-Z) CR_TAB
-- AS2 (subi,%A2,lo8(%o1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1)) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__))
-- : (AS2 (ldd,%D0,%D1) CR_TAB
-- AS2 (ldd,%C0,%C1) CR_TAB
-- AS2 (ldd,__tmp_reg__,%B1) CR_TAB
-- AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (mov,%B0,__tmp_reg__));
-- }
-- else if (reg_dest == reg_base - 2)
-- {
-- op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,%A2,lo8(-(%o1+4))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1+4))) CR_TAB
-+ AS2 (ld,%D0,-Y) CR_TAB
-+ AS2 (ld,%C0,-Y) CR_TAB
-+ AS2 (ld,__tmp_reg__,-Y) CR_TAB
-+ AS2 (ld,%A0,-Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ldd,%D0,%D1) CR_TAB
-+ AS2 (ldd,%C0,%C1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%B1) CR_TAB
-+ AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,%A2,lo8(-(%o1+4))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1+4))) CR_TAB
-+ AS2 (ld,%D0,-Z) CR_TAB
-+ AS2 (ld,%C0,-Z) CR_TAB
-+ AS2 (ld,__tmp_reg__,-Z) CR_TAB
-+ AS2 (ld,%A0,-Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1)) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ldd,%D0,%D1) CR_TAB
-+ AS2 (ldd,%C0,%C1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%B1) CR_TAB
-+ AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (mov,%B0,__tmp_reg__));
-+ }
-+ }
-+ } else if (reg_dest == reg_base - 2) {
-+ op[2] = XEXP(base, 0);
-
-- if(REGNO(op[2]) == REG_Y)
-- return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y+) CR_TAB
-- AS2 (ld,__tmp_reg__,Y+) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+3)) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__))
-- : (AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1) CR_TAB
-- AS2 (ldd,__tmp_reg__,%C1) CR_TAB
-- AS2 (ldd,%D0,%D1) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__));
-- if(REGNO(op[2]) == REG_Z)
-- return *l=5, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,Z+) CR_TAB
-- AS2 (ld,%B0,Z+) CR_TAB
-- AS2 (ld,__tmp_reg__,Z+) CR_TAB
-- AS2 (ld,%D0,Z) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+3)) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__))
-- : (AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1) CR_TAB
-- AS2 (ldd,__tmp_reg__,%C1) CR_TAB
-- AS2 (ldd,%D0,%D1) CR_TAB
-- AS2 (mov,%C0,__tmp_reg__));
-- }
-- op[2] = XEXP(base, 0);
-- if(REGNO(op[2]) == REG_Y)
-- return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,Y+) CR_TAB
-- AS2 (ld,%B0,Y+) CR_TAB
-- AS2 (ld,%C0,Y+) CR_TAB
-- AS2 (ld,%D0,Y) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+3)))
-- : (AS2 (ldd,%A0,%A1) CR_TAB
-- AS2 (ldd,%B0,%B1) CR_TAB
-- AS2 (ldd,%C0,%C1) CR_TAB
-- AS2 (ldd,%D0,%D1));
-- if(REGNO(op[2]) == REG_Z)
-- return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-- AS2 (ld,%A0,Z+) CR_TAB
-- AS2 (ld,%B0,Z+) CR_TAB
-- AS2 (ld,%C0,Z+) CR_TAB
-- AS2 (ld,%D0,Z) CR_TAB
-- AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o1+3)))
-- : (AS2 (ldd,%A0,%A1) CR_TAB
-+ if(REGNO(op[2]) == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ldd,%A0,%A1) CR_TAB
- AS2 (ldd,%B0,%B1) CR_TAB
-- AS2 (ldd,%C0,%C1) CR_TAB
-- AS2 (ldd,%D0,%D1));
-+ AS2 (ldd,__tmp_reg__,%C1) CR_TAB
-+ AS2 (ldd,%D0,%D1) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,__tmp_reg__,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ } else {
-+ *l = 5;
-+ return (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (ldd,__tmp_reg__,%C1) CR_TAB
-+ AS2 (ldd,%D0,%D1) CR_TAB
-+ AS2 (mov,%C0,__tmp_reg__));
-+ }
-+ }
-+ }
-+
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Y+) CR_TAB
-+ AS2 (ld,%B0,Y+) CR_TAB
-+ AS2 (ld,%C0,Y+) CR_TAB
-+ AS2 (ld,%D0,Y) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (ldd,%C0,%C1) CR_TAB
-+ AS2 (ldd,%D0,%D1));
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%A0,Z+) CR_TAB
-+ AS2 (ld,%B0,Z+) CR_TAB
-+ AS2 (ld,%C0,Z+) CR_TAB
-+ AS2 (ld,%D0,Z) CR_TAB
-+ AS2 (subi,%A2,lo8(%o1+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o1+3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (ldd,%A0,%A1) CR_TAB
-+ AS2 (ldd,%B0,%B1) CR_TAB
-+ AS2 (ldd,%C0,%C1) CR_TAB
-+ AS2 (ldd,%D0,%D1));
-+ }
-+ }
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- return *l=4, (AS2 (ld,%D0,%1) CR_TAB
-@@ -2916,37 +3144,48 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- if (reg_src == REG_X)
- {
- /* "st X+,r26" is undefined */
-- if (reg_unused_after (insn, base))
-- return *l=6, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X+,r28) CR_TAB
-- AS2 (st,X,r29))
-- : (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X+,r28) CR_TAB
-- AS2 (st,X,r29));
-- else
-- return *l=7, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X+,r28) CR_TAB
-- AS2 (st,X,r29) CR_TAB
-- AS2 (subi,r26,lo8(3)) CR_TAB
-- AS2 (sbci,r27,hi8(3)))
-- : (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X+,r28) CR_TAB
-- AS2 (st,X,r29) CR_TAB
-- AS2 (sbiw,r26,3));
-+ if (reg_unused_after (insn, base)) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29));
-+ } else {
-+ *l = 6;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29));
-+ }
-+ } else {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)));
-+ } else {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29) CR_TAB
-+ AS2 (sbiw,r26,3));
-+ }
-+ }
- }
- else if (reg_base == reg_src + 2)
- {
-@@ -2958,61 +3197,84 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,%0+,__zero_reg__) CR_TAB
- AS2 (st,%0,__tmp_reg__) CR_TAB
- AS1 (clr,__zero_reg__));
-- else
-- return *l=8, AVR_TINY ? (AS2 (mov,__zero_reg__,%C1) CR_TAB
-- AS2 (mov,__tmp_reg__,%D1) CR_TAB
-- AS2 (st,%0+,%A1) CR_TAB
-- AS2 (st,%0+,%B1) CR_TAB
-- AS2 (st,%0+,__zero_reg__) CR_TAB
-- AS2 (st,%0,__tmp_reg__) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (subi,r26,lo8(3)) CR_TAB
-- AS2 (sbci,r27,hi8(3)))
-- : (AS2 (mov,__zero_reg__,%C1) CR_TAB
-- AS2 (mov,__tmp_reg__,%D1) CR_TAB
-- AS2 (st,%0+,%A1) CR_TAB
-- AS2 (st,%0+,%B1) CR_TAB
-- AS2 (st,%0+,__zero_reg__) CR_TAB
-- AS2 (st,%0,__tmp_reg__) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (sbiw,r26,3));
-+ else {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (mov,__zero_reg__,%C1) CR_TAB
-+ AS2 (mov,__tmp_reg__,%D1) CR_TAB
-+ AS2 (st,%0+,%A1) CR_TAB
-+ AS2 (st,%0+,%B1) CR_TAB
-+ AS2 (st,%0+,__zero_reg__) CR_TAB
-+ AS2 (st,%0,__tmp_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)));
-+ } else {
-+ *l = 8;
-+ return (AS2 (mov,__zero_reg__,%C1) CR_TAB
-+ AS2 (mov,__tmp_reg__,%D1) CR_TAB
-+ AS2 (st,%0+,%A1) CR_TAB
-+ AS2 (st,%0+,%B1) CR_TAB
-+ AS2 (st,%0+,__zero_reg__) CR_TAB
-+ AS2 (st,%0,__tmp_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (sbiw,r26,3));
-+ }
-+ }
- }
-- return *l=5, AVR_TINY ? (AS2 (st,%0+,%A1) CR_TAB
-- AS2 (st,%0+,%B1) CR_TAB
-- AS2 (st,%0+,%C1) CR_TAB
-- AS2 (st,%0,%D1) CR_TAB
-- AS2 (subi,r26,lo8(3)) CR_TAB
-- AS2 (sbci,r27,hi8(3)))
-- : (AS2 (st,%0+,%A1) CR_TAB
-- AS2 (st,%0+,%B1) CR_TAB
-- AS2 (st,%0+,%C1) CR_TAB
-- AS2 (st,%0,%D1) CR_TAB
-- AS2 (sbiw,r26,3));
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (st,%0+,%A1) CR_TAB
-+ AS2 (st,%0+,%B1) CR_TAB
-+ AS2 (st,%0+,%C1) CR_TAB
-+ AS2 (st,%0,%D1) CR_TAB
-+ AS2 (subi,r26,lo8(3)) CR_TAB
-+ AS2 (sbci,r27,hi8(3)));
-+ } else {
-+ *l = 5;
-+ return (AS2 (st,%0+,%A1) CR_TAB
-+ AS2 (st,%0+,%B1) CR_TAB
-+ AS2 (st,%0+,%C1) CR_TAB
-+ AS2 (st,%0,%D1) CR_TAB
-+ AS2 (sbiw,r26,3));
-+ }
- }
- else
- {
-- if(reg_base == REG_Y)
-- return *l=4, AVR_TINY ? (AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y+,%B1) CR_TAB
-- AS2 (st,Y+,%C1) CR_TAB
-- AS2 (st,Y,%D1) CR_TAB
-- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,lo8(3)))
-- : (AS2 (st,%0,%A1) CR_TAB
-- AS2 (std,%0+1,%B1) CR_TAB
-- AS2 (std,%0+2,%C1) CR_TAB
-- AS2 (std,%0+3,%D1));
-- if(reg_base == REG_Z)
-- return *l=4, AVR_TINY ? (AS2 (st,Z+,%A1) CR_TAB
-- AS2 (st,Z+,%B1) CR_TAB
-- AS2 (st,Z+,%C1) CR_TAB
-- AS2 (st,Z,%D1) CR_TAB
-- AS2 (subi,r30,lo8(3)) CR_TAB
-- AS2 (sbci,r31,lo8(3)))
-- : (AS2 (st,%0,%A1) CR_TAB
-- AS2 (std,%0+1,%B1) CR_TAB
-- AS2 (std,%0+2,%C1) CR_TAB
-- AS2 (std,%0+3,%D1));
-+ if(reg_base == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,lo8(3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1) CR_TAB
-+ AS2 (std,%0+2,%C1) CR_TAB
-+ AS2 (std,%0+3,%D1));
-+ }
-+ }
-+ if(reg_base == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z+,%B1) CR_TAB
-+ AS2 (st,Z+,%C1) CR_TAB
-+ AS2 (st,Z,%D1) CR_TAB
-+ AS2 (subi,r30,lo8(3)) CR_TAB
-+ AS2 (sbci,r31,lo8(3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1) CR_TAB
-+ AS2 (std,%0+2,%C1) CR_TAB
-+ AS2 (std,%0+3,%D1));
-+ }
-+ }
- }
- }
- else if (GET_CODE (base) == PLUS) /* (R + i) */
-@@ -3024,62 +3286,76 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- if (reg_base != REG_Y)
- fatal_insn ("incorrect insn:",insn);
-
-- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-60))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o0-60))) CR_TAB
-- AS2 (subi,r28,lo8(-60)) CR_TAB
-- AS2 (sbci,r29,lo8(-60)) CR_TAB
-- AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y+,%B1) CR_TAB
-- AS2 (st,Y+,%C1) CR_TAB
-- AS2 (st,Y,%D1) CR_TAB
-- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,lo8(63)) CR_TAB
-- AS2 (subi,r28,lo8(%o0-60)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0-60)))
-- : (AS2 (adiw,r28,%o0-60) CR_TAB
-- AS2 (std,Y+60,%A1) CR_TAB
-- AS2 (std,Y+61,%B1) CR_TAB
-- AS2 (std,Y+62,%C1) CR_TAB
-- AS2 (std,Y+63,%D1) CR_TAB
-- AS2 (sbiw,r28,%o0-60));
-- return *l = 8, AVR_TINY ? (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-- AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y+,%B1) CR_TAB
-- AS2 (st,Y+,%C1) CR_TAB
-- AS2 (st,Y,%D1) CR_TAB
-- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,lo8(3)) CR_TAB
-- AS2 (subi,r28,lo8(%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0)))
-- : (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-- AS2 (st,Y,%A1) CR_TAB
-- AS2 (std,Y+1,%B1) CR_TAB
-- AS2 (std,Y+2,%C1) CR_TAB
-- AS2 (std,Y+3,%D1) CR_TAB
-- AS2 (subi,r28,lo8(%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0)));
-+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest))) {
-+ if (AVR_TINY) {
-+ *l = 12;
-+ return (AS2 (subi,r28,lo8(-(%o0-60))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-60))) CR_TAB
-+ AS2 (subi,r28,lo8(-60)) CR_TAB
-+ AS2 (sbci,r29,lo8(-60)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,lo8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-60)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (adiw,r28,%o0-60) CR_TAB
-+ AS2 (std,Y+60,%A1) CR_TAB
-+ AS2 (std,Y+61,%B1) CR_TAB
-+ AS2 (std,Y+62,%C1) CR_TAB
-+ AS2 (std,Y+63,%D1) CR_TAB
-+ AS2 (sbiw,r28,%o0-60));
-+ }
-+ }
-+ if (AVR_TINY) {
-+ *l = 10;
-+ return (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,lo8(3)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ } else {
-+ *l = 8;
-+ return (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y,%A1) CR_TAB
-+ AS2 (std,Y+1,%B1) CR_TAB
-+ AS2 (std,Y+2,%C1) CR_TAB
-+ AS2 (std,Y+3,%D1) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ }
- }
- if (reg_base == REG_X)
- {
- /* (X + d) = R */
- if (reg_src == REG_X)
-- {
-- *l = 9;
-- return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X+,__zero_reg__) CR_TAB
-- AS2 (st,X+,r28) CR_TAB
-- AS2 (st,X,r29) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0+3)))
-- : (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ {
-+ if (AVR_TINY) {
-+ *l = 11;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X+,__zero_reg__) CR_TAB
-+ AS2 (st,X+,r28) CR_TAB
-+ AS2 (st,X,r29) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+3)));
-+ } else {
-+ *l = 9;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,__tmp_reg__) CR_TAB
-@@ -3088,22 +3364,26 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,X,r29) CR_TAB
- AS1 (clr,__zero_reg__) CR_TAB
- AS2 (sbiw,r26,%o0+3));
-- }
-+ }
-+ }
- else if (reg_src == REG_X - 2)
-- {
-- *l = 9;
-- return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X+,r24) CR_TAB
-- AS2 (st,X+,r25) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X,__zero_reg__) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0+3)))
-- : (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ {
-+ if (AVR_TINY) {
-+ *l = 11;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,r24) CR_TAB
-+ AS2 (st,X+,r25) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+3)));
-+ } else {
-+ *l = 9;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
- AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,r24) CR_TAB
-@@ -3112,51 +3392,71 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,X,__zero_reg__) CR_TAB
- AS1 (clr,__zero_reg__) CR_TAB
- AS2 (sbiw,r26,%o0+3));
-- }
-- *l = 6;
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X+,%A1) CR_TAB
-- AS2 (st,X+,%B1) CR_TAB
-- AS2 (st,X+,%C1) CR_TAB
-- AS2 (st,X,%D1) CR_TAB
-- AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0+3)))
-- : (AS2 (adiw,r26,%o0) CR_TAB
-- AS2 (st,X+,%A1) CR_TAB
-- AS2 (st,X+,%B1) CR_TAB
-- AS2 (st,X+,%C1) CR_TAB
-- AS2 (st,X,%D1) CR_TAB
-- AS2 (sbiw,r26,%o0+3));
-- }
-- op[2] = XEXP(base, 0);
-- if(REGNO(op[2]) == REG_Y)
-- return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y+,%B1) CR_TAB
-- AS2 (st,Y+,%C1) CR_TAB
-- AS2 (st,Y,%D1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0+3)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0+3)))
-- : (AS2 (std,%A0,%A1) CR_TAB
-- AS2 (std,%B0,%B1) CR_TAB
-- AS2 (std,%C0,%C1) CR_TAB
-- AS2 (std,%D0,%D1));
--
-- if(REGNO(op[2]) == REG_Z)
-- return *l=4, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Z+,%A1) CR_TAB
-- AS2 (st,Z+,%B1) CR_TAB
-- AS2 (st,Z+,%C1) CR_TAB
-- AS2 (st,Z,%D1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0+3)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0+3)))
-- : (AS2 (std,%A0,%A1) CR_TAB
-- AS2 (std,%B0,%B1) CR_TAB
-- AS2 (std,%C0,%C1) CR_TAB
-- AS2 (std,%D0,%D1));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X+,%B1) CR_TAB
-+ AS2 (st,X+,%C1) CR_TAB
-+ AS2 (st,X,%D1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+3)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X+,%B1) CR_TAB
-+ AS2 (st,X+,%C1) CR_TAB
-+ AS2 (st,X,%D1) CR_TAB
-+ AS2 (sbiw,r26,%o0+3));
-+ }
-+ }
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ {
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y+,%B1) CR_TAB
-+ AS2 (st,Y+,%C1) CR_TAB
-+ AS2 (st,Y,%D1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1) CR_TAB
-+ AS2 (std,%C0,%C1) CR_TAB
-+ AS2 (std,%D0,%D1));
-+ }
-+ }
-+
-+ if(REGNO(op[2]) == REG_Z)
-+ {
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z+,%B1) CR_TAB
-+ AS2 (st,Z+,%C1) CR_TAB
-+ AS2 (st,Z,%D1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+3)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+3)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1) CR_TAB
-+ AS2 (std,%C0,%C1) CR_TAB
-+ AS2 (std,%D0,%D1));
-+ }
-+ }
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- return *l=4, (AS2 (st,%0,%D1) CR_TAB
-@@ -3370,18 +3670,25 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- fatal_insn ("incorrect insn:",insn);
-
- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 3, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-63))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o0-63))) CR_TAB
-- AS2 (subi,r28,lo8(-63)) CR_TAB
-- AS2 (sbci,r29,hi8(-63)) CR_TAB
-- AS2 (st,Y,%1) CR_TAB
-- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,hi8(63)) CR_TAB
-- AS2 (subi,r28,lo8(%o0-63)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0-63)))
-- : (AS2 (adiw,r28,%o0-63) CR_TAB
-- AS2 (std,Y+63,%1) CR_TAB
-- AS2 (sbiw,r28,%o0-63));
-+ {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (subi,r28,lo8(-(%o0-63))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-63))) CR_TAB
-+ AS2 (subi,r28,lo8(-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(-63)) CR_TAB
-+ AS2 (st,Y,%1) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-63)));
-+ } else {
-+ *l = 3;
-+ return (AS2 (adiw,r28,%o0-63) CR_TAB
-+ AS2 (std,Y+63,%1) CR_TAB
-+ AS2 (sbiw,r28,%o0-63));
-+ }
-+ }
-
- return *l = 5, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-@@ -3394,60 +3701,95 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- if (reg_overlap_mentioned_p (src, XEXP (x, 0)))
- {
- if (reg_unused_after (insn, XEXP (x,0)))
-- return *l = 3, AVR_TINY ? (AS2 (mov,__tmp_reg__,%1) CR_TAB
-- AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X,__tmp_reg__))
-- : (AS2 (mov,__tmp_reg__,%1) CR_TAB
-- AS2 (adiw,r26,%o0) CR_TAB
-- AS2 (st,X,__tmp_reg__));
--
-- return *l = 4, AVR_TINY ? (AS2 (mov,__tmp_reg__,%1) CR_TAB
-- AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X,__tmp_reg__) CR_TAB
-- AS2 (subi,r26,lo8(%o0)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0)))
-- : (AS2 (mov,__tmp_reg__,%1) CR_TAB
-- AS2 (adiw,r26,%o0) CR_TAB
-- AS2 (st,X,__tmp_reg__) CR_TAB
-- AS2 (sbiw,r26,%o0));
-+ {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,__tmp_reg__));
-+ } else {
-+ *l = 3;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X,__tmp_reg__));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (sbiw,r26,%o0));
-+ }
- }
- else
-- {
-- if (reg_unused_after (insn, XEXP (x,0)))
-- return *l = 2, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X,%1))
-- : (AS2 (adiw,r26,%o0) CR_TAB
-- AS2 (st,X,%1));
--
-- return *l = 3, AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X,%1) CR_TAB
-- AS2 (subi,r26,lo8(%o0)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0)))
-- : (AS2 (adiw,r26,%o0) CR_TAB
-- AS2 (st,X,%1) CR_TAB
-- AS2 (sbiw,r26,%o0));
-- }
-+ {
-+ if (reg_unused_after (insn, XEXP (x,0))) {
-+ if (AVR_TINY) {
-+ *l = 3;
-+ return (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,%1));
-+ } else {
-+ *l = 2;
-+ return (AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X,%1));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 5;
-+ return (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X,%1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)));
-+ } else {
-+ *l = 3;
-+ return (AS2 (adiw,r26,%o0) CR_TAB
-+ AS2 (st,X,%1) CR_TAB
-+ AS2 (sbiw,r26,%o0));
-+ }
-+ }
- }
-- *l = 1;
-- op[2] = XEXP(x, 0);
-- if(REGNO(op[2]) == REG_Y)
-- return AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Y,%1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0)))
-- : AS2 (std,%0,%1);
-- if(REGNO(op[2]) == REG_Z)
-- return AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Z,%1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0)))
-- : AS2 (std,%0,%1);
-+
-+ op[2] = XEXP(x, 0);
-+ if(REGNO(op[2]) == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 5;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ } else {
-+ *l = 1;
-+ return (AS2 (std,%0,%1));
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 5;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ } else {
-+ *l = 1;
-+ return (AS2 (std,%0,%1));
-+ }
-+ }
- }
- *l = 1;
- return AS2 (st,%0,%1);
-@@ -3493,109 +3835,162 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (reg_base == REG_X)
- {
- if (reg_src == REG_X)
-- {
-- /* "st X+,r26" and "st -X,r26" are undefined. */
-- if (!mem_volatile_p && reg_unused_after (insn, src))
-- return *l=4, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-- AS2 (st,X,__tmp_reg__))
-- : (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X,__tmp_reg__));
-- else
-- {
-- if (!AVR_XMEGA)
-- return *l=5, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-- AS2 (st,X,__tmp_reg__) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)) CR_TAB
-- AS2 (st,X,r26))
-- : (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X,__tmp_reg__) CR_TAB
-- AS2 (sbiw,r26,1) CR_TAB
-- AS2 (st,X,r26));
-- else
-- return *l=5, AVR_TINY ? (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-- AS2 (st,X,__tmp_reg__) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)))
-- : (AS2 (mov,__tmp_reg__,r27) CR_TAB
-- AS2 (st,X,r26) CR_TAB
-- AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X,__tmp_reg__) CR_TAB
-- AS2 (sbiw,r26,1));
-- }
-+ {
-+ /* "st X+,r26" and "st -X,r26" are undefined. */
-+ if (!mem_volatile_p && reg_unused_after (insn, src)) {
-+ if (AVR_TINY) {
-+ *l = 5;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,__tmp_reg__));
-+ } else {
-+ *l = 4;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X,__tmp_reg__));
-+ }
-+ }
-+ else
-+ {
-+ if (!AVR_XMEGA) {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)) CR_TAB
-+ AS2 (st,X,r26));
-+ } else {
-+ *l = 5;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (sbiw,r26,1) CR_TAB
-+ AS2 (st,X,r26));
-+ }
-+ }
-+ else {
-+ if (AVR_TINY) {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)));
-+ } else {
-+ *l = 5;
-+ return (AS2 (mov,__tmp_reg__,r27) CR_TAB
-+ AS2 (st,X,r26) CR_TAB
-+ AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X,__tmp_reg__) CR_TAB
-+ AS2 (sbiw,r26,1));
-+ }
-+ }
- }
-+ }
- else
- {
- if (!mem_volatile_p && reg_unused_after (insn, base))
- return *l=2, (AS2 (st,X+,%A1) CR_TAB
- AS2 (st,X,%B1));
- else
-- {
-- if (!AVR_XMEGA)
-- return *l=3, AVR_TINY ? (AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (st,-X,%A1))
-- : (AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (st,-X,%A1));
-- else
-- return *l=3, AVR_TINY ? (AS2 (st,X+,%A1) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (subi,r26,lo8(1)) CR_TAB
-- AS2 (sbci,r27,hi8(1)))
-- : (AS2 (st,X+,%A1) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (sbiw,r26,1));
-- }
-+ {
-+ if (!AVR_XMEGA) {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1));
-+ } else {
-+ *l = 3;
-+ return (AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1));
-+ }
-+ } else {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (subi,r26,lo8(1)) CR_TAB
-+ AS2 (sbci,r27,hi8(1)));
-+ } else {
-+ *l = 3;
-+ return (AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (sbiw,r26,1));
-+ }
-+ }
-+ }
- }
- }
- else
- {
- if (!AVR_XMEGA)
- {
-- if(reg_base == REG_Y)
-- return *l=2, AVR_TINY ? (AS2 (subi,r28,lo8(-1)) CR_TAB
-- AS2 (sbci,r29,hi8(-1)) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (st,-Y,%A1))
-- : (AS2 (std,%0+1,%B1) CR_TAB
-- AS2 (st,%0,%A1));
-- if(reg_base == REG_Z)
-- return *l=2, AVR_TINY ? (AS2 (subi,r30,lo8(-1)) CR_TAB
-- AS2 (sbci,r31,hi8(-1)) CR_TAB
-- AS2 (st,Z,%B1) CR_TAB
-- AS2 (st,-Z,%A1))
-- : (AS2 (std,%0+1,%B1) CR_TAB
-- AS2 (st,%0,%A1));
-+ if(reg_base == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (subi,r28,lo8(-1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-1)) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1));
-+ } else {
-+ *l = 2;
-+ return (AS2 (std,%0+1,%B1) CR_TAB
-+ AS2 (st,%0,%A1));
-+ }
-+ }
-+ if(reg_base == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (subi,r30,lo8(-1)) CR_TAB
-+ AS2 (sbci,r31,hi8(-1)) CR_TAB
-+ AS2 (st,Z,%B1) CR_TAB
-+ AS2 (st,-Z,%A1));
-+ } else {
-+ *l = 2;
-+ return (AS2 (std,%0+1,%B1) CR_TAB
-+ AS2 (st,%0,%A1));
-+ }
-+ }
- }
- else
- {
-- if(reg_base == REG_Y)
-- return *l=2, AVR_TINY ? (AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (subi,r28,lo8(1)) CR_TAB
-- AS2 (sbci,r29,hi8(1)))
-- : (AS2 (st,%0,%A1) CR_TAB
-- AS2 (std,%0+1,%B1));
-- if(reg_base == REG_Z)
-- return *l=2, AVR_TINY ? (AS2 (st,Z+,%A1) CR_TAB
-- AS2 (st,Z,%B1) CR_TAB
-- AS2 (subi,r30,lo8(1)) CR_TAB
-- AS2 (sbci,r31,hi8(1)))
-- : (AS2 (st,%0,%A1) CR_TAB
-- AS2 (std,%0+1,%B1));
-+ if(reg_base == REG_Y) {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1));
-+ }
-+ }
-+ if(reg_base == REG_Z) {
-+ if (AVR_TINY) {
-+ *l = 4;
-+ return (AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z,%B1) CR_TAB
-+ AS2 (subi,r30,lo8(1)) CR_TAB
-+ AS2 (sbci,r31,hi8(1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (st,%0,%A1) CR_TAB
-+ AS2 (std,%0+1,%B1));
-+ }
-+ }
- }
- }
- }
-@@ -3610,69 +4005,91 @@ out_movhi_mr_r (rtx insn, rtx op[], int
-
- if (!AVR_XMEGA)
- {
-- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 4, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-62))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o0-62))) CR_TAB
-- AS2 (subi,r28,lo8(-63)) CR_TAB
-- AS2 (sbci,r29,hi8(-63)) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (st,-Y,%A1) CR_TAB
-- AS2 (subi,r28,lo8(62)) CR_TAB
-- AS2 (sbci,r29,hi8(62)) CR_TAB
-- AS2 (subi,r28,lo8(%o0-62)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0-62)))
-- : (AS2 (adiw,r28,%o0-62) CR_TAB
-- AS2 (std,Y+63,%B1) CR_TAB
-- AS2 (std,Y+62,%A1) CR_TAB
-- AS2 (sbiw,r28,%o0-62));
--
-- return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-- AS2 (subi,r28,lo8(-1)) CR_TAB
-- AS2 (sbci,r29,hi8(-1)) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (st,-Y,%A1) CR_TAB
-- AS2 (subi,r28,lo8(%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0)))
-- : (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-- AS2 (std,Y+1,%B1) CR_TAB
-- AS2 (st,Y,%A1) CR_TAB
-- AS2 (subi,r28,lo8(%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0)));
-+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest))) {
-+ if (AVR_TINY) {
-+ *l = 10;
-+ return (AS2 (subi,r28,lo8(-(%o0-62))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-62))) CR_TAB
-+ AS2 (subi,r28,lo8(-63)) CR_TAB
-+ AS2 (sbci,r29,hi8(-63)) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1) CR_TAB
-+ AS2 (subi,r28,lo8(62)) CR_TAB
-+ AS2 (sbci,r29,hi8(62)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-62)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r28,%o0-62) CR_TAB
-+ AS2 (std,Y+63,%B1) CR_TAB
-+ AS2 (std,Y+62,%A1) CR_TAB
-+ AS2 (sbiw,r28,%o0-62));
-+ }
-+ }
-+
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (subi,r28,lo8(-1)) CR_TAB
-+ AS2 (sbci,r29,hi8(-1)) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (std,Y+1,%B1) CR_TAB
-+ AS2 (st,Y,%A1) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ }
- }
- else
- {
-- if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
-- return *l = 4, AVR_TINY ? (AS2 (subi,r28,lo8(-(%o0-62))) CR_TAB
-- AS2 (sbci,r29,hi8(-(%o0-62))) CR_TAB
-- AS2 (subi,r28,lo8(-62)) CR_TAB
-- AS2 (sbci,r29,hi8(-62)) CR_TAB
-- AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,hi8(63)) CR_TAB
-- AS2 (subi,r28,lo8(%o0-62)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0-62)))
-- : (AS2 (adiw,r28,%o0-62) CR_TAB
-- AS2 (std,Y+62,%A1) CR_TAB
-- AS2 (std,Y+63,%B1) CR_TAB
-- AS2 (sbiw,r28,%o0-62));
-+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest))) {
-+ if (AVR_TINY) {
-+ *l = 10;
-+ return (AS2 (subi,r28,lo8(-(%o0-62))) CR_TAB
-+ AS2 (sbci,r29,hi8(-(%o0-62))) CR_TAB
-+ AS2 (subi,r28,lo8(-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(-62)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0-62)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0-62)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r28,%o0-62) CR_TAB
-+ AS2 (std,Y+62,%A1) CR_TAB
-+ AS2 (std,Y+63,%B1) CR_TAB
-+ AS2 (sbiw,r28,%o0-62));
-+ }
-+ }
-
-- return *l = 6, AVR_TINY ? (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-- AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (subi,r28,lo8(1)) CR_TAB
-- AS2 (sbci,r29,hi8(1)) CR_TAB
-- AS2 (subi,r28,lo8(%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0)))
-- : (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-- AS2 (st,Y,%A1) CR_TAB
-- AS2 (std,Y+1,%B1) CR_TAB
-- AS2 (subi,r28,lo8(%o0)) CR_TAB
-- AS2 (sbci,r29,hi8(%o0)));
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(1)) CR_TAB
-+ AS2 (sbci,r29,hi8(1)) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ } else {
-+ *l = 6;
-+ return (AS2 (subi,r28,lo8(-%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
-+ AS2 (st,Y,%A1) CR_TAB
-+ AS2 (std,Y+1,%B1) CR_TAB
-+ AS2 (subi,r28,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r29,hi8(%o0)));
-+ }
- }
- }
- if (reg_base == REG_X)
-@@ -3681,121 +4098,164 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- if (reg_src == REG_X)
- {
- if (!AVR_XMEGA)
-- {
-- *l = 7;
-- return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (subi,r26,lo8(-(%o0+1))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0+1))) CR_TAB
-- AS2 (st,X,__zero_reg__) CR_TAB
-- AS2 (st,-X,__tmp_reg__) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (subi,r26,lo8(%o0)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0)))
-- : (AS2 (mov,__tmp_reg__,r26) CR_TAB
-- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (adiw,r26,%o0+1) CR_TAB
-- AS2 (st,X,__zero_reg__) CR_TAB
-- AS2 (st,-X,__tmp_reg__) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (sbiw,r26,%o0));
-- }
-+ {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0+1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0+1))) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS2 (st,-X,__tmp_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)));
-+ } else {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (adiw,r26,%o0+1) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS2 (st,-X,__tmp_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (sbiw,r26,%o0));
-+ }
-+ }
- else
-- {
-- *l = 7;
-- return AVR_TINY ? (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ {
-+ if (AVR_TINY) {
-+ *l = 9;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
- AS2 (st,X+,__tmp_reg__) CR_TAB
- AS2 (st,X,__zero_reg__) CR_TAB
- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (subi,r26,lo8(%o0+1)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0+1)))
-- : (AS2 (mov,__tmp_reg__,r26) CR_TAB
-- AS2 (mov,__zero_reg__,r27) CR_TAB
-- AS2 (adiw,r26,%o0+1) CR_TAB
-- AS2 (st,X+,__tmp_reg__) CR_TAB
-- AS2 (st,X,__zero_reg__) CR_TAB
-- AS1 (clr,__zero_reg__) CR_TAB
-- AS2 (sbiw,r26,%o0));
--
-- }
-+ AS2 (subi,r26,lo8(%o0+1)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0+1)));
-+ } else {
-+ *l = 7;
-+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
-+ AS2 (mov,__zero_reg__,r27) CR_TAB
-+ AS2 (adiw,r26,%o0+1) CR_TAB
-+ AS2 (st,X+,__tmp_reg__) CR_TAB
-+ AS2 (st,X,__zero_reg__) CR_TAB
-+ AS1 (clr,__zero_reg__) CR_TAB
-+ AS2 (sbiw,r26,%o0));
-+ }
-+ }
- }
- if (!AVR_XMEGA)
-- {
-- *l = 4;
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0+1))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0+1))) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (st,-X,%A1) CR_TAB
-- AS2 (subi,r26,lo8(%o0)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0)))
-- : (AS2 (adiw,r26,%o0+1) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (st,-X,%A1) CR_TAB
-- AS2 (sbiw,r26,%o0));
-- }
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,r26,lo8(-(%o0+1))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0+1))) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r26,%o0+1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1) CR_TAB
-+ AS2 (sbiw,r26,%o0));
-+ }
-+ }
- else
-- {
-- *l = 4;
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-- AS2 (st,X+,%A1) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (subi,r26,lo8(%o0)) CR_TAB
-- AS2 (sbci,r27,hi8(%o0)))
-- : (AS2 (adiw,r26,%o0) CR_TAB
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,r26,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,r27,hi8(-(%o0))) CR_TAB
-+ AS2 (st,X+,%A1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (subi,r26,lo8(%o0)) CR_TAB
-+ AS2 (sbci,r27,hi8(%o0)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r26,%o0) CR_TAB
- AS2 (st,X+,%A1) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (sbiw,r26,%o0+1));
- }
-+ }
- }
-
- if (!AVR_XMEGA)
-- {
-- op[2] = XEXP(base, 0);
-- if(REGNO(op[2]) == REG_Y)
-- return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0+2))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0+2))) CR_TAB
-- AS2 (st,-Y,%B1) CR_TAB
-- AS2 (st,-Y,%A1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0)))
-- : (AS2 (std,%B0,%B1) CR_TAB
-+ {
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,%A2,lo8(-(%o0+2))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0+2))) CR_TAB
-+ AS2 (st,-Y,%B1) CR_TAB
-+ AS2 (st,-Y,%A1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (std,%B0,%B1) CR_TAB
- AS2 (std,%A0,%A1));
-- if(REGNO(op[2]) == REG_Z)
-- return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0+2))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0+2))) CR_TAB
-- AS2 (st,-Z,%B1) CR_TAB
-- AS2 (st,-Z,%A1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0)))
-- : (AS2 (std,%B0,%B1) CR_TAB
-- AS2 (std,%A0,%A1));
-- }
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z)
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,%A2,lo8(-(%o0+2))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0+2))) CR_TAB
-+ AS2 (st,-Z,%B1) CR_TAB
-+ AS2 (st,-Z,%A1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (std,%B0,%B1) CR_TAB
-+ AS2 (std,%A0,%A1));
-+ }
-+ }
-+ }
- else
-- {
-- op[2] = XEXP(base, 0);
-- if(REGNO(op[2]) == REG_Y)
-- return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Y+,%A1) CR_TAB
-- AS2 (st,Y,%B1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0+1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0+1)))
-- : (AS2 (std,%A0,%A1) CR_TAB
-- AS2 (std,%B0,%B1));
-- if(REGNO(op[2]) == REG_Z)
-- return *l=2, AVR_TINY ? (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Z+,%A1) CR_TAB
-- AS2 (st,Z,%B1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0+1)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0+1)))
-- : (AS2 (std,%A0,%A1) CR_TAB
-- AS2 (std,%B0,%B1));
-- }
-+ {
-+ op[2] = XEXP(base, 0);
-+ if(REGNO(op[2]) == REG_Y)
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y+,%A1) CR_TAB
-+ AS2 (st,Y,%B1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1));
-+ }
-+ }
-+ if(REGNO(op[2]) == REG_Z)
-+ {
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z+,%A1) CR_TAB
-+ AS2 (st,Z,%B1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0+1)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0+1)));
-+ } else {
-+ *l = 2;
-+ return (AS2 (std,%A0,%A1) CR_TAB
-+ AS2 (std,%B0,%B1));
-+ }
-+ }
-+ }
- }
- else if (GET_CODE (base) == PRE_DEC) /* (--R) */
- {
-@@ -3814,33 +4274,41 @@ out_movhi_mr_r (rtx insn, rtx op[], int
- {
- if (REGNO (XEXP (base, 0)) == REG_X)
- {
-- *l = 4;
-- return AVR_TINY ? (AS2 (subi,r26,lo8(-1)) CR_TAB
-- AS2 (sbci,r27,hi8(-1)) CR_TAB
-+ if (AVR_TINY) {
-+ *l = 6;
-+ return (AS2 (subi,r26,lo8(-1)) CR_TAB
-+ AS2 (sbci,r27,hi8(-1)) CR_TAB
- AS2 (st,X,%B1) CR_TAB
- AS2 (st,-X,%A1) CR_TAB
-- AS2 (subi,r26,lo8(-2)) CR_TAB
-- AS2 (sbci,r27,hi8(-2)))
-- : (AS2 (adiw,r26,1) CR_TAB
-- AS2 (st,X,%B1) CR_TAB
-- AS2 (st,-X,%A1) CR_TAB
-- AS2 (adiw,r26,2));
-+ AS2 (subi,r26,lo8(-2)) CR_TAB
-+ AS2 (sbci,r27,hi8(-2)));
-+ } else {
-+ *l = 4;
-+ return (AS2 (adiw,r26,1) CR_TAB
-+ AS2 (st,X,%B1) CR_TAB
-+ AS2 (st,-X,%A1) CR_TAB
-+ AS2 (adiw,r26,2));
-+ }
- }
- else
- {
-- //FIXME:check the code once again for AVR_TINY
-- *l = 3;
-- return AVR_TINY ? (AS2 (subi,%A0,lo8(-1)) CR_TAB
-- AS2 (sbci,%B0,hi8(-1)) CR_TAB
-- AS2 (st,%p0,%B1) CR_TAB
-- AS2 (subi,%A0,lo8(1)) CR_TAB
-- AS2 (sbci,%B0,hi8(1)) CR_TAB
-+ //FIXME:check the code once again for AVR_TINY
-+ if (AVR_TINY) {
-+ *l = 8;
-+ return (AS2 (subi,%A0,lo8(-1)) CR_TAB
-+ AS2 (sbci,%B0,hi8(-1)) CR_TAB
-+ AS2 (st,%p0,%B1) CR_TAB
-+ AS2 (subi,%A0,lo8(1)) CR_TAB
-+ AS2 (sbci,%B0,hi8(1)) CR_TAB
- AS2 (st,%p0,%A1) CR_TAB
- AS2 (subi,%A0,lo8(-3)) CR_TAB
-- AS2 (sbci,%B0,hi8(-3)))
-- : (AS2 (std,%p0+1,%B1) CR_TAB
-- AS2 (st,%p0,%A1) CR_TAB
-- AS2 (adiw,%r0,2));
-+ AS2 (sbci,%B0,hi8(-3)));
-+ } else {
-+ *l = 3;
-+ return (AS2 (std,%p0+1,%B1) CR_TAB
-+ AS2 (st,%p0,%A1) CR_TAB
-+ AS2 (adiw,%r0,2));
-+ }
- }
- }
-
-@@ -3927,10 +4395,14 @@ out_tsthi (rtx insn, rtx op, int *l)
- }
- if (test_hard_reg_class (ADDW_REGS, op))
- {
-- if (l) *l = 1;
-- return AVR_TINY ? (AS2 (subi,%A0,lo8(0)) CR_TAB
-- AS2 (sbci,%B0,hi8(0)))
-- : AS2 (sbiw,%0,0);
-+ if (AVR_TINY) {
-+ if (l) *l = 2;
-+ return (AS2 (subi,%A0,lo8(0)) CR_TAB
-+ AS2 (sbci,%B0,hi8(0)));
-+ } else {
-+ if (l) *l = 1;
-+ return (AS2 (sbiw,%0,0));
-+ }
- }
- if (l) *l = 2;
- return (AS2 (cp,%A0,__zero_reg__) CR_TAB
-@@ -3950,14 +4422,18 @@ out_tstsi (rtx insn, rtx op, int *l)
- }
- if (test_hard_reg_class (ADDW_REGS, op))
- {
-- if (l) *l = 3;
-- return AVR_TINY ? (AS2 (subi,%A0,lo8(-(-0))) CR_TAB
-- AS2 (sbci,%B0,hi8(-(-0))) CR_TAB
-+ if (AVR_TINY) {
-+ if (l) *l = 4;
-+ return (AS2 (subi,%A0,lo8(-(-0))) CR_TAB
-+ AS2 (sbci,%B0,hi8(-(-0))) CR_TAB
- AS2 (cpc,%C0,__zero_reg__) CR_TAB
-- AS2 (cpc,%D0,__zero_reg__))
-- : (AS2 (sbiw,%A0,0) CR_TAB
-- AS2 (cpc,%C0,__zero_reg__) CR_TAB
-- AS2 (cpc,%D0,__zero_reg__));
-+ AS2 (cpc,%D0,__zero_reg__));
-+ } else {
-+ if (l) *l = 3;
-+ return (AS2 (sbiw,%A0,0) CR_TAB
-+ AS2 (cpc,%C0,__zero_reg__) CR_TAB
-+ AS2 (cpc,%D0,__zero_reg__));
-+ }
- }
- if (l) *l = 4;
- return (AS2 (cp,%A0,__zero_reg__) CR_TAB
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-07-13 16:06:56.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-07-13 15:23:01.000000000 +0530
-@@ -2265,6 +2265,15 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- {
- if (AVR_TINY)
- {
-+ if (reg_overlap_mentioned_p (dest, XEXP (x,0))
-+ || reg_unused_after (insn, XEXP (x,0)))
-+ {
-+
-+ *l = 3;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,Y));
-+ }
- *l = 5;
- return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-@@ -2282,6 +2291,15 @@ out_movqi_r_mr (rtx insn, rtx op[], int
- {
- if (AVR_TINY)
- {
-+ if (reg_overlap_mentioned_p (dest, XEXP (x,0))
-+ || reg_unused_after (insn, XEXP (x,0)))
-+ {
-+
-+ *l = 3;
-+ return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-+ AS2 (ld,%0,Z));
-+ }
- *l = 5;
- return (AS2 (subi,%A2,lo8(-(%o1))) CR_TAB
- AS2 (sbci,%B2,hi8(-(%o1))) CR_TAB
-@@ -3766,12 +3784,41 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- op[2] = XEXP(x, 0);
- if(REGNO(op[2]) == REG_Y) {
- if (AVR_TINY) {
-- *l = 5;
-- return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Y,%1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0)));
-+ if (reg_overlap_mentioned_p (src, XEXP (x, 0)))
-+ {
-+ if (reg_unused_after (insn, XEXP (x, 0)))
-+ {
-+ *l = 4;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y,__tmp_reg__));
-+ }
-+ *l = 6;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y,__tmp_reg__) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ }
-+ else
-+ {
-+ if (reg_unused_after (insn, XEXP (x, 0)))
-+ {
-+ *l = 3;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y,%1));
-+ }
-+
-+ *l = 5;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Y,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ }
- } else {
- *l = 1;
- return (AS2 (std,%0,%1));
-@@ -3779,12 +3826,40 @@ out_movqi_mr_r (rtx insn, rtx op[], int
- }
- if(REGNO(op[2]) == REG_Z) {
- if (AVR_TINY) {
-- *l = 5;
-- return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-- AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-- AS2 (st,Z,%1) CR_TAB
-- AS2 (subi,%A2,lo8(%o0)) CR_TAB
-- AS2 (sbci,%B2,hi8(%o0)));
-+ if (reg_overlap_mentioned_p (src, XEXP (x, 0)))
-+ {
-+ if (reg_unused_after (insn, XEXP (x, 0)))
-+ {
-+ *l = 4;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z,__tmp_reg__));
-+ }
-+ *l = 6;
-+ return (AS2 (mov,__tmp_reg__,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z,__tmp_reg__) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ }
-+ else
-+ {
-+ if (reg_unused_after (insn, XEXP (x, 0)))
-+ {
-+ *l = 3;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z,%1));
-+ }
-+ *l = 5;
-+ return (AS2 (subi,%A2,lo8(-(%o0))) CR_TAB
-+ AS2 (sbci,%B2,hi8(-(%o0))) CR_TAB
-+ AS2 (st,Z,%1) CR_TAB
-+ AS2 (subi,%A2,lo8(%o0)) CR_TAB
-+ AS2 (sbci,%B2,hi8(%o0)));
-+ }
- } else {
- *l = 1;
- return (AS2 (std,%0,%1));
+++ /dev/null
-diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2012-07-16 11:46:50.000000000 +0530
-+++ gcc/config/avr/avr.c 2012-07-16 11:54:05.000000000 +0530
-@@ -3267,7 +3267,7 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,Y+,%C1) CR_TAB
- AS2 (st,Y,%D1) CR_TAB
- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,lo8(3)));
-+ AS2 (sbci,r29,hi8(3)));
- } else {
- *l = 4;
- return (AS2 (st,%0,%A1) CR_TAB
-@@ -3284,7 +3284,7 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,Z+,%C1) CR_TAB
- AS2 (st,Z,%D1) CR_TAB
- AS2 (subi,r30,lo8(3)) CR_TAB
-- AS2 (sbci,r31,lo8(3)));
-+ AS2 (sbci,r31,hi8(3)));
- } else {
- *l = 4;
- return (AS2 (st,%0,%A1) CR_TAB
-@@ -3310,13 +3310,13 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- return (AS2 (subi,r28,lo8(-(%o0-60))) CR_TAB
- AS2 (sbci,r29,hi8(-(%o0-60))) CR_TAB
- AS2 (subi,r28,lo8(-60)) CR_TAB
-- AS2 (sbci,r29,lo8(-60)) CR_TAB
-+ AS2 (sbci,r29,hi8(-60)) CR_TAB
- AS2 (st,Y+,%A1) CR_TAB
- AS2 (st,Y+,%B1) CR_TAB
- AS2 (st,Y+,%C1) CR_TAB
- AS2 (st,Y,%D1) CR_TAB
- AS2 (subi,r28,lo8(63)) CR_TAB
-- AS2 (sbci,r29,lo8(63)) CR_TAB
-+ AS2 (sbci,r29,hi8(63)) CR_TAB
- AS2 (subi,r28,lo8(%o0-60)) CR_TAB
- AS2 (sbci,r29,hi8(%o0-60)));
- } else {
-@@ -3338,7 +3338,7 @@ out_movsi_mr_r (rtx insn, rtx op[], int
- AS2 (st,Y+,%C1) CR_TAB
- AS2 (st,Y,%D1) CR_TAB
- AS2 (subi,r28,lo8(3)) CR_TAB
-- AS2 (sbci,r29,lo8(3)) CR_TAB
-+ AS2 (sbci,r29,hi8(3)) CR_TAB
- AS2 (subi,r28,lo8(%o0)) CR_TAB
- AS2 (sbci,r29,hi8(%o0)));
- } else {
+++ /dev/null
-diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2012-10-25 13:28:05.000000000 +0530
-+++ gcc/config/avr/avr-devices.c 2012-10-25 13:30:18.000000000 +0530
-@@ -72,7 +72,6 @@ const struct mcu_type_s avr_mcu_types[]
- { "at90s8535", ARCH_AVR2, "__AVR_AT90S8535__", 0, 0x0060, "s8535" },
- /* Classic, <= 8K + 2-byte PC + { MOVW/LPMX }. */
- { "avr25", ARCH_AVR25, NULL, 0, 0x0060, "tn85" },
-- { "ata6289", ARCH_AVR25, "__AVR_ATA6289__", 0, 0x0100, "a6289" },
- { "ata5272", ARCH_AVR25, "__AVR_ATA5272__", 0, 0x0100, "a5272" },
- { "attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0x0060, "tn13" },
- { "attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0x0060, "tn13a" },
-@@ -123,6 +122,7 @@ const struct mcu_type_s avr_mcu_types[]
- { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
- { "ata6285", ARCH_AVR4, "__AVR_ATA6285__", 0, 0x0100, "a6285" },
- { "ata6286", ARCH_AVR4, "__AVR_ATA6286__", 0, 0x0100, "a6286" },
-+ { "ata6289", ARCH_AVR4, "__AVR_ATA6289__", 0, 0x0100, "a6289" },
- { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
- { "atmega8a", ARCH_AVR4, "__AVR_ATmega8A__", 0, 0x0060, "m8a" },
- { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
-diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2012-10-25 13:28:05.000000000 +0530
-+++ gcc/config/avr/t-avr 2012-10-25 13:31:25.000000000 +0530
-@@ -113,7 +113,6 @@ MULTILIB_DIRNAMES = avr2 avr25 avr3 avr3
- # The many avr2 matches are not listed here - this is the default.
- MULTILIB_MATCHES = \
- mmcu?avr25=mmcu?ata5272 \
-- mmcu?avr25=mmcu?ata6289 \
- mmcu?avr25=mmcu?attiny13 \
- mmcu?avr25=mmcu?attiny13a \
- mmcu?avr25=mmcu?attiny2313 \
-@@ -157,6 +156,7 @@ MULTILIB_MATCHES = \
- mmcu?avr35=mmcu?attiny327 \
- mmcu?avr4=mmcu?ata6285 \
- mmcu?avr4=mmcu?ata6286 \
-+ mmcu?avr4=mmcu?ata6289 \
- mmcu?avr4=mmcu?atmega48 \
- mmcu?avr4=mmcu?atmega48a \
- mmcu?avr4=mmcu?atmega48pa \
Summary(pt_BR.UTF-8): Utilitários para desenvolvimento de binários da GNU - AVR gcc
Summary(tr.UTF-8): GNU geliştirme araçları - AVR gcc
Name: crossavr-gcc
-Version: 4.6.2
-Release: 6
+Version: 4.7.3
+Release: 1
Epoch: 1
-Patch1: gcc-bug51969.patch
-# Patches 1xx are taken form Atmel official AVR8-GNU toolchain version 3.4.1.830
-Patch100: 200-gcc-libiberty-Makefile.in.patch
-Patch101: 300-gcc-fixedpoint-3-4-2010.patch
-Patch102: 301-gcc-xmega-v14.patch
-Patch103: 302-gcc-avrtiny10.patch
-Patch104: 303-gcc-osmain.patch
-Patch105: 304-gcc-builtins-v6.patch
-Patch106: 305-gcc-avrtiny10-non-fixedpoint.patch
-Patch107: 306-gcc-option-list-devices.patch
-Patch108: 307-gcc-avrtc536.patch
-Patch109: 308-gcc-avrtc537.patch
-Patch110: 400-gcc-new-devices.patch
-Patch111: 401-gcc-atmega32_5_50_90_pa.patch
-Patch112: 402-gcc-attiny1634.patch
-Patch113: 403-gcc-atmega48pa.patch
-Patch114: 404-gcc-atxmega_16_32_a4u.patch
-Patch115: 405-gcc-atxmega64_128_192_256a3u.patch
-Patch116: 406-gcc-atmegarfr2_a2.patch
-Patch117: 407-gcc-atmega165pa.patch
-Patch118: 408-gcc-atxmega384c3.patch
-Patch119: 410-gcc-atxmega128a4u.patch
-Patch120: 411-gcc-atxmega64d4.patch
-Patch121: 412-gcc-atmega164pa_168pa_32a_64a.patch
-Patch122: 413-gcc-atxmega64_128_b3.patch
-Patch123: 414-gcc-atxmega64b1.patch
-Patch124: 415-gcc-atmega_8a_128a_1284.patch
-Patch125: 416-gcc-atxmega64a4u.patch
-Patch126: 417-gcc-atxmega128d4.patch
-Patch127: 418-gcc-atmxt336s.patch
-Patch128: 419-gcc-atxmega16c4_32c4_128c3_256c3.patch
-Patch129: 420-gcc-atxmega384d3.patch
-Patch130: 421-gcc-atmega48hvf.patch
-Patch131: 422-gcc-atmega26hvg.patch
-Patch132: 423-gcc-atmxt224_224e.patch
-Patch133: 424-gcc-atxmega192c3.patch
-Patch134: 425-gcc-atmxt112sl.patch
-Patch135: 426-gcc-atxmega64c3.patch
-Patch136: 427-gcc-ata6285_6286.patch
-Patch137: 428-gcc-attiny828.patch
-Patch138: 429-gcc-ata5790_5790n_5795.patch
-Patch139: 430-gcc-ata5272_ata5505.patch
-Patch140: 431-gcc-atmxt540s.patch
-Patch141: 432-gcc-ata5831.patch
-Patch142: 433-gcc-attiny841.patch
-Patch143: 434-gcc-atxmega32_16_8e5.patch
-Patch144: 500-gcc-bug13473.patch
-Patch145: 501-gcc-avrtiny10-bug-12510.patch
-Patch146: 502-gcc-bug12915.patch
-Patch147: 503-gcc-bug13789.patch
-Patch148: 504-gcc-conditional-register.patch
-Patch149: 505-gcc-avrtc381-tiny.patch
-Patch150: 506-gcc-avrtc541.patch
-Patch151: 507-gcc-avrtc-518.patch
-Patch152: 508-gcc-avrtc514-tiny.patch
-Patch153: 509-gcc-AVRTC-544-call-used-registers-tiny10.patch
-Patch154: 510-gcc-avrtc496-tiny.patch
-Patch155: 511-gcc-avrtc539-backported.patch
-Patch156: 512-gcc-avrtc542.patch
-Patch157: 513-gcc-avrtc556-tiny-same-base-and-dest.patch
-Patch158: 514-gcc-avrtc558.patch
-Patch159: 515-gcc-avrtc446.patch
+# Patches 1xx are taken form Atmel official AVR8-GNU toolchain version 3.4.2
+# http://distribute.atmel.no/tools/opensource/Atmel-AVR-Toolchain-3.4.2/avr/avr-patches.tar.gz
+Patch100: 300-gcc-xmega-support.patch
+Patch101: 301-gcc-tiny-support.patch
+Patch102: 302-gcc-mlist-devices.patch
+Patch103: 303-ata6289-architecture-correction.patch
+Patch104: 400-gcc-public-devices-support.patch
+Patch105: 401-gcc-non-public-devices-support.patch
+Patch106: 402-gcc-atmega64_128_2564RFR2.patch
+Patch107: 403-gcc-atmxts200.patch
+Patch108: 501-gcc-avrtc579.patch
+Patch109: 502-gcc-pr54796.patch
+Patch110: 503-gcc-avrtc-513.patch
+Patch111: 504-gcc-avrtc-610.patch
+Patch112: 505-gcc-avrtc586.patch
License: GPL
Group: Development/Languages
Source0: ftp://gcc.gnu.org/pub/gcc/releases/gcc-%{version}/gcc-%{version}.tar.bz2
-# Source0-md5: 028115c4fbfb6cfd75d6369f4a90d87e
+# Source0-md5: 86f428a30379bdee0224e353ee2f999e
BuildRequires: /bin/bash
BuildRequires: autoconf
BuildRequires: bison
-BuildRequires: crossavr-binutils
+BuildRequires: crossavr-binutils >= 2.23.1
BuildRequires: elfutils-devel >= 0.145-1
BuildRequires: flex
BuildRequires: gmp-devel >= 4.1
BuildRequires: ppl-devel
BuildRequires: rpmbuild(macros) >= 1.565
BuildRequires: sed >= 4.0
-Requires: crossavr-binutils >= 2.15.91.0.2
+Requires: crossavr-binutils >= 2.23.1
%{!?with_bootstrap:Requires: crossavr-libc}
Requires: gcc-dirs
BuildRoot: %{tmpdir}/%{name}-%{version}-root-%(id -u -n)
%prep
%setup -q -n gcc-%{version}
cd gcc/config/%{target} && %undos -f c,h && cd -
-%patch1 -p2
%patch100 -p0
-%patch101 -p0
+#patch101 -p0
%patch102 -p0
%patch103 -p0
-%patch104 -p0
-%patch105 -p0
-%patch106 -p0
-%patch107 -p0
-%patch108 -p0
+#patch104 -p0
+#patch105 -p0
+#patch106 -p0
+#patch107 -p0
+#patch108 -p0
%patch109 -p0
-%patch110 -p0
+#patch110 -p0
%patch111 -p0
-%patch112 -p0
-%patch113 -p0
-%patch114 -p0
-%patch115 -p0
-%patch116 -p0
-%patch117 -p0
-%patch118 -p0
-%patch119 -p0
-%patch120 -p0
-%patch121 -p0
-%patch122 -p0
-%patch123 -p0
-%patch124 -p0
-%patch125 -p0
-%patch126 -p0
-%patch127 -p0
-%patch128 -p0
-%patch129 -p0
-%patch130 -p0
-%patch131 -p0
-%patch132 -p0
-%patch133 -p0
-%patch134 -p0
-%patch135 -p0
-%patch136 -p0
-%patch137 -p0
-%patch138 -p0
-%patch139 -p0
-%patch140 -p0
-%patch141 -p0
-%patch142 -p0
-%patch143 -p0
-%patch144 -p0
-%patch145 -p0
-%patch146 -p0
-%patch147 -p0
-%patch148 -p0
-%patch149 -p0
-%patch150 -p0
-%patch151 -p0
-%patch152 -p0
-%patch153 -p0
-%patch154 -p0
-%patch155 -p0
-%patch156 -p0
-%patch157 -p0
-%patch158 -p0
-%patch159 -p0
+#patch112 -p0
%build
rm -rf obj-%{target}
%{gcclib}/libg*.a
%{gcclib}/%{target}*
%{gcclib}/plugin
+%dir %{gcclib}/tiny-stack
+%{gcclib}/tiny-stack/*.a
%dir %{gcclib}/include
%{gcclib}/include/*.h
%{_mandir}/man1/%{target}-cpp.1*
+++ /dev/null
---- branches/gcc-4_6-branch/gcc/gengtype.c 2012/02/14 23:26:47 184238
-+++ branches/gcc-4_6-branch/gcc/gengtype.c 2012/02/14 23:31:42 184239
-@@ -3594,14 +3594,13 @@
- int has_length, struct fileloc *line, const char *if_marked,
- bool emit_pch, type_p field_type, const char *field_name)
- {
-+ struct pair newv;
- /* If the field reference is relative to V, rather than to some
- subcomponent of V, we can mark any subarrays with a single stride.
- We're effectively treating the field as a global variable in its
- own right. */
- if (v && type == v->type)
- {
-- struct pair newv;
--
- newv = *v;
- newv.type = field_type;
- newv.name = ACONCAT ((v->name, ".", field_name, NULL));
projects / packages / crossavr-gcc.git / commitdiff