]> git.pld-linux.org Git - packages/kernel.git/commitdiff
updated arm/arm64 configs and patches for 6.1
authorJan Palus <atler@pld-linux.org>
Sun, 18 Dec 2022 17:48:05 +0000 (18:48 +0100)
committerJan Palus <atler@pld-linux.org>
Sun, 18 Dec 2022 17:48:05 +0000 (18:48 +0100)
kernel-arm.config
kernel-arm64.config
kernel-multiarch.config
kernel-pinebook-pro.patch

index 556793a0687dbe81f07fcafd595ae7c46ada83e4..4bb85de9a9438bbb6058827b747fb6c6f86fac71 100644 (file)
@@ -5,9 +5,6 @@
 ARM_DMA_IOMMU_ALIGNMENT arm=8
 MMU arm=y
 ARCH_MULTIPLATFORM arm=y
-ARCH_FOOTBRIDGE arm=n
-ARCH_RPC arm=n
-ARCH_SA1100 arm=n
 #- CPU Core family selection
 ARCH_MULTI_V6 armv6l=y armv6hl=y armv7l=n armv7hl=n armv7hnl=n
 ARCH_MULTI_V7 armv6l=y armv6hl=y armv7l=y armv7hl=y armv7hnl=y
@@ -59,6 +56,7 @@ ARCH_AIROHA arm=n
 #- file arch/arm/mach-qcom/Kconfig goes here
 #- file arch/arm/mach-rda/Kconfig goes here
 #- file arch/arm/mach-realtek/Kconfig goes here
+#- file arch/arm/mach-rpc/Kconfig goes here
 #- file arch/arm/mach-rockchip/Kconfig goes here
 #- file arch/arm/mach-s3c/Kconfig goes here
 #- file arch/arm/mach-s5pv210/Kconfig goes here
@@ -122,7 +120,7 @@ HIGHMEM arm=y
 HIGHPTE arm=y
 CPU_SW_DOMAIN_PAN arm=y
 ARM_MODULE_PLTS arm=y
-FORCE_MAX_ZONEORDER arm=11
+ARCH_FORCE_MAX_ORDER arm=11
 UACCESS_WITH_MEMCPY arm=y
 PARAVIRT arm=y
 PARAVIRT_TIME_ACCOUNTING arm=y
@@ -148,32 +146,8 @@ VFP arm=y
 NEON arm=y
 KERNEL_MODE_NEON arm=y
 #- file kernel/power/Kconfig goes here
-#- file arch/arm/crypto/Kconfig goes here
 #- file arch/arm/Kconfig.assembler goes here
 
-#-
-#- *** FILE: arch/arm/crypto/Kconfig ***
-#-
-ARM_CRYPTO arm=y
-CRYPTO_SHA1_ARM arm=m
-CRYPTO_SHA1_ARM_NEON arm=m
-CRYPTO_SHA1_ARM_CE arm=m
-CRYPTO_SHA2_ARM_CE arm=m
-CRYPTO_SHA256_ARM arm=m
-CRYPTO_SHA512_ARM arm=m
-CRYPTO_BLAKE2S_ARM arm=y
-CRYPTO_BLAKE2B_NEON arm=m
-CRYPTO_AES_ARM arm=m
-CRYPTO_AES_ARM_BS arm=m
-CRYPTO_AES_ARM_CE arm=m
-CRYPTO_GHASH_ARM_CE arm=m
-CRYPTO_CRCT10DIF_ARM_CE arm=m
-CRYPTO_CRC32_ARM_CE arm=m
-CRYPTO_CHACHA20_NEON arm=m
-CRYPTO_POLY1305_ARM arm=m
-CRYPTO_NHPOLY1305_NEON arm=m
-CRYPTO_CURVE25519_NEON arm=m
-
 #-
 #- *** FILE: arch/arm/mach-actions/Kconfig ***
 #-
@@ -252,6 +226,11 @@ ARCH_EP93XX arm=n
 ARCH_EXYNOS arm=n
 #- Exynos SoCs
 
+#-
+#- *** FILE: arch/arm/mach-footbridge/Kconfig ***
+#-
+ARCH_FOOTBRIDGE arm=n
+
 #-
 #- *** FILE: arch/arm/mach-highbank/Kconfig ***
 #-
@@ -385,6 +364,11 @@ ARCH_REALTEK arm=n
 #-
 ARCH_ROCKCHIP arm=n
 
+#-
+#- *** FILE: arch/arm/mach-rpc/Kconfig ***
+#-
+ARCH_RPC arm=n
+
 #-
 #- *** FILE: arch/arm/mach-s3c/Kconfig.s3c24xx ***
 #-
@@ -407,6 +391,11 @@ ARCH_S3C64XX arm=n
 #-
 ARCH_S5PV210 arm=n
 
+#-
+#- *** FILE: arch/arm/mach-sa1100/Kconfig ***
+#-
+ARCH_SA1100 arm=n
+
 #-
 #- *** FILE: arch/arm/mach-shmobile/Kconfig ***
 #-
index cf0396dca6882fdb8f0af791bdfe04f2f5c68b69..8d056eb331e67c7b02dac44de9ec0a8e964d2de3 100644 (file)
@@ -24,6 +24,7 @@ ARM64_ERRATUM_1542419 arm64=y
 ARM64_ERRATUM_1508412 arm64=y
 ARM64_ERRATUM_2051678 arm64=y
 ARM64_ERRATUM_2077057 arm64=n
+ARM64_ERRATUM_2658417 arm64=y
 ARM64_ERRATUM_2054223 arm64=y
 ARM64_ERRATUM_2067961 arm64=y
 ARM64_ERRATUM_2441009 arm64=y
@@ -66,6 +67,7 @@ ARM64_SW_TTBR0_PAN arm64=n
 ARM64_TAGGED_ADDR_ABI arm64=y
 COMPAT arm64=y
 KUSER_HELPERS arm64=y
+COMPAT_ALIGNMENT_FIXUPS arm64=y
 ARMV8_DEPRECATED arm64=y
 SWP_EMULATION arm64=y
 CP15_BARRIER_EMULATION arm64=y
@@ -100,7 +102,6 @@ DMI arm64=y
 #- file drivers/cpufreq/Kconfig goes here
 #- file drivers/acpi/Kconfig goes here
 #- file arch/arm64/kvm/Kconfig goes here
-#- file arch/arm64/crypto/Kconfig goes here
 
 #-
 #- *** FILE: arch/arm64/Kconfig.platforms ***
@@ -109,30 +110,31 @@ ARCH_ACTIONS arm64=n
 ARCH_SUNXI arm64=n
 ARCH_ALPINE arm64=n
 ARCH_APPLE arm64=n
+ARCH_BCM arm64=n
 ARCH_BCM2835 arm64=n
-ARCH_BCM4908 arm64=n
 ARCH_BCM_IPROC arm64=n
 ARCH_BCMBCA arm64=n
+ARCH_BRCMSTB arm64=n
 ARCH_BERLIN arm64=n
 ARCH_BITMAIN arm64=n
-ARCH_BRCMSTB arm64=n
 ARCH_EXYNOS arm64=n
 ARCH_SPARX5 arm64=n
 ARCH_K3 arm64=n
-ARCH_LAYERSCAPE arm64=n
 ARCH_LG1K arm64=n
 ARCH_HISI arm64=n
 ARCH_KEEMBAY arm64=n
 ARCH_MEDIATEK arm64=n
 ARCH_MESON arm64=y
 ARCH_MVEBU arm64=n
+ARCH_NXP arm64=n
+ARCH_LAYERSCAPE arm64=n
 ARCH_MXC arm64=n
+ARCH_S32 arm64=n
 ARCH_NPCM arm64=n
 ARCH_QCOM arm64=n
 ARCH_REALTEK arm64=n
 ARCH_RENESAS arm64=n
 ARCH_ROCKCHIP arm64=y
-ARCH_S32 arm64=n
 ARCH_SEATTLE arm64=n
 ARCH_INTEL_SOCFPGA arm64=n
 ARCH_SYNQUACER arm64=n
@@ -146,33 +148,6 @@ ARCH_VISCONTI arm64=n
 ARCH_XGENE arm64=n
 ARCH_ZYNQMP arm64=n
 
-#-
-#- *** FILE: arch/arm64/crypto/Kconfig ***
-#-
-ARM64_CRYPTO arm64=y
-CRYPTO_SHA256_ARM64 arm64=m
-CRYPTO_SHA512_ARM64 arm64=m
-CRYPTO_SHA1_ARM64_CE arm64=m
-CRYPTO_SHA2_ARM64_CE arm64=m
-CRYPTO_SHA512_ARM64_CE arm64=m
-CRYPTO_SHA3_ARM64 arm64=m
-CRYPTO_SM3_ARM64_CE arm64=m
-CRYPTO_SM4_ARM64_CE arm64=m
-CRYPTO_SM4_ARM64_CE_BLK arm64=m
-CRYPTO_SM4_ARM64_NEON_BLK arm64=m
-CRYPTO_GHASH_ARM64_CE arm64=m
-CRYPTO_POLYVAL_ARM64_CE arm64=m
-CRYPTO_CRCT10DIF_ARM64_CE arm64=m
-CRYPTO_AES_ARM64 arm64=m
-CRYPTO_AES_ARM64_CE arm64=m
-CRYPTO_AES_ARM64_CE_CCM arm64=m
-CRYPTO_AES_ARM64_CE_BLK arm64=m
-CRYPTO_AES_ARM64_NEON_BLK arm64=m
-CRYPTO_CHACHA20_NEON arm64=m
-CRYPTO_POLY1305_NEON arm64=m
-CRYPTO_NHPOLY1305_NEON arm64=m
-CRYPTO_AES_ARM64_BS arm64=m
-
 #-
 #- *** FILE: arch/arm64/kvm/Kconfig ***
 #-
index 189e53c700ceca20404ad90f59fe89af0406a971..d9f3bcd61d5720a3a14eb8303cacef4bd121588a 100644 (file)
@@ -9,8 +9,19 @@ ARM_PTDUMP_DEBUGFS arm=n
 COMPAT_32BIT_TIME all=y
 CPA_DEBUG all=n
 CRYPTO_AEGIS128_AESNI_SSE2 all=m
+CRYPTO_AES_ARM arm=m
+CRYPTO_AES_ARM64 arm64=m
+CRYPTO_AES_ARM64_BS arm64=m
+CRYPTO_AES_ARM64_CE arm64=m
+CRYPTO_AES_ARM64_CE_BLK arm64=m
+CRYPTO_AES_ARM64_CE_CCM arm64=m
+CRYPTO_AES_ARM64_NEON_BLK arm64=m
+CRYPTO_AES_ARM_BS arm=m
+CRYPTO_AES_ARM_CE arm=m
 CRYPTO_AES_NI_INTEL all=m
 CRYPTO_ARIA_AESNI_AVX_X86_64 all=m
+CRYPTO_BLAKE2B_NEON arm=m
+CRYPTO_BLAKE2S_ARM arm=y
 CRYPTO_BLAKE2S_X86 x86_64=y
 CRYPTO_BLOWFISH_X86_64 all=m
 CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 all=m
@@ -18,27 +29,54 @@ CRYPTO_CAMELLIA_AESNI_AVX_X86_64 all=m
 CRYPTO_CAMELLIA_X86_64 all=m
 CRYPTO_CAST5_AVX_X86_64 all=m
 CRYPTO_CAST6_AVX_X86_64 all=m
+CRYPTO_CHACHA20_NEON arm=m arm64=m
 CRYPTO_CHACHA20_X86_64 all=m
 CRYPTO_CRC32C_INTEL all=m
+CRYPTO_CRC32_ARM_CE arm=m
 CRYPTO_CRC32_PCLMUL all=m
+CRYPTO_CRCT10DIF_ARM64_CE arm64=m
+CRYPTO_CRCT10DIF_ARM_CE arm=m
 CRYPTO_CRCT10DIF_PCLMUL all=m
+CRYPTO_CURVE25519_NEON arm=m
 CRYPTO_CURVE25519_X86 all=m
 CRYPTO_DES3_EDE_X86_64 all=m
+CRYPTO_GHASH_ARM64_CE arm64=m
+CRYPTO_GHASH_ARM_CE arm=m
 CRYPTO_GHASH_CLMUL_NI_INTEL all=m
 CRYPTO_NHPOLY1305_AVX2 all=m
+CRYPTO_NHPOLY1305_NEON arm=m arm64=m
 CRYPTO_NHPOLY1305_SSE2 all=m
+CRYPTO_POLY1305_ARM arm=m
+CRYPTO_POLY1305_NEON arm64=m
 CRYPTO_POLY1305_X86_64 all=m
+CRYPTO_POLYVAL_ARM64_CE arm64=m
 CRYPTO_POLYVAL_CLMUL_NI all=m
 CRYPTO_SERPENT_AVX2_X86_64 all=m
 CRYPTO_SERPENT_AVX_X86_64 all=m
 CRYPTO_SERPENT_SSE2_586 all=m
 CRYPTO_SERPENT_SSE2_X86_64 all=m
+CRYPTO_SHA1_ARM arm=m
+CRYPTO_SHA1_ARM64_CE arm64=m
+CRYPTO_SHA1_ARM_CE arm=m
+CRYPTO_SHA1_ARM_NEON arm=m
 CRYPTO_SHA1_SSSE3 all=m
+CRYPTO_SHA256_ARM arm=m
+CRYPTO_SHA256_ARM64 arm64=m
 CRYPTO_SHA256_SSSE3 all=m
+CRYPTO_SHA2_ARM64_CE arm64=m
+CRYPTO_SHA2_ARM_CE arm=m
+CRYPTO_SHA3_ARM64 arm64=m
+CRYPTO_SHA512_ARM arm=m
+CRYPTO_SHA512_ARM64 arm64=m
+CRYPTO_SHA512_ARM64_CE arm64=m
 CRYPTO_SHA512_SSSE3 all=m
+CRYPTO_SM3_ARM64_CE arm64=m
 CRYPTO_SM3_AVX_X86_64 all=m
 CRYPTO_SM4_AESNI_AVX2_X86_64 all=m
 CRYPTO_SM4_AESNI_AVX_X86_64 all=m
+CRYPTO_SM4_ARM64_CE arm64=m
+CRYPTO_SM4_ARM64_CE_BLK arm64=m
+CRYPTO_SM4_ARM64_NEON_BLK arm64=m
 CRYPTO_TWOFISH_586 i386=m
 CRYPTO_TWOFISH_AVX_X86_64 all=m
 CRYPTO_TWOFISH_X86_64 x86_64=m
@@ -512,7 +550,7 @@ PATA_NS87410 all=m sparc=n
 PATA_OPTI all=m sparc=n
 PATA_PCMCIA all=m
 PATA_PLATFORM all=m
-PATA_OF_PLATFORM arm64=m ppc=m ppc64=m
+PATA_OF_PLATFORM arm=m arm64=m ppc=m ppc64=m
 PATA_QDI alpha=m i386=m
 PATA_RZ1000 all=m sparc=n
 PATA_WINBOND_VLB all=m sparc=n
@@ -948,6 +986,7 @@ COMMON_CLK_PWM all=m
 COMMON_CLK_OXNAS all=n
 COMMON_CLK_RS9_PCIE arm=m arm64=m
 COMMON_CLK_VC5 arm=m arm64=m
+COMMON_CLK_VC7 arm=m arm64=m
 COMMON_CLK_FIXED_MMIO arm=n arm64=n
 #- file drivers/clk/actions/Kconfig goes here
 #- file drivers/clk/analogbits/Kconfig goes here
@@ -1620,6 +1659,7 @@ EFI_RUNTIME_MAP all=y
 EFI_FAKE_MEMMAP all=n
 EFI_SOFT_RESERVE all=y
 EFI_DXE_MEM_ATTRIBUTES all=y
+EFI_ZBOOT arm64=n
 EFI_ARMSTUB_DTB_LOADER arm64=y
 EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER arm64=y
 EFI_BOOTLOADER_CONTROL all=m
@@ -2273,6 +2313,7 @@ DRM_RADEON_USERPTR all=y
 DRM_RCAR_DW_HDMI arm=m arm64=m
 DRM_RCAR_USE_LVDS arm=n arm64=n
 DRM_RCAR_LVDS arm=m arm64=m
+DRM_RCAR_USE_MIPI_DSI arm=n arm64=n
 DRM_RCAR_MIPI_DSI arm=m arm64=m
 
 #-
@@ -2886,6 +2927,11 @@ INTEL_TH_MSU all=m
 INTEL_TH_PTI all=m
 INTEL_TH_DEBUG all=n
 
+#-
+#- *** FILE: drivers/hwtracing/ptt/Kconfig ***
+#-
+HISI_PTT arm64=m
+
 #-
 #- *** FILE: drivers/hwtracing/stm/Kconfig ***
 #-
@@ -4204,6 +4250,7 @@ IOMMU_IO_PGTABLE_LPAE arm=y arm64=y
 IOMMU_IO_PGTABLE_LPAE_SELFTEST arm=n arm64=n
 IOMMU_IO_PGTABLE_ARMV7S arm=y arm64=y
 IOMMU_IO_PGTABLE_ARMV7S_SELFTEST arm=n arm64=n
+IOMMU_IO_PGTABLE_DART arm64=n
 IOMMU_DEBUGFS all=n
 IOMMU_DEFAULT_DMA_STRICT all=n
 IOMMU_DEFAULT_DMA_LAZY all=n
@@ -6209,6 +6256,10 @@ MTD_NAND_DISKONCHIP_BBTWRITE all=y
 #- *** FILE: drivers/mtd/nand/raw/brcmnand/Kconfig ***
 #-
 MTD_NAND_BRCMNAND arm=m arm64=m
+MTD_NAND_BRCMNAND_BCM63XX arm=m arm64=m
+MTD_NAND_BRCMNAND_BCMBCA arm=m arm64=m
+MTD_NAND_BRCMNAND_BRCMSTB arm=m arm64=m
+MTD_NAND_BRCMNAND_IPROC arm=m arm64=m
 
 #-
 #- *** FILE: drivers/mtd/nand/spi/Kconfig ***
@@ -8515,9 +8566,14 @@ NVME_TARGET_AUTH all=y
 #-
 NVMEM all=y
 NVMEM_SYSFS all=y
+NVMEM_MESON_EFUSE arm64=m
+NVMEM_MESON_MX_EFUSE arm64=m
 NVMEM_RAVE_SP_EEPROM all=m
 NVMEM_RMEM all=m
+NVMEM_ROCKCHIP_EFUSE arm64=m
+NVMEM_ROCKCHIP_OTP arm64=m
 NVMEM_SPMI_SDAM all=m
+NVMEM_U_BOOT_ENV arm=m arm64=m
 
 #-
 #- *** FILE: drivers/of/Kconfig ***
@@ -8715,6 +8771,7 @@ ARM_DSU_PMU arm64=m
 ARM_SPE_PMU arm64=m
 ARM_DMC620_PMU arm64=m
 MARVELL_CN10K_TAD_PMU arm64=m
+ALIBABA_UNCORE_DRW_PMU arm64=m
 #- file drivers/perf/hisilicon/Kconfig goes here
 
 #-
@@ -8840,6 +8897,7 @@ PHY_ROCKCHIP_INNO_CSIDPHY arm64=m
 PHY_ROCKCHIP_INNO_DSIDPHY arm64=m
 PHY_ROCKCHIP_NANENG_COMBO_PHY arm64=m
 PHY_ROCKCHIP_PCIE arm64=m
+PHY_ROCKCHIP_SNPS_PCIE3 arm64=m
 PHY_ROCKCHIP_TYPEC arm64=m
 PHY_ROCKCHIP_USB arm64=m
 
@@ -9328,6 +9386,7 @@ CHARGER_BQ2515X all=m
 CHARGER_BQ25890 all=m
 CHARGER_BQ25980 all=m
 CHARGER_BQ256XX all=m
+CHARGER_RK817 arm=m arm64=m
 CHARGER_SMB347 all=m
 CHARGER_TPS65217 all=m
 BATTERY_GAUGE_LTC2941 all=m
@@ -15135,6 +15194,9 @@ SND_SOC_MIKROE_PROTO arm=m arm64=m
 #-
 SND_BCM2835_SOC_I2S arm=m
 SND_BCM63XX_I2S_WHISTLER all=m
+SND_BCM2708_SOC_HIFIBERRY_DAC arm=m arm64=m
+SND_RPI_SIMPLE_SOUNDCARD arm=m arm64=m
+SND_RPI_WM8804_SOUNDCARD arm=m arm64=m
 
 #-
 #- *** FILE: sound/soc/codecs/Kconfig ***
@@ -15198,6 +15260,7 @@ SND_SOC_DMIC all=m
 SND_SOC_ES7134 all=m
 SND_SOC_ES7241 all=m
 SND_SOC_ES8316 all=m
+SND_SOC_ES8326 arm=m arm64=m
 SND_SOC_ES8328 all=m
 SND_SOC_ES8328_I2C all=m
 SND_SOC_ES8328_SPI all=m
@@ -15690,6 +15753,3 @@ RAVE_SP_EEPROM all=m
 ROCKCHIP_EFUSE arm64=m
 ROCKCHIP_OTP arm64=m
 SENSORS_ASUS_WMI_EC all=m
-SND_BCM2708_SOC_HIFIBERRY_DAC arm=m arm64=m
-SND_RPI_SIMPLE_SOUNDCARD arm=m arm64=m
-SND_RPI_WM8804_SOUNDCARD arm=m arm64=m
index 8ed145382c4b55b4b1fe24ce41b0a6ff4ebff216..58de3eb43d5dad3514cc18392dbcdad8b90aa44c 100644 (file)
@@ -651,346 +651,3 @@ index c2f021a1a18f..fc33e111bbee 100644
 -- 
 2.34.1
 
-From: Hugh Cole-Baker <sigmaris@gmail.com>
-Subject: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399
-Date: Tue, 19 Oct 2021 22:58:41 +0100
-
-The VOP on RK3399 has a different approach from previous versions for
-setting a gamma lookup table, using an update_gamma_lut register. As
-this differs from RK3288, give RK3399 its own set of "common" register
-definitions.
-
-Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
----
-
-Changes from v1: no changes in this patch
-
- drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
- drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
- 3 files changed, 25 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
-index 857d97cdc67c..14179e89bd21 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
-@@ -99,6 +99,8 @@ struct vop_common {
-       struct vop_reg dither_down_en;
-       struct vop_reg dither_up;
-       struct vop_reg dsp_lut_en;
-+      struct vop_reg update_gamma_lut;
-+      struct vop_reg lut_buffer_index;
-       struct vop_reg gate_en;
-       struct vop_reg mmu_en;
-       struct vop_reg out_mode;
-diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
-index ca7cc82125cb..bfb7e130f09b 100644
---- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
-@@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
-       .mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
- };
-+static const struct vop_common rk3399_common = {
-+      .standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
-+      .gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
-+      .mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
-+      .dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
-+      .dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
-+      .dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
-+      .pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
-+      .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
-+      .dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
-+      .update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
-+      .lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
-+      .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
-+      .dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
-+      .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
-+      .cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
-+};
-+
- static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
-       .y2r_coefficients = {
-               VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
-@@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
-       .version = VOP_VERSION(3, 5),
-       .feature = VOP_FEATURE_OUTPUT_RGB10,
-       .intr = &rk3366_vop_intr,
--      .common = &rk3288_common,
-+      .common = &rk3399_common,
-       .modeset = &rk3288_modeset,
-       .output = &rk3399_output,
-       .afbc = &rk3399_vop_afbc,
-@@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
-       .win = rk3399_vop_win_data,
-       .win_size = ARRAY_SIZE(rk3399_vop_win_data),
-       .win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
-+      .lut_size = 1024,
- };
- static const struct vop_win_data rk3399_vop_lit_win_data[] = {
-@@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
- static const struct vop_data rk3399_vop_lit = {
-       .version = VOP_VERSION(3, 6),
-       .intr = &rk3366_vop_intr,
--      .common = &rk3288_common,
-+      .common = &rk3399_common,
-       .modeset = &rk3288_modeset,
-       .output = &rk3399_output,
-       .misc = &rk3368_misc,
-       .win = rk3399_vop_lit_win_data,
-       .win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
-       .win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
-+      .lut_size = 256,
- };
- static const struct vop_win_data rk3228_vop_win_data[] = {
-diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
-index 0b3cd65ba5c1..406e981c75bd 100644
---- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
-+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
-@@ -628,6 +628,7 @@
- #define RK3399_YUV2YUV_WIN                    0x02c0
- #define RK3399_YUV2YUV_POST                   0x02c4
- #define RK3399_AUTO_GATING_EN                 0x02cc
-+#define RK3399_DBG_POST_REG1                  0x036c
- #define RK3399_WIN0_CSC_COE                   0x03a0
- #define RK3399_WIN1_CSC_COE                   0x03c0
- #define RK3399_WIN2_CSC_COE                   0x03e0
-
-From: Hugh Cole-Baker <sigmaris@gmail.com>
-Subject: [PATCH v2 2/3] drm/rockchip: support gamma control on RK3399
-Date: Tue, 19 Oct 2021 22:58:42 +0100
-
-The RK3399 has a 1024-entry gamma LUT with 10 bits per component on its
-"big" VOP and a 256-entry, 8 bit per component LUT on the "little" VOP.
-Compared to the RK3288, it no longer requires disabling gamma while
-updating the LUT. On the RK3399, the LUT can be updated at any time as
-the hardware has two LUT buffers, one can be written while the other is
-in use. A swap of the buffers is triggered by writing 1 to the
-update_gamma_lut register.
-
-Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
----
-
-Changes from v1: Moved the vop_crtc_gamma_set call to the end of
-vop_crtc_atomic_enable after the clocks and CRTC are enabled.
-
- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
- 1 file changed, 71 insertions(+), 34 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-index ba9e14da41b4..e2c97f1b26da 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -9,6 +9,7 @@
- #include <linux/delay.h>
- #include <linux/iopoll.h>
- #include <linux/kernel.h>
-+#include <linux/log2.h>
- #include <linux/module.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -66,6 +67,9 @@
- #define VOP_REG_SET(vop, group, name, v) \
-                   vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
-+#define VOP_HAS_REG(vop, group, name) \
-+              (!!(vop->data->group->name.mask))
-+
- #define VOP_INTR_SET_TYPE(vop, name, type, v) \
-       do { \
-               int i, reg = 0, mask = 0; \
-@@ -1204,17 +1208,22 @@ static bool vop_dsp_lut_is_enabled(struct vop *vop)
-       return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en);
- }
-+static u32 vop_lut_buffer_index(struct vop *vop)
-+{
-+      return vop_read_reg(vop, 0, &vop->data->common->lut_buffer_index);
-+}
-+
- static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc)
- {
-       struct drm_color_lut *lut = crtc->state->gamma_lut->data;
--      unsigned int i;
-+      unsigned int i, bpc = ilog2(vop->data->lut_size);
-       for (i = 0; i < crtc->gamma_size; i++) {
-               u32 word;
--              word = (drm_color_lut_extract(lut[i].red, 10) << 20) |
--                     (drm_color_lut_extract(lut[i].green, 10) << 10) |
--                      drm_color_lut_extract(lut[i].blue, 10);
-+              word = (drm_color_lut_extract(lut[i].red, bpc) << (2 * bpc)) |
-+                     (drm_color_lut_extract(lut[i].green, bpc) << bpc) |
-+                      drm_color_lut_extract(lut[i].blue, bpc);
-               writel(word, vop->lut_regs + i * 4);
-       }
- }
-@@ -1224,38 +1233,66 @@ static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc,
- {
-       struct drm_crtc_state *state = crtc->state;
-       unsigned int idle;
-+      u32 lut_idx, old_idx;
-       int ret;
-       if (!vop->lut_regs)
-               return;
--      /*
--       * To disable gamma (gamma_lut is null) or to write
--       * an update to the LUT, clear dsp_lut_en.
--       */
--      spin_lock(&vop->reg_lock);
--      VOP_REG_SET(vop, common, dsp_lut_en, 0);
--      vop_cfg_done(vop);
--      spin_unlock(&vop->reg_lock);
--      /*
--       * In order to write the LUT to the internal memory,
--       * we need to first make sure the dsp_lut_en bit is cleared.
--       */
--      ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
--                               idle, !idle, 5, 30 * 1000);
--      if (ret) {
--              DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
--              return;
--      }
-+      if (!state->gamma_lut || !VOP_HAS_REG(vop, common, update_gamma_lut)) {
-+              /*
-+               * To disable gamma (gamma_lut is null) or to write
-+               * an update to the LUT, clear dsp_lut_en.
-+               */
-+              spin_lock(&vop->reg_lock);
-+              VOP_REG_SET(vop, common, dsp_lut_en, 0);
-+              vop_cfg_done(vop);
-+              spin_unlock(&vop->reg_lock);
--      if (!state->gamma_lut)
--              return;
-+              /*
-+               * In order to write the LUT to the internal memory,
-+               * we need to first make sure the dsp_lut_en bit is cleared.
-+               */
-+              ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
-+                                       idle, !idle, 5, 30 * 1000);
-+              if (ret) {
-+                      DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
-+                      return;
-+              }
-+
-+              if (!state->gamma_lut)
-+                      return;
-+      } else {
-+              /*
-+               * On RK3399 the gamma LUT can updated without clearing dsp_lut_en,
-+               * by setting update_gamma_lut then waiting for lut_buffer_index change
-+               */
-+              old_idx = vop_lut_buffer_index(vop);
-+      }
-       spin_lock(&vop->reg_lock);
-       vop_crtc_write_gamma_lut(vop, crtc);
-       VOP_REG_SET(vop, common, dsp_lut_en, 1);
-+      VOP_REG_SET(vop, common, update_gamma_lut, 1);
-       vop_cfg_done(vop);
-       spin_unlock(&vop->reg_lock);
-+
-+      if (VOP_HAS_REG(vop, common, update_gamma_lut)) {
-+              ret = readx_poll_timeout(vop_lut_buffer_index, vop,
-+                                       lut_idx, lut_idx != old_idx, 5, 30 * 1000);
-+              if (ret) {
-+                      DRM_DEV_ERROR(vop->dev, "gamma LUT update timeout!\n");
-+                      return;
-+              }
-+
-+              /*
-+               * update_gamma_lut is auto cleared by HW, but write 0 to clear the bit
-+               * in our backup of the regs.
-+               */
-+              spin_lock(&vop->reg_lock);
-+              VOP_REG_SET(vop, common, update_gamma_lut, 0);
-+              spin_unlock(&vop->reg_lock);
-+      }
- }
- static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
-@@ -1305,14 +1342,6 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
-               return;
-       }
--      /*
--       * If we have a GAMMA LUT in the state, then let's make sure
--       * it's updated. We might be coming out of suspend,
--       * which means the LUT internal memory needs to be re-written.
--       */
--      if (crtc->state->gamma_lut)
--              vop_crtc_gamma_set(vop, crtc, old_state);
--
-       mutex_lock(&vop->vop_lock);
-       WARN_ON(vop->event);
-@@ -1403,6 +1432,14 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
-       VOP_REG_SET(vop, common, standby, 0);
-       mutex_unlock(&vop->vop_lock);
-+
-+      /*
-+       * If we have a GAMMA LUT in the state, then let's make sure
-+       * it's updated. We might be coming out of suspend,
-+       * which means the LUT internal memory needs to be re-written.
-+       */
-+      if (crtc->state->gamma_lut)
-+              vop_crtc_gamma_set(vop, crtc, old_state);
- }
- static bool vop_fs_irq_is_pending(struct vop *vop)
-@@ -2125,8 +2162,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
-       res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-       if (res) {
--              if (!vop_data->lut_size) {
--                      DRM_DEV_ERROR(dev, "no gamma LUT size defined\n");
-+              if (vop_data->lut_size != 1024 && vop_data->lut_size != 256) {
-+                      DRM_DEV_ERROR(dev, "unsupported gamma LUT size %d\n", vop_data->lut_size);
-                       return -EINVAL;
-               }
-               vop->lut_regs = devm_ioremap_resource(dev, res);
-
-From: Hugh Cole-Baker <sigmaris@gmail.com>
-Subject: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399
-Date: Tue, 19 Oct 2021 22:58:43 +0100
-
-Define the memory region on RK3399 VOPs containing the gamma LUT at
-base+0x2000.
-
-Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
----
-
-Changes from v1: no changes in this patch
-
- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-index 3871c7fd83b0..9cbf6ccdd256 100644
---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-@@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
-       vopl: vop@ff8f0000 {
-               compatible = "rockchip,rk3399-vop-lit";
--              reg = <0x0 0xff8f0000 0x0 0x3efc>;
-+              reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
-               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
-               assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
-               assigned-clock-rates = <400000000>, <100000000>;
-@@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
-       vopb: vop@ff900000 {
-               compatible = "rockchip,rk3399-vop-big";
--              reg = <0x0 0xff900000 0x0 0x3efc>;
-+              reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
-               interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
-               assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
-               assigned-clock-rates = <400000000>, <100000000>;
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