+++ /dev/null
-Index: xc/config/cf/FreeBSD.cf
-===================================================================
-RCS file: /home/x-cvs/xc/config/cf/FreeBSD.cf,v
-retrieving revision 3.112.2.1
-diff -u -r3.112.2.1 FreeBSD.cf
---- xc/config/cf/FreeBSD.cf 2002/09/04 02:38:08 3.112.2.1
-+++ xc/config/cf/FreeBSD.cf 2002/09/12 20:51:03
-@@ -191,6 +191,10 @@
- #define HasSetUserContext YES
- #endif
-
-+#if OSMajorVersion >= 5 || (OSMajorVersion == 4 && OSMinorVersion >= 6)
-+#define HasGetpeereid YES
-+#endif
-+
- /* 3.3(?) and later has support for setting MTRRs */
- #ifndef HasMTRRSupport
- #if OSMajorVersion > 3 || (OSMajorVersion == 3 && OSMinorVersion >= 3)
-Index: xc/config/cf/Imake.tmpl
-===================================================================
-RCS file: /home/x-cvs/xc/config/cf/Imake.tmpl,v
-retrieving revision 3.116.2.1
-diff -u -r3.116.2.1 Imake.tmpl
---- xc/config/cf/Imake.tmpl 2002/09/04 02:38:08 3.116.2.1
-+++ xc/config/cf/Imake.tmpl 2002/09/12 20:51:06
-@@ -395,6 +395,9 @@
- #ifndef HasPamMisc
- #define HasPamMisc NO
- #endif
-+#ifndef HasGetpeereid
-+#define HasGetpeereid NO
-+#endif
- /* byte-order defaults */
- #ifndef ByteOrder
- #if defined(VaxArchitecture)
-Index: xc/config/cf/OpenBSD.cf
-===================================================================
-RCS file: /home/x-cvs/xc/config/cf/OpenBSD.cf,v
-retrieving revision 3.66.2.1
-diff -u -r3.66.2.1 OpenBSD.cf
---- xc/config/cf/OpenBSD.cf 2002/09/04 02:38:08 3.66.2.1
-+++ xc/config/cf/OpenBSD.cf 2002/09/12 20:51:06
-@@ -97,6 +97,11 @@
- # define HasBSDAuth YES
- #endif
-
-+/* OpenBSD 3.0 and later has getpeereid() */
-+#if OSMajorVersion >= 3
-+# define HasGetpeereid YES
-+#endif
-+
- /* OpenBSD 3.0 has APM with kqueue interface */
- #if OSMajorVersion >= 3
- # define HasApmKqueue YES
-Index: xc/programs/Xserver/Xext/shm.c
-===================================================================
-RCS file: /home/x-cvs/xc/programs/Xserver/Xext/shm.c,v
-retrieving revision 3.33.2.2
-diff -u -r3.33.2.2 shm.c
---- xc/programs/Xserver/Xext/shm.c 2002/05/29 23:03:19 3.33.2.2
-+++ xc/programs/Xserver/Xext/shm.c 2002/09/12 20:51:36
-@@ -38,6 +38,7 @@
- #include <shm.h>
- #endif
- #include <unistd.h>
-+#include <sys/stat.h>
- #define NEED_REPLIES
- #define NEED_EVENTS
- #include "X.h"
-@@ -64,12 +65,6 @@
- #include "panoramiXsrv.h"
- #endif
-
--#if defined(SVR4) || defined(__linux__) || defined(CSRG_BASED)
--#define HAS_SAVED_IDS_AND_SETEUID
--#else
--#include <sys/stat.h>
--#endif
--
- typedef struct _ShmDesc {
- struct _ShmDesc *next;
- int shmid;
-@@ -361,35 +356,38 @@
- return (client->noClientException);
- }
-
--#ifndef HAS_SAVED_IDS_AND_SETEUID
- /*
- * Simulate the access() system call for a shared memory segement,
-- * using the real user and group id of the process
-+ * using the credentials from the client if available
- */
- static int
--shm_access(uid_t uid, gid_t gid, struct ipc_perm *perm, int readonly)
-+shm_access(ClientPtr client, struct ipc_perm *perm, int readonly)
- {
-+ int uid, gid;
- mode_t mask;
-
-- /* User id 0 always gets access */
-- if (uid == 0) {
-- return 0;
-- }
-- /* Check the owner */
-- if (perm->uid == uid || perm->cuid == uid) {
-- mask = S_IRUSR;
-- if (!readonly) {
-- mask |= S_IWUSR;
-+ if (LocalClientCred(client, &uid, &gid) != -1) {
-+
-+ /* User id 0 always gets access */
-+ if (uid == 0) {
-+ return 0;
- }
-- return (perm->mode & mask) == mask ? 0 : -1;
-- }
-- /* Check the group */
-- if (perm->gid == gid || perm->cgid == gid) {
-- mask = S_IRGRP;
-- if (!readonly) {
-- mask |= S_IWGRP;
-+ /* Check the owner */
-+ if (perm->uid == uid || perm->cuid == uid) {
-+ mask = S_IRUSR;
-+ if (!readonly) {
-+ mask |= S_IWUSR;
-+ }
-+ return (perm->mode & mask) == mask ? 0 : -1;
-+ }
-+ /* Check the group */
-+ if (perm->gid == gid || perm->cgid == gid) {
-+ mask = S_IRGRP;
-+ if (!readonly) {
-+ mask |= S_IWGRP;
-+ }
-+ return (perm->mode & mask) == mask ? 0 : -1;
- }
-- return (perm->mode & mask) == mask ? 0 : -1;
- }
- /* Otherwise, check everyone else */
- mask = S_IROTH;
-@@ -398,7 +396,6 @@
- }
- return (perm->mode & mask) == mask ? 0 : -1;
- }
--#endif
-
- static int
- ProcShmAttach(client)
-@@ -407,12 +404,6 @@
- struct shmid_ds buf;
- ShmDescPtr shmdesc;
- REQUEST(xShmAttachReq);
-- uid_t ruid;
-- gid_t rgid;
--#ifdef HAS_SAVED_IDS_AND_SETEUID
-- uid_t euid;
-- gid_t egid;
--#endif
-
- REQUEST_SIZE_MATCH(xShmAttachReq);
- LEGAL_NEW_RESOURCE(stuff->shmseg, client);
-@@ -436,44 +427,25 @@
- shmdesc = (ShmDescPtr) xalloc(sizeof(ShmDescRec));
- if (!shmdesc)
- return BadAlloc;
-- ruid = getuid();
-- rgid = getgid();
--#ifdef HAS_SAVED_IDS_AND_SETEUID
-- euid = geteuid();
-- egid = getegid();
--
-- if (euid != ruid || egid != rgid) {
-- /* Temporarly switch back to real ids */
-- if (seteuid(ruid) == -1 || setegid(rgid) == -1) {
-- return BadAccess;
-- }
-- }
--#endif
- shmdesc->addr = shmat(stuff->shmid, 0,
- stuff->readOnly ? SHM_RDONLY : 0);
--#ifdef HAS_SAVED_IDS_AND_SETEUID
-- if (euid != ruid || egid != rgid) {
-- /* Switch back to root privs */
-- if (seteuid(euid) == -1 || setegid(egid) == -1) {
-- return BadAccess;
-- }
-- }
--#endif
- if ((shmdesc->addr == ((char *)-1)) ||
- shmctl(stuff->shmid, IPC_STAT, &buf))
- {
- xfree(shmdesc);
- return BadAccess;
- }
--#ifndef HAS_SAVED_IDS_AND_SETEUID
-+
- /* The attach was performed with root privs. We must
-- * do manual checking of access rights for the real uid/gid */
-- if (shm_access(ruid, rgid, &(buf.shm_perm), stuff->readOnly) == -1) {
-+ * do manual checking of access rights for the credentials
-+ * of the client */
-+
-+ if (shm_access(client, &(buf.shm_perm), stuff->readOnly) == -1) {
- shmdt(shmdesc->addr);
- xfree(shmdesc);
- return BadAccess;
- }
--#endif
-+
- shmdesc->shmid = stuff->shmid;
- shmdesc->refcnt = 1;
- shmdesc->writable = !stuff->readOnly;
-Index: xc/programs/Xserver/include/os.h
-===================================================================
-RCS file: /home/x-cvs/xc/programs/Xserver/include/os.h,v
-retrieving revision 3.40
-diff -u -r3.40 os.h
---- xc/programs/Xserver/include/os.h 2001/12/14 19:59:55 3.40
-+++ xc/programs/Xserver/include/os.h 2002/09/12 20:51:42
-@@ -639,6 +639,8 @@
- #endif
- );
-
-+extern int LocalClientCred(ClientPtr, int *, int *);
-+
- extern int ChangeAccessControl(
- #if NeedFunctionPrototypes
- ClientPtr /*client*/,
-Index: xc/programs/Xserver/os/Imakefile
-===================================================================
-RCS file: /home/x-cvs/xc/programs/Xserver/os/Imakefile,v
-retrieving revision 3.34
-diff -u -r3.34 Imakefile
---- xc/programs/Xserver/os/Imakefile 2001/10/28 03:34:16 3.34
-+++ xc/programs/Xserver/os/Imakefile 2002/09/12 20:51:42
-@@ -78,6 +78,10 @@
- MALLOC_OBJS=xalloc.o
- #endif
-
-+#if HasGetpeereid
-+GETPEEREID_DEFINES = -DHAS_GETPEEREID
-+#endif
-+
- BOOTSTRAPCFLAGS =
- SRCS = WaitFor.c access.c connection.c io.c $(COLOR_SRCS) \
- osinit.c utils.c auth.c mitauth.c secauth.c $(XDMAUTHSRCS) \
-@@ -111,7 +115,7 @@
- #endif
- DEFINES = -DXSERV_t -DTRANS_SERVER $(CONNECTION_FLAGS) $(MEM_DEFINES) \
- $(XDMAUTHDEFS) $(RPCDEFS) $(SIGNAL_DEFINES) $(OS_DEFINES) \
-- $(KRB5_DEFINES) $(RGB_DEFINES)
-+ $(KRB5_DEFINES) $(RGB_DEFINES) $(GETPEEREID_DEFINES)
- INCLUDES = -I. -I../include -I$(XINCLUDESRC) -I$(EXTINCSRC) \
- -I$(SERVERSRC)/Xext -I$(FONTINCSRC) \
- -I$(TOP)/lib/Xau -I../lbx Krb5Includes
-Index: xc/programs/Xserver/os/access.c
-===================================================================
-RCS file: /home/x-cvs/xc/programs/Xserver/os/access.c,v
-retrieving revision 3.39
-diff -u -r3.39 access.c
---- xc/programs/Xserver/os/access.c 2002/01/07 20:38:29 3.39
-+++ xc/programs/Xserver/os/access.c 2002/09/12 20:51:44
-@@ -1007,6 +1007,55 @@
- return FALSE;
- }
-
-+/*
-+ * Return the uid and gid of a connected local client
-+ * or the uid/gid for nobody those ids cannot be determinded
-+ *
-+ * Used by XShm to test access rights to shared memory segments
-+ */
-+int
-+LocalClientCred(ClientPtr client, int *pUid, int *pGid)
-+{
-+ int fd;
-+ XtransConnInfo ci;
-+#ifdef HAS_GETPEEREID
-+ uid_t uid;
-+ gid_t gid;
-+#elif defined(SO_PEERCRED)
-+ struct ucred peercred;
-+ socklen_t so_len = sizeof(peercred);
-+#endif
-+
-+ if (client == NULL)
-+ return -1;
-+ ci = ((OsCommPtr)client->osPrivate)->trans_conn;
-+ /* We can only determine peer credentials for Unix domain sockets */
-+ if (!_XSERVTransIsLocal(ci)) {
-+ return -1;
-+ }
-+ fd = _XSERVTransGetConnectionNumber(ci);
-+#ifdef HAS_GETPEEREID
-+ if (getpeereid(fd, &uid, &gid) == -1)
-+ return -1;
-+ if (pUid != NULL)
-+ *pUid = uid;
-+ if (pGid != NULL)
-+ *pGid = gid;
-+ return 0;
-+#elif defined(SO_PEERCRED)
-+ if (getsockopt(fd, SOL_SOCKET, SO_PEERCRED, &peercred, &so_len) == -1)
-+ return -1;
-+ if (pUid != NULL)
-+ *pUid = peercred.uid;
-+ if (pGid != NULL)
-+ *pGid = peercred.gid;
-+ return 0;
-+#else
-+ /* No system call available to get the credentials of the peer */
-+ return -1;
-+#endif
-+}
-+
- static Bool
- AuthorizedClient(ClientPtr client)
- {
+++ /dev/null
-From: Jay Bratcher <jayb@cox-internet.com>
-Newsgroups: comp.os.linux.hardware
-Subject: Re: ATI Radeon 9000
-Date: Sun, 15 Sep 2002 13:07:51 -0400
-Organization: Posted via Supernews, http://www.supernews.com
-Message-ID: <3D84BE67.40300@cox-internet.com>
-User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:0.9.8) Gecko/20020204
-X-Accept-Language: en-us
-MIME-Version: 1.0
-References: <3d844ae3$0$177$9b622d9e@news.freenet.de>
-Content-Type: multipart/mixed;
- boundary="------------060008020003010106020906"
-X-Complaints-To: abuse@supernews.com
-Lines: 162
-
-
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/common/xf86PciInfo.h xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
---- xc.orig/programs/Xserver/hw/xfree86/common/xf86PciInfo.h Tue Jan 15 21:00:43 2002
-+++ xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h Sat Sep 7 17:03:15 2002
-@@ -253,6 +253,7 @@
- #define PCI_CHIP_R200_QN 0x514E
- #define PCI_CHIP_R200_QO 0x514F
- #define PCI_CHIP_RV200_QW 0x5157
-+#define PCI_CHIP_RV250_If 0x4966
- #define PCI_CHIP_RADEON_QY 0x5159
- #define PCI_CHIP_RADEON_QZ 0x515A
- #define PCI_CHIP_R200_Ql 0x516C
-@@ -890,6 +891,7 @@
- {PCI_CHIP_R200_QN, "Radeon 8500 QN",0},
- {PCI_CHIP_R200_QO, "Radeon 8500 QO",0},
- {PCI_CHIP_RV200_QW, "Radeon 7500 QW",0},
-+ {PCI_CHIP_RV250_If, "Radeon 9000 If",0},
- {PCI_CHIP_RADEON_QY, "Radeon VE QY",0},
- {PCI_CHIP_RADEON_QZ, "Radeon VE QZ",0},
- {PCI_CHIP_R200_Ql, "Radeon 8500 Ql",0},
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/drivers/ati/atichip.c xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c
---- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/atichip.c Wed Jan 16 11:22:25 2002
-+++ xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c Fri Sep 6 15:49:54 2002
-@@ -617,6 +617,9 @@
- case NewChipID('Q', 'W'):
- return ATI_CHIP_RV200;
-
-+ case NewChipID('I', 'f'):
-+ return ATI_CHIP_RV250;
-+
- case NewChipID('H', 'D'):
- return ATI_CHIP_HDTV;
-
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/drivers/ati/atichip.h xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h
---- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/atichip.h Wed Jan 16 11:22:25 2002
-+++ xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h Fri Sep 6 15:50:24 2002
-@@ -92,6 +92,7 @@
- ATI_CHIP_RADEONMOBILITY7, /* Radeon M7 */
- ATI_CHIP_R200, /* R200 */
- ATI_CHIP_RV200, /* RV200 */
-+ ATI_CHIP_RV250, /* RV250 */
- ATI_CHIP_HDTV /* HDTV */
- } ATIChipType;
-
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c
---- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c Fri Jan 18 11:56:16 2002
-+++ xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c Fri Sep 6 15:51:05 2002
-@@ -1734,6 +1734,7 @@
- case ATI_CHIP_RADEONMOBILITY7:
- case ATI_CHIP_R200:
- case ATI_CHIP_RV200:
-+ case ATI_CHIP_RV250:
- DoRadeon = TRUE;
- continue;
-
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon.h xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
---- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon.h Wed Nov 14 11:50:44 2001
-+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h Fri Sep 6 15:52:00 2002
-@@ -268,6 +268,7 @@
- BOOL HasCRTC2; /* VE/M6/M7 */
- BOOL IsR200; /* R200 chip */
- BOOL IsRV200; /* RV200 chip */
-+ BOOL IsRV250; /* RV250 chip */
- BOOL IsSecondary; /* second Screen */
- BOOL UseCRT; /* force use CRT port as primary */
- BOOL IsM6; /* M6 card, for some workarounds */
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
---- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c Tue Jan 15 21:00:43 2002
-+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c Fri Sep 6 15:54:28 2002
-@@ -1146,6 +1146,11 @@
- info->HasCRTC2 = TRUE;
- info->IsRV200 = TRUE;
- break;
-+ case PCI_CHIP_RV250_If: /* RV250 */
-+ info->HasCRTC2 = TRUE;
-+ info->IsRV250 = TRUE;
-+ break;
-+
- default:
- info->HasCRTC2 = FALSE;
- }
-@@ -1285,6 +1290,7 @@
- case PCI_CHIP_R200_Ql:
- case PCI_CHIP_R200_BB:
- case PCI_CHIP_RV200_QW:
-+ case PCI_CHIP_RV250_If:
- default: info->IsPCI = FALSE; break;
- }
- }
-diff -ruN xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
---- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c Tue Jan 15 21:00:44 2002
-+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c Fri Sep 6 15:56:29 2002
-@@ -89,6 +89,7 @@
- { PCI_CHIP_R200_Ql, "ATI Radeon 8500 Ql (AGP)" },
- { PCI_CHIP_R200_BB, "ATI Radeon 8500 BB (AGP)" },
- { PCI_CHIP_RV200_QW, "ATI Radeon 7500 QW (AGP)" },
-+ { PCI_CHIP_RV250_If, "ATI Radeon 9000 If (AGP)" },
- { -1, NULL }
- };
-
-@@ -108,6 +109,7 @@
- { PCI_CHIP_R200_Ql, PCI_CHIP_R200_Ql, RES_SHARED_VGA },
- { PCI_CHIP_R200_BB, PCI_CHIP_R200_BB, RES_SHARED_VGA },
- { PCI_CHIP_RV200_QW, PCI_CHIP_RV200_QW, RES_SHARED_VGA },
-+ { PCI_CHIP_RV250_If, PCI_CHIP_RV250_If, RES_SHARED_VGA },
- { -1, -1, RES_UNDEFINED }
- };
-
-@@ -240,6 +242,7 @@
- pEnt->chipset == PCI_CHIP_R200_Ql ||
- pEnt->chipset == PCI_CHIP_R200_BB ||
- pEnt->chipset == PCI_CHIP_RV200_QW ||
-+ pEnt->chipset == PCI_CHIP_RV250_If ||
- pEnt->chipset == PCI_CHIP_RADEON_LW ||
- pEnt->chipset == PCI_CHIP_RADEON_LY ||
- pEnt->chipset == PCI_CHIP_RADEON_LZ)
-
---
-
+++ /dev/null
-This patch by Branden Robinson.
-
---- XFree86-4.1.0/xc/lib/Xft/Imakefile~ Fri Apr 27 14:55:22 2001
-+++ XFree86-4.1.0/xc/lib/Xft/Imakefile Mon Jun 4 01:20:55 2001
-@@ -22,8 +22,7 @@
- #define XftType1Dir $(LIBDIR)/fonts/Type1
- #endif
-
--XFTLIBDIR=XftLibDir
--XFTCONFIG=$(XFTLIBDIR)/XftConfig
-+XFTCONFIG=$(CONFDIR)/XftConfig
-
- TYPE1DIR=XftType1Dir
- CONFIG_DEFS=-DXFT_TYPE1_DIR=\"$(TYPE1DIR)\"
-@@ -68,9 +67,9 @@
- CppFileTarget(XftConfig,XftConfig.cpp,$(CONFIG_DEFS),$(ICONFIGFILES))
-
- #if InstallFSConfig
--InstallNonExecFile(XftConfig,$(XFTLIBDIR))
-+InstallNonExecFile(XftConfig,$(CONFDIR))
- #else
--InstallNonExecFileNoClobber(XftConfig,$(XFTLIBDIR))
-+InstallNonExecFileNoClobber(XftConfig,$(CONFDIR))
- #endif
-
- LinkConfFileLong(XftConfig,XftConfig,$(XFTLIBDIR),$(CONFDIR))
+++ /dev/null
-This patch by Brendan O'Dea.
-
- The /dev/dri directory is created with a mode that is derived from the
- "Mode" entry in the "DRI" section, which dexconf creates as 666.
-
- Ethan Benson noted that this results in a world writable directory on
- the root filesystem which is undesirable.
-
- Given that the only things in that directory are character devices which
- require root permission to create, the directory permissions need not
- follow the Mode required for the devices but may be root:root 755.
-
---- XFree86-4.1.0/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c.orig Thu Aug 30 19:58:24 2001
-+++ XFree86-4.1.0/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c Thu Aug 30 19:59:20 2001
-@@ -174,7 +174,6 @@
- stat_t st;
- char buf[64];
- int fd;
-- mode_t dirmode = DRM_DEV_DIRMODE;
- mode_t devmode = DRM_DEV_MODE;
- int isroot = !geteuid();
- #if defined(XFree86Server)
-@@ -184,23 +183,16 @@
-
- #if defined(XFree86Server)
- devmode = xf86ConfigDRI.mode ? xf86ConfigDRI.mode : DRM_DEV_MODE;
-- dirmode = (devmode & S_IRUSR) ? S_IXUSR : 0;
-- dirmode |= (devmode & S_IRGRP) ? S_IXGRP : 0;
-- dirmode |= (devmode & S_IROTH) ? S_IXOTH : 0;
-- dirmode |= devmode;
- devmode &= ~(S_IXUSR|S_IXGRP|S_IXOTH);
- group = (xf86ConfigDRI.group >= 0) ? xf86ConfigDRI.group : DRM_DEV_GID;
- #endif
-
- if (stat(DRM_DIR_NAME, &st)) {
- if (!isroot) return DRM_ERR_NOT_ROOT;
-- remove(DRM_DIR_NAME);
-- mkdir(DRM_DIR_NAME, dirmode);
-+ mkdir(DRM_DIR_NAME, 0755);
-+ chown(DRM_DIR_NAME, 0, 0); /* root:root */
-+ chmod(DRM_DIR_NAME, 0755);
- }
--#if defined(XFree86Server)
-- chown(DRM_DIR_NAME, user, group);
-- chmod(DRM_DIR_NAME, dirmode);
--#endif
-
- sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, minor);
- if (stat(buf, &st) || st.st_rdev != dev) {
+++ /dev/null
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga.h Sat Jan 12 00:42:57 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h Sun Apr 14 15:07:08 2002
-@@ -120,6 +120,7 @@
- CARD32 Option;
- CARD32 Option2;
- CARD32 Option3;
-+ long Clock;
- } MGARegRec, *MGARegPtr;
-
- /* For programming the second CRTC */
-@@ -350,9 +351,11 @@
- void (*GetQuiescence)(ScrnInfoPtr pScrn);
-
- int agpMode;
-+ int agpSize;
-
- #endif
- XF86VideoAdaptorPtr adaptor;
-+ Bool DualHeadEnabled;
- Bool SecondCrtc;
- Bool SecondOutput;
- GDevPtr device;
-@@ -495,6 +498,9 @@
- void MGACRTC2GetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY);
-
- double MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out);
-+
-+double MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out);
-+long MGAG450SavePLLFreq(ScrnInfoPtr pScrn);
- void MGAprintDac(ScrnInfoPtr pScrn);
-
- #ifdef USEMGAHAL
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga.man Tue Dec 18 05:52:32 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man Sun Apr 14 15:07:08 2002
-@@ -19,11 +19,14 @@
- 8, 15, 16, 24, and an 8+24 overlay mode. All
- visual types are supported for depth 8, and both TrueColor and DirectColor
- visuals are supported for the other depths except 8+24 mode which supports
--PseudoColor, GrayScale and TrueColor. Multi-head configurations
-+PseudoColor, GrayScale and TrueColor. Multi-card configurations
- are supported. XVideo is supported on G200 and newer systems, with
- either
- .B TexturedVideo
--or video overlay.
-+or video overlay. The second head of dual-head cards is supported for
-+the G450 and G550. Support for the second head on G400 cards requires
-+a binary-only "mga_hal" module that is available from Matrox
-+<http://www.matrox.com>. That module also provides various other enhancements.
- .SH SUPPORTED HARDWARE
- The
- .B mga
-@@ -44,6 +47,10 @@
- Millennium G200 and Mystique G200
- .TP 12
- .B G400
-+.TP 12
-+.B G450
-+.TP 12
-+.B G550
- .SH CONFIGURATION DETAILS
- Please refer to XF86Config(__filemansuffix__) for general configuration
- details. This section only covers configuration details specific to this
-@@ -57,9 +64,11 @@
- .PP
- .RS 4
- "mga2064w", "mga1064sg", "mga2164w", "mga2164w agp", "mgag100", "mgag200",
--"mgag200 pci" "mgag400".
-+"mgag200 pci", "mgag400", "mgag550".
- .RE
- .PP
-+The G450 is Chipset "mgag400" with ChipRev 0x80.
-+.PP
- The driver will auto-detect the amount of video memory present for all
- chips except the Millennium II. In the Millennium II case it defaults
- to 4096\ kBytes. When using a Millennium II, the actual amount of video
-@@ -91,6 +100,10 @@
- .TP
- .BI "Option \*qNoAccel\*q \*q" boolean \*q
- Disable or enable acceleration. Default: acceleration is enabled.
-+.TP
-+.BI "Option \*qNoHal\*q \*q" boolean \*q
-+Disable or enable loading the "mga_hal" module. Default: the module is
-+loaded when available and when using hardware that it supports.
- .TP
- .BI "Option \*qOverclockMem\*q"
- Set clocks to values used by some commercial X-Servers (G100, G200 and G400
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_dacG.c Sat Jan 12 00:42:57 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c Sun Apr 14 15:07:08 2002
-@@ -212,8 +212,8 @@
- double f_pll;
-
- if(MGAISGx50(pMga)) {
-- MGAG450SetPLLFreq(pScrn, f_out);
-- return;
-+ pReg->Clock = f_out;
-+ return;
- }
-
- /* Do the calculations for m, n, p and s */
-@@ -285,7 +285,7 @@
- pReg->DacRegs[i] = initDAC[i];
- }
- ); /* MGA_NOT_HAL */
--
-+
- switch(pMga->Chipset)
- {
- case PCI_CHIP_MGA1064:
-@@ -529,7 +529,7 @@
- OUTREG(MGAREG_ZORG, 0);
- }
-
-- MGAGSetPCLK(pScrn, mode->Clock);
-+ MGAGSetPCLK(pScrn, mode->Clock);
- ); /* MGA_NOT_HAL */
-
- /* This disables the VGA memory aperture */
-@@ -616,6 +616,7 @@
- /*
- * MGAGRestorePalette
- */
-+
- static void
- MGAGRestorePalette(ScrnInfoPtr pScrn, unsigned char* pntr)
- {
-@@ -623,8 +624,8 @@
- int i = 768;
-
- outMGAdreg(MGA1064_WADR_PAL, 0x00);
-- while(i--)
-- outMGAdreg(MGA1064_COL_PAL, *(pntr++));
-+ while(i--)
-+ outMGAdreg(MGA1064_COL_PAL, *(pntr++));
- }
-
- /*
-@@ -637,8 +638,8 @@
- int i = 768;
-
- outMGAdreg(MGA1064_RADR_PAL, 0x00);
-- while(i--)
-- *(pntr++) = inMGAdreg(MGA1064_COL_PAL);
-+ while(i--)
-+ *(pntr++) = inMGAdreg(MGA1064_COL_PAL);
- }
-
- /*
-@@ -655,7 +656,21 @@
- MGAPtr pMga = MGAPTR(pScrn);
- CARD32 optionMask;
-
-+ /*
-+ * Pixel Clock needs to be restored regardless if we use
-+ * HALLib or not. HALlib doesn't do a good job restoring
-+ * VESA modes. MATROX: hint, hint.
-+ */
-+ if (MGAISGx50(pMga) && mgaReg->Clock) {
-+ /*
-+ * With HALlib program only when restoring to console!
-+ * To test this we check for Clock == 0.
-+ */
-+ MGAG450SetPLLFreq(pScrn, mgaReg->Clock);
-+ }
-+
- if(!pMga->SecondCrtc) {
-+
- MGA_NOT_HAL(
- /*
- * Code is needed to get things back to bank zero.
-@@ -696,7 +711,21 @@
- mgaReg->Option3);
- }
- ); /* MGA_NOT_HAL */
--
-+#ifdef USEMGAHAL
-+ /*
-+ * Work around another bug in HALlib: it doesn't restore the
-+ * DAC width register correctly. MATROX: hint, hint.
-+ */
-+ MGA_HAL(
-+ outMGAdac(MGA1064_MUL_CTL,mgaReg->DacRegs[0]);
-+ outMGAdac(MGA1064_MISC_CTL,mgaReg->DacRegs[1]);
-+ if (!MGAISGx50(pMga)) {
-+ outMGAdac(MGA1064_PIX_PLLC_M,mgaReg->DacRegs[2]);
-+ outMGAdac(MGA1064_PIX_PLLC_N,mgaReg->DacRegs[3]);
-+ outMGAdac(MGA1064_PIX_PLLC_P,mgaReg->DacRegs[4]);
-+ }
-+ );
-+#endif
- /* restore CRTCEXT regs */
- for (i = 0; i < 6; i++)
- OUTREG16(0x1FDE, (mgaReg->ExtVga[i] << 8) | i);
-@@ -706,7 +735,7 @@
- */
- vgaHWRestore(pScrn, vgaReg,
- VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0));
-- MGAGRestorePalette(pScrn, vgaReg->DAC);
-+ MGAGRestorePalette(pScrn, vgaReg->DAC);
-
- /*
- * this is needed to properly restore start address
-@@ -751,6 +780,7 @@
- for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]);
- ErrorF("\n");
- #endif
-+
- }
-
- /*
-@@ -765,6 +795,15 @@
- int i;
- MGAPtr pMga = MGAPTR(pScrn);
-
-+ /*
-+ * Pixel Clock needs to be restored regardless if we use
-+ * HALLib or not. HALlib doesn't do a good job restoring
-+ * VESA modes (s.o.). MATROX: hint, hint.
-+ */
-+ if (MGAISGx50(pMga)) {
-+ mgaReg->Clock = MGAG450SavePLLFreq(pScrn);
-+ }
-+
- if(pMga->SecondCrtc == TRUE) {
- for(i = 0x80; i < 0xa0; i++)
- mgaReg->dac2[i-0x80] = inMGAdac(i);
-@@ -790,7 +829,29 @@
- */
- vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | (saveFonts ? VGA_SR_FONTS : 0));
- MGAGSavePalette(pScrn, vgaReg->DAC);
-+ /*
-+ * Work around another bug in HALlib: it doesn't restore the
-+ * DAC width register correctly.
-+ */
-
-+#ifdef USEMGAHAL
-+ /*
-+ * Work around another bug in HALlib: it doesn't restore the
-+ * DAC width register correctly (s.o.). MATROX: hint, hint.
-+ */
-+ MGA_HAL(
-+ if (mgaReg->DacRegs == NULL) {
-+ mgaReg->DacRegs = xnfcalloc(MGAISGx50(pMga) ? 2 : 5, 1);
-+ }
-+ mgaReg->DacRegs[0] = inMGAdac(MGA1064_MUL_CTL);
-+ mgaReg->DacRegs[1] = inMGAdac(MGA1064_MISC_CTL);
-+ if (!MGAISGx50(pMga)) {
-+ mgaReg->DacRegs[2] = inMGAdac(MGA1064_PIX_PLLC_M);
-+ mgaReg->DacRegs[3] = inMGAdac(MGA1064_PIX_PLLC_N);
-+ mgaReg->DacRegs[4] = inMGAdac(MGA1064_PIX_PLLC_P);
-+ }
-+ );
-+#endif
- MGA_NOT_HAL(
- /*
- * The port I/O code necessary to read in the extended registers.
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_dri.c Wed Sep 26 21:59:17 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c Sun Apr 14 15:07:08 2002
-@@ -571,11 +571,14 @@
- MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo;
- unsigned long mode;
- unsigned int vendor, device;
-- int ret, count;
-+ int ret, count, i;
-+
-+ if(pMga->agpSize < 12)pMga->agpSize = 12;
-+ if(pMga->agpSize > 64)pMga->agpSize = 64; /* cap */
-
- /* FIXME: Make these configurable...
- */
-- pMGADRIServer->agp.size = 12 * 1024 * 1024;
-+ pMGADRIServer->agp.size = pMga->agpSize * 1024 * 1024;
-
- pMGADRIServer->warp.offset = 0;
- pMGADRIServer->warp.size = MGA_WARP_UCODE_SIZE;
-@@ -588,6 +591,13 @@
- pMGADRIServer->primary.size);
- pMGADRIServer->buffers.size = MGA_NUM_BUFFERS * MGA_BUFFER_SIZE;
-
-+
-+ pMGADRIServer->agpTextures.offset = (pMGADRIServer->buffers.offset +
-+ pMGADRIServer->buffers.size);
-+
-+ pMGADRIServer->agpTextures.size = pMGADRIServer->agp.size -
-+ pMGADRIServer->agpTextures.offset;
-+
- if ( drmAgpAcquire( pMga->drmFD ) < 0 ) {
- xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] AGP not available\n" );
- return FALSE;
-@@ -750,6 +760,28 @@
- "[drm] Added %d %d byte DMA buffers\n",
- count, MGA_BUFFER_SIZE );
-
-+ i = mylog2(pMGADRIServer->agpTextures.size / MGA_NR_TEX_REGIONS);
-+ if(i < MGA_LOG_MIN_TEX_REGION_SIZE)
-+ i = MGA_LOG_MIN_TEX_REGION_SIZE;
-+ pMGADRIServer->agpTextures.size = (pMGADRIServer->agpTextures.size >> i) << i;
-+
-+ if ( drmAddMap( pMga->drmFD,
-+ pMGADRIServer->agpTextures.offset,
-+ pMGADRIServer->agpTextures.size,
-+ DRM_AGP, 0,
-+ &pMGADRIServer->agpTextures.handle ) < 0 ) {
-+ xf86DrvMsg( pScreen->myNum, X_ERROR,
-+ "[agp] Could not add agpTexture mapping\n" );
-+ return FALSE;
-+ }
-+/* should i map it ? */
-+ xf86DrvMsg( pScreen->myNum, X_INFO,
-+ "[agp] agpTexture handle = 0x%08lx\n",
-+ pMGADRIServer->agpTextures.handle );
-+ xf86DrvMsg( pScreen->myNum, X_INFO,
-+ "[agp] agpTexture size: %d kb\n", pMGADRIServer->agpTextures.size/1024 );
-+
-+
- xf86EnablePciBusMaster( pMga->PciInfo, TRUE );
-
- return TRUE;
-@@ -853,6 +885,9 @@
- init.primary_offset = pMGADRIServer->primary.handle;
- init.buffers_offset = pMGADRIServer->buffers.handle;
-
-+ init.texture_offset[1] = pMGADRIServer->agpTextures.handle;
-+ init.texture_size[1] = pMGADRIServer->agpTextures.size;
-+
- ret = drmMGAInitDMA( pMga->drmFD, &init );
- if ( ret < 0 ) {
- xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
-@@ -1192,6 +1227,14 @@
- pMGADRI->logTextureGranularity = i;
- pMGADRI->textureSize = (pMGADRI->textureSize >> i) << i; /* truncate */
-
-+ i = mylog2( pMGADRIServer->agpTextures.size / MGA_NR_TEX_REGIONS );
-+ if ( i < MGA_LOG_MIN_TEX_REGION_SIZE )
-+ i = MGA_LOG_MIN_TEX_REGION_SIZE;
-+
-+ pMGADRI->logAgpTextureGranularity = i;
-+ pMGADRI->agpTextureOffset = (unsigned int)pMGADRIServer->agpTextures.handle;
-+ pMGADRI->agpTextureSize = (unsigned int)pMGADRIServer->agpTextures.size;
-+
- pMGADRI->registers.handle = pMGADRIServer->registers.handle;
- pMGADRI->registers.size = pMGADRIServer->registers.size;
- pMGADRI->status.handle = pMGADRIServer->status.handle;
-@@ -1233,6 +1276,11 @@
- if ( pMGADRIServer->warp.map ) {
- drmUnmap( pMGADRIServer->warp.map, pMGADRIServer->warp.size );
- pMGADRIServer->warp.map = NULL;
-+ }
-+
-+ if ( pMGADRIServer->agpTextures.map ) {
-+ drmUnmap( pMGADRIServer->agpTextures.map, pMGADRIServer->agpTextures.size );
-+ pMGADRIServer->agpTextures.map = NULL;
- }
-
- if ( pMGADRIServer->agp.handle ) {
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_driver.c Tue Jan 8 06:50:11 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c Sun Apr 14 15:36:52 2002
-@@ -213,6 +213,7 @@
- OPTION_CRTC2RAM,
- OPTION_INT10,
- OPTION_AGP_MODE,
-+ OPTION_AGP_SIZE,
- OPTION_DIGITAL,
- OPTION_TV,
- OPTION_TVSTANDARD,
-@@ -244,6 +245,7 @@
- { OPTION_CRTC2RAM, "Crtc2Ram", OPTV_INTEGER, {0}, FALSE },
- { OPTION_INT10, "Int10", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE },
-+ { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE },
- { OPTION_DIGITAL, "DigitalScreen",OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_TV, "TV", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_TVSTANDARD, "TVStandard", OPTV_ANYSTR, {0}, FALSE },
-@@ -1299,28 +1301,122 @@
- pScrn->monitor = pScrn->confScreen->monitor;
-
- /*
-- * In case of DualHead, we need to determine if we are the 'master' head or the 'slave'
-- * head. In order to do that, at the end of the first initialisation, PrimInit is set as
-- * DONE to the shared entity. So that the second initialisation knows that something has
-- * been done before it. This always assume that the first device initialised is the master
-+ * Set the Chipset and ChipRev, allowing config file entries to
-+ * override.
-+ */
-+ if (pMga->device->chipset && *pMga->device->chipset) {
-+ pScrn->chipset = pMga->device->chipset;
-+ pMga->Chipset = xf86StringToToken(MGAChipsets, pScrn->chipset);
-+ from = X_CONFIG;
-+ } else if (pMga->device->chipID >= 0) {
-+ pMga->Chipset = pMga->device->chipID;
-+ pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
-+ from = X_CONFIG;
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
-+ pMga->Chipset);
-+ } else {
-+ from = X_PROBED;
-+ pMga->Chipset = pMga->PciInfo->chipType;
-+ pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
-+ }
-+ if (pMga->device->chipRev >= 0) {
-+ pMga->ChipRev = pMga->device->chipRev;
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
-+ pMga->ChipRev);
-+ } else {
-+ pMga->ChipRev = pMga->PciInfo->chipRev;
-+ }
-+
-+ /*
-+ * This shouldn't happen because such problems should be caught in
-+ * MGAProbe(), but check it just in case.
-+ */
-+ if (pScrn->chipset == NULL) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-+ "ChipID 0x%04X is not recognised\n", pMga->Chipset);
-+ return FALSE;
-+ }
-+ if (pMga->Chipset < 0) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-+ "Chipset \"%s\" is not recognised\n", pScrn->chipset);
-+ return FALSE;
-+ }
-+
-+ xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"", pScrn->chipset);
-+ if ((pMga->Chipset == PCI_CHIP_MGAG400) &&
-+ (pMga->ChipRev >= 0x80))
-+ xf86ErrorF(" (G450)\n");
-+ else
-+ xf86ErrorF(" (G400)\n");
-+
-+#ifdef USEMGAHAL
-+ if (HAL_CHIPSETS) {
-+ Bool loadHal = TRUE;
-+
-+ from = X_DEFAULT;
-+ if (xf86FindOption(pMga->device->options, "NoHal")) {
-+ loadHal = !xf86SetBoolOption(pMga->device->options,
-+ "NoHal", !loadHal);
-+ from = X_CONFIG;
-+ } else if (xf86FindOption(pMga->device->options, "Hal")) {
-+ loadHal = xf86SetBoolOption(pMga->device->options,
-+ "Hal", loadHal);
-+ from = X_CONFIG;
-+ }
-+ if (loadHal && xf86LoadSubModule(pScrn, "mga_hal")) {
-+ xf86LoaderReqSymLists(halSymbols, NULL);
-+ xf86DrvMsg(pScrn->scrnIndex, from,"Matrox HAL module used\n");
-+ pMga->HALLoaded = TRUE;
-+ } else {
-+ xf86DrvMsg(pScrn->scrnIndex, from, "Matrox HAL module not loaded "
-+ "- using builtin mode setup instead\n");
-+ pMga->HALLoaded = FALSE;
-+ }
-+ }
-+#endif
-+
-+ pMga->DualHeadEnabled = FALSE;
-+ if (xf86IsEntityShared(pScrn->entityList[0])) {/* dual-head mode requested*/
-+#ifdef USEMGAHAL
-+ if (pMga->HALLoaded || !MGA_DH_NEEDS_HAL(pMga)) {
-+#else
-+ if (!MGA_DH_NEEDS_HAL(pMga)) {
-+#endif
-+ pMga->DualHeadEnabled = TRUE;
-+ } else if (xf86IsPrimInitDone(pScrn->entityList[0])) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-+ "This card requires the \"mga_hal\" module for dual-head operation\n"
-+ "\tIt can be found at the Matrox web site <http://www.matrox.com>\n");
-+ }
-+ }
-+
-+ /*
-+ * In case of DualHead, we need to determine if we are the 'master' head
-+ * or the 'slave' head. In order to do that, at the end of the first
-+ * initialisation, PrimInit is set as DONE to the shared entity. So that
-+ * the second initialisation knows that something has been done before it.
-+ * This always assume that the first device initialised is the master
- * head, and the second the slave.
- *
- */
- if (xf86IsEntityShared(pScrn->entityList[0])) { /* dual-head mode */
--
- if (!xf86IsPrimInitDone(pScrn->entityList[0])) { /* Is it the first initialisation? */
- /* First CRTC */
- pMga->SecondCrtc = FALSE;
- pMga->HWCursor = TRUE;
- pMgaEnt->pScrn_1 = pScrn;
-- }
-- else {
-+ } else if (pMga->DualHeadEnabled) {
- /* Second CRTC */
- pMga->SecondCrtc = TRUE;
- pMga->HWCursor = FALSE;
- pMgaEnt->pScrn_2 = pScrn;
- pScrn->AdjustFrame = MGAAdjustFrameCrtc2;
-- }
-+ } else {
-+ return FALSE;
-+ }
-+ }
-+
-+ if (pMga->DualHeadEnabled) {
- #ifdef XF86DRI
- pMga->GetQuiescence = MGAGetQuiescenceShared;
- #endif
-@@ -1421,65 +1517,6 @@
- if (pScrn->depth == 8)
- pScrn->rgbBits = 8;
-
-- /*
-- * Set the Chipset and ChipRev, allowing config file entries to
-- * override.
-- */
-- if (pMga->device->chipset && *pMga->device->chipset) {
-- pScrn->chipset = pMga->device->chipset;
-- pMga->Chipset = xf86StringToToken(MGAChipsets, pScrn->chipset);
-- from = X_CONFIG;
-- } else if (pMga->device->chipID >= 0) {
-- pMga->Chipset = pMga->device->chipID;
-- pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
-- from = X_CONFIG;
-- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
-- pMga->Chipset);
-- } else {
-- from = X_PROBED;
-- pMga->Chipset = pMga->PciInfo->chipType;
-- pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
-- }
-- if (pMga->device->chipRev >= 0) {
-- pMga->ChipRev = pMga->device->chipRev;
-- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
-- pMga->ChipRev);
-- } else {
-- pMga->ChipRev = pMga->PciInfo->chipRev;
-- }
--
--#ifdef USEMGAHAL
-- if (HAL_CHIPSETS) {
-- if (!xf86ReturnOptValBool(pMga->Options, OPTION_NOHAL, FALSE)
-- && xf86LoadSubModule(pScrn, "mga_hal")) {
-- xf86LoaderReqSymLists(halSymbols, NULL);
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO,"Matrox HAL module used\n");
-- pMga->HALLoaded = TRUE;
-- } else {
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Matrox HAL module not loaded "
-- "- using builtin mode setup instead\n");
-- pMga->HALLoaded = FALSE;
-- }
-- }
--#endif
--
-- /*
-- * This shouldn't happen because such problems should be caught in
-- * MGAProbe(), but check it just in case.
-- */
-- if (pScrn->chipset == NULL) {
-- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-- "ChipID 0x%04X is not recognised\n", pMga->Chipset);
-- return FALSE;
-- }
-- if (pMga->Chipset < 0) {
-- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-- "Chipset \"%s\" is not recognised\n", pScrn->chipset);
-- return FALSE;
-- }
--
-- xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
--
- #ifdef XF86DRI
- from = X_DEFAULT;
- pMga->agpMode = MGA_DEFAULT_AGP_MODE;
-@@ -1494,6 +1531,12 @@
- }
- from = X_CONFIG;
- }
-+ if (xf86GetOptValInteger(pMga->Options,
-+ OPTION_AGP_SIZE, &(pMga->agpSize))) {
-+ /* check later */
-+ xf86DrvMsg(pScrn->scrnIndex, from, "Using %d MB of AGP memory\n",
-+ pMga->agpSize);
-+ }
-
- xf86DrvMsg(pScrn->scrnIndex, from, "Using AGP %dx mode\n",
- pMga->agpMode);
-@@ -1812,7 +1855,7 @@
- pScrn->videoRam = MGACountRam(pScrn);
- }
-
-- if(xf86IsEntityShared(pScrn->entityList[0])) {
-+ if (pMga->DualHeadEnabled) {
- /* This takes gives either half or 8 meg to the second head
- * whichever is less. */
- if(pMga->SecondCrtc == FALSE) {
-@@ -2073,6 +2116,17 @@
- pMga->pClientStruct->pMga = (MGAPtr) pMga;
-
- MGAMapMem(pScrn);
-+ /*
-+ * For some reason the MGAOPM_DMA_BLIT bit needs to be set
-+ * on G200 before opening the HALlib. I don't know why.
-+ * MATROX: hint, hint.
-+ */
-+ /*if (pMga->Chipset == PCI_CHIP_MGAG200 ||
-+ pMga->Chipset == PCI_CHIP_MGAG200_PCI) */{
-+ CARD32 opmode;
-+ opmode = INREG(MGAREG_OPMODE);
-+ OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT | opmode);
-+ }
- MGAOpenLibrary(pMga->pBoard,pMga->pClientStruct,sizeof(CLIENTDATA));
- MGAUnmapMem(pScrn);
- pMga->pMgaHwInfo = xalloc(sizeof(MGAHWINFO));
-@@ -2101,7 +2155,7 @@
- }
-
- /* copy the board handles */
-- if (xf86IsEntityShared(pScrn->entityList[0])) {
-+ if (pMga->DualHeadEnabled) {
- pMgaEnt->pClientStruct = pMga->pClientStruct;
- pMgaEnt->pBoard = pMga->pBoard;
- pMgaEnt->pMgaHwInfo = pMga->pMgaHwInfo;
-@@ -2182,7 +2236,11 @@
- * Can we trust HALlib to set the memory configuration
- * registers correctly?
- */
-+#ifdef USEMGAHAL
- else if ((pMga->softbooted || pMga->Primary /*|| pMga->HALLoaded*/ ) &&
-+#else
-+ else if ((pMga->softbooted || pMga->Primary) &&
-+#endif
- (pMga->Chipset != PCI_CHIP_MGA2064) &&
- (pMga->Chipset != PCI_CHIP_MGA2164) &&
- (pMga->Chipset != PCI_CHIP_MGA2164_AGP)) {
-@@ -2264,7 +2322,7 @@
-
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "YDstOrg is set to %d\n",
- pMga->YDstOrg);
-- if(xf86IsEntityShared(pScrn->entityList[0])) {
-+ if(pMga->DualHeadEnabled) {
- if(pMga->SecondCrtc == FALSE) {
- pMga->FbUsableSize = pMgaEnt->masterFbMapSize;
- /* Allocate HW cursor buffer at the end of video ram */
-@@ -2368,7 +2426,7 @@
- /* This needs to only happen after this board has completed preinit
- * both times
- */
-- if(xf86IsEntityShared(pScrn->entityList[0])) {
-+ if(pMga->DualHeadEnabled) {
- /* Entity is shared make sure refcount == 2 */
- /* If ref count is 2 then reset it to 0 */
- if(pMgaEnt->refCount == 2) {
-@@ -2630,6 +2688,7 @@
- vgaRegPtr vgaReg;
- MGAPtr pMga = MGAPTR(pScrn);
- MGARegPtr mgaReg;
-+
- #ifdef USEMGAHAL
- Bool digital1 = FALSE;
- Bool digital2 = FALSE;
-@@ -2736,7 +2795,7 @@
-
- ); /* MGA_HAL */
-
-- /* getting around bugs in the HAL lib. MATROX: hint, hint */
-+ /* getting around bugs in the HAL lib. MATROX: hint, hint. */
- MGA_HAL(
- switch (pMga->Chipset) {
- case PCI_CHIP_MGA1064:
-@@ -2745,7 +2804,8 @@
- case PCI_CHIP_MGAG200:
- case PCI_CHIP_MGAG200_PCI:
- case PCI_CHIP_MGAG400:
-- if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) {
-+ case PCI_CHIP_MGAG550:
-+ if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) {
- outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW,
- pMga->FbCursorOffset >> 10);
- outMGAdac(MGA1064_CURSOR_BASE_ADR_HI,
-@@ -2769,6 +2829,7 @@
-
- MGAStormSync(pScrn);
- MGAStormEngineInit(pScrn);
-+
- vgaHWProtect(pScrn, FALSE);
-
- if (xf86IsPc98()) {
-@@ -2840,7 +2901,6 @@
-
- if (pScrn->pScreen != NULL)
- MGAStormSync(pScrn);
--
- if(pMga->SecondCrtc) {
- MGARestoreSecondCrtc(pScrn);
- return;
-@@ -2930,7 +2990,7 @@
- || (pMga->Chipset == PCI_CHIP_MGAG100_PCI))
- MGAG100BlackMagic(pMga);
-
-- if (xf86IsEntityShared(pScrn->entityList[0])) {
-+ if (pMga->DualHeadEnabled) {
- DevUnion *pPriv;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex);
- pMgaEnt = pPriv->ptr;
-@@ -2988,7 +3048,7 @@
- #ifdef USEMGAHAL
- MGA_HAL(
- /* There is a problem in the HALlib: set soft reset bit */
-- /* MATROX: hint, hint */
-+ /* MATROX: hint, hint. */
- if (!pMga->Primary && !pMga->FBDev &&
- (pMga->PciInfo->subsysCard == PCI_CARD_MILL_G200_SG) ) {
- OUTREG(MGAREG_Reset, 1);
-@@ -3040,7 +3100,6 @@
- if (!MGAModeInit(pScrn, pScrn->currentMode))
- return FALSE;
- }
--
- /* Darken the screen for aesthetic reasons and set the viewport */
- if (pMga->SecondCrtc == TRUE) {
- MGASaveScreenCrtc2(pScreen, SCREEN_SAVER_ON);
-@@ -3290,7 +3349,7 @@
- } else {
- xf86DrvMsg(pScrn->scrnIndex, driFrom, "Direct rendering disabled\n");
- }
-- if (xf86IsEntityShared(pScrn->entityList[0]) && pMga->SecondCrtc == FALSE)
-+ if (pMga->DualHeadEnabled && pMga->SecondCrtc == FALSE)
- pMgaEnt->directRenderingEnabled = pMga->directRenderingEnabled;
- pMga->haveQuiescense = 1;
- #endif
-@@ -3318,7 +3377,7 @@
- Bool
- MGASwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
- {
-- return MGAModeInit(xf86Screens[scrnIndex], mode);
-+ return MGAModeInit(xf86Screens[scrnIndex], mode);
- }
-
-
-@@ -3513,6 +3572,7 @@
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- MGAPtr pMga = MGAPTR(pScrn);
- MGAEntPtr pMgaEnt = NULL;
-+
- #ifdef USEMGAHAL
- MGA_HAL( RESTORE_TEXTMODE_ON_DVI(pMga); );
- #endif
-@@ -3534,7 +3594,7 @@
- }
- #endif
-
-- if (xf86IsEntityShared(pScrn->entityList[0])) {
-+ if (pMga->DualHeadEnabled) {
- DevUnion *pPriv;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex);
- pMgaEnt = pPriv->ptr;
-@@ -3543,7 +3603,7 @@
-
- #ifdef USEMGAHAL
- MGA_HAL(
-- if(xf86IsEntityShared(pScrn->entityList[0])) {
-+ if(pMga->DualHeadEnabled) {
- if(pMgaEnt->refCount == 0) {
- /* Both boards have closed there screen */
- MGACloseLibrary(pMga->pBoard);
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_g450pll.c Sat Jan 12 00:42:57 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c Sun Apr 14 15:07:08 2002
-@@ -208,6 +208,26 @@
- return TRUE;
- }
-
-+static CARD32 G450ReadMNP(ScrnInfoPtr pScrn)
-+{
-+ MGAPtr pMga = MGAPTR(pScrn);
-+ MGARegPtr pReg;
-+ CARD32 ret = 0;
-+
-+ pReg = &pMga->ModeReg;
-+
-+ if (!pMga->SecondCrtc) {
-+ ret = (CARD8)inMGAdac(MGA1064_PIX_PLLC_M) << 16;
-+ ret |= (CARD8)inMGAdac(MGA1064_PIX_PLLC_N) << 8;
-+ ret |= (CARD8)inMGAdac(MGA1064_PIX_PLLC_P);
-+ } else {
-+ ret = (CARD8)inMGAdac(MGA1064_VID_PLL_M) << 16;
-+ ret |= (CARD8)inMGAdac(MGA1064_VID_PLL_N) << 8;
-+ ret |= (CARD8)inMGAdac(MGA1064_VID_PLL_P);
-+ }
-+ return ret;
-+}
-+
-
- static CARD32 G450CompareMNP(ScrnInfoPtr pScrn, CARD32 ulFout, CARD32 ulMNP1,
- CARD32 ulMNP2, long *pulResult)
-@@ -305,6 +325,9 @@
-
- MGAPtr pMga = MGAPTR(pScrn);
-
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Restoring PLLClk = %d\n",f_out);
-+#endif
- G450FindFirstPLLParam(pScrn, f_out, &ulMNP);
- ulMNPTable[0] = ulMNP;
- G450FindNextPLLParam(pScrn, f_out, &ulMNP);
-@@ -454,4 +477,21 @@
- }
-
- return TRUE;
-+}
-+
-+long
-+MGAG450SavePLLFreq(ScrnInfoPtr pScrn)
-+{
-+ CARD32 ulMNP = G450ReadMNP(pScrn);
-+ CARD8 ucP;
-+ CARD32 freq;
-+
-+ G450CalculVCO(pScrn, ulMNP, &freq);
-+ ucP = (CARD8)(ulMNP & 0x03);
-+ G450ApplyPFactor(pScrn, ucP, &freq);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"Saved PLLClk = %d\n",freq);
-+#endif
-+ return freq;
- }
-diff -urN XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_macros.h XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_macros.h Wed Sep 26 21:59:17 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h Sun Apr 14 15:07:08 2002
-@@ -111,5 +111,8 @@
-
- #define MGAISGx50(x) ( (((x)->Chipset == PCI_CHIP_MGAG400) && ((x)->ChipRev >= 0x80)) || \
- ((x)->Chipset == PCI_CHIP_MGAG550) )
-+
-+#define MGA_DH_NEEDS_HAL(x) (((x)->Chipset == PCI_CHIP_MGAG400) && \
-+ ((x)->ChipRev < 0x80))
-
- #endif /* _MGA_MACROS_H_ */
+++ /dev/null
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile Wed Jan 24 01:06:21 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile Thu Apr 4 16:05:44 2002
-@@ -2,12 +2,12 @@
- #define IHaveModules
- #include <Server.tmpl>
-
-
- SRCS = neo_driver.c neo_bank.c neo_cursor.c neo_2097.c neo_2070.c \
-- neo_2090.c neo_2200.c neo_i2c.c neo_shadow.c neo_dga.c
-+ neo_2090.c neo_2200.c neo_i2c.c neo_shadow.c neo_dga.c neo_video.c
-
- OBJS = neo_driver.o neo_bank.o neo_cursor.o neo_2097.o neo_2070.o \
-- neo_2090.o neo_2200.o neo_i2c.o neo_shadow.o neo_dga.o
-+ neo_2090.o neo_2200.o neo_i2c.o neo_shadow.o neo_dga.o neo_video.o
-
- DEFINES = -DPSZ=8
-
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/NM-reg.txt Thu Jan 1 01:00:00 1970
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/NM-reg.txt Thu Apr 4 16:05:44 2002
-@@ -0,0 +1,69 @@
-+NM2160 Register GUESS
-+ --- Overlay and ZV capture ---
-+
-+2002,2.3.
-+
-+1. Overlay
-+ GRB0 bit5 Format; 0:YUY2/1:RGB
-+ bit1 1
-+ bit0 Enable overlay ; 1:enable/0:disable
-+ GRB1 bit7:4 X2[11:8]
-+ bit3:0 X1[11:8]
-+ GRB2 X1[7:0]
-+ GRB3 X2[7:0]
-+ GRB4 bit7:4 Y2[11:8]
-+ bit3:0 Y1[11:8]
-+ GRB5 Y1[7:0]
-+ GRB6 Y2[7:0]
-+ GRB7 VRAM offset[24:17]
-+ GRB8 VRAM offset[16:9]
-+ GRB9 VRAM offset[8:1]
-+ GRBA Width in byte[15:8]
-+ GRBB Width in byte[7:0]
-+ GRBC 0x4f
-+ GRBD -
-+ GRBE -
-+ GRBF bit2 0:normal/1:mirror
-+ bit1:0 b'10'
-+ GRC0 X scale[15:8] ; x1.0 == 0x1000
-+ GRC1 X scale[7:0]
-+ GRC2 Y scale[15:8] ; x1.0 == 0x1000
-+ GRC3 Y scale[7:0]
-+ GRC4 brightness ; -128 to +127
-+ GRC5 Color key(R)
-+ GRC6 Color key(G) / Color key(8bpp)
-+ GRC7 Color key(B)
-+
-+2. ZV capture
-+ GR0A bit5 Enable extended SR reg. ; 1:enable/0:disable
-+ bit0 1
-+
-+ SR08 bit7:1 b'1010000'
-+ bit0 Enable capture ; 1:enable/0:disable
-+ SR09 0x11
-+ SR0A 0x00
-+ SR0B -
-+ SR0C VRAM offset[8:1]
-+ SR0D VRAM offset[16:9]
-+ SR0E VRAM offset[24:17]
-+ SR0F -
-+ SR10 -
-+ SR11 -
-+ SR12 -
-+ SR13 -
-+ SR14 Y1[7:0]
-+ SR15 Y2[7:0]
-+ SR16 bit7:4 Y2[11:4]
-+ bit3:0 Y1[11:4]
-+ SR17 X1[7:0]
-+ SR18 X2[7:0]
-+ SR19 bit7:4 X2[11:8]
-+ bit3:0 X1[11:8]
-+ SR1A Width in byte[7:0]
-+ SR1B Width in byte[15:8]
-+ SR1C 0xfb
-+ SR1D 0x00
-+ SR1E 0xe2
-+ SR1F 0x02
-+
-+s.nomura@mba.nifty.ne.jp
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h Mon Oct 1 15:44:07 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h Thu Apr 4 16:05:44 2002
-@@ -60,6 +60,11 @@
-
- #include "xf86i2c.h"
-
-+#ifdef XvExtension
-+# include "xf86xv.h"
-+# include "Xv.h"
-+#endif /* XvExtension */
-+
- /*
- * Driver data structures.
- */
-@@ -121,6 +126,10 @@
- /* in neo_dga.c */
- Bool NEODGAInit(ScreenPtr pScreen);
-
-+/* in neo_video.c */
-+extern void NEOInitVideo(ScreenPtr pScreen);
-+extern void NEOResetVideo(ScrnInfoPtr pScrn);
-+
- /* shadow regs */
-
- #define NEO_EXT_CR_MAX 0x85
-@@ -199,6 +208,8 @@
- unsigned long NeoMMIOAddr;
- unsigned long NeoLinearAddr;
- unsigned char* NeoMMIOBase;
-+ unsigned long NeoMMIOAddr2;
-+ unsigned char* NeoMMIOBase2;
- unsigned char* NeoFbBase;
- long NeoFbMapSize;
- unsigned long vgaIOBase;
-@@ -249,6 +260,17 @@
- RefreshAreaFuncPtr refreshArea;
- void (*PointerMoved)(int index, int x, int y);
- int rotate;
-+ Bool showcache;
-+#ifdef XvExtension
-+ Bool video;
-+ double videoHZoom;
-+ double videoVZoom;
-+ XF86VideoAdaptorPtr overlayAdaptor;
-+ int overlay;
-+ int overlay_offset;
-+ int videoKey;
-+ int interlace;
-+#endif /* XvExtension */
- } NEORec, *NEOPtr;
-
- typedef struct {
-@@ -264,18 +286,20 @@
- #define GRAX 0x3CE
-
- /* vga IO functions */
--#define VGArCR(index) hwp->readCrtc(hwp,index)
--#define VGAwCR(index,val) hwp->writeCrtc(hwp,index,val)
--#define VGArGR(index) hwp->readGr(hwp,index)
--#define VGAwGR(index,val) hwp->writeGr(hwp,index,val)
-+#define VGArCR(index) (*hwp->readCrtc)(hwp, index)
-+#define VGAwCR(index, val) (*hwp->writeCrtc)(hwp, index, val)
-+#define VGArGR(index) (*hwp->readGr)(hwp, index)
-+#define VGAwGR(index, val) (*hwp->writeGr)(hwp, index, val)
-+#define VGArSR(index) (*hwp->readSeq)(hwp, index)
-+#define VGAwSR(index, val) (*hwp->writeSeq)(hwp, index, val)
-
- /* memory mapped register access macros */
--#define INREG8(addr) MMIO_IN8(nPtr->NeoMMIOBase, (addr))
--#define INREG16(addr) MMIO_IN16(nPtr->NeoMMIOBase, (addr))
--#define INREG(addr) MMIO_IN32(nPtr->NeoMMIOBase, (addr))
--#define OUTREG8(addr, val) MMIO_OUT8(nPtr->NeoMMIOBase, (addr), (val))
--#define OUTREG16(addr, val) MMIO_OUT16(nPtr->NeoMMIOBase, (addr), (val))
--#define OUTREG(addr, val) MMIO_OUT32(nPtr->NeoMMIOBase, (addr), (val))
-+#define INREG8(addr) MMIO_IN8(nPtr->NeoMMIOBase, addr)
-+#define INREG16(addr) MMIO_IN16(nPtr->NeoMMIOBase, addr)
-+#define INREG(addr) MMIO_IN32(nPtr->NeoMMIOBase, addr)
-+#define OUTREG8(addr, val) MMIO_OUT8(nPtr->NeoMMIOBase, addr, val)
-+#define OUTREG16(addr, val) MMIO_OUT16(nPtr->NeoMMIOBase, addr, val)
-+#define OUTREG(addr, val) MMIO_OUT32(nPtr->NeoMMIOBase, addr, val)
-
- /* This swizzle macro is to support the manipulation of cursor masks when
- * the sprite moves off the left edge of the display. This code is
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c Tue Sep 26 01:57:08 2000
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c Thu Apr 4 16:05:44 2002
-@@ -104,8 +104,6 @@
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- NEOPtr nPtr = NEOPTR(pScrn);
- NEOACLPtr nAcl = NEOACLPTR(pScrn);
-- BoxRec AvailFBArea;
-- int lines;
-
- nPtr->AccelInfoRec = infoPtr = XAACreateInfoRec();
- if(!infoPtr) return FALSE;
-@@ -158,23 +156,7 @@
- default:
- return FALSE;
- }
--
-- /* Initialize for widths */
-- nAcl->Pitch = pScrn->displayWidth * nAcl->PixelWidth;
-- lines = nAcl->cacheEnd /
-- (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3));
-- if(lines > 1024) lines = 1024;
--
-- AvailFBArea.x1 = 0;
-- AvailFBArea.y1 = 0;
-- AvailFBArea.x2 = pScrn->displayWidth;
-- AvailFBArea.y2 = lines;
-- xf86InitFBManager(pScreen, &AvailFBArea);
--
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-- "Using %i scanlines of offscreen memory for pixmap caching\n",
-- lines - pScrn->virtualY);
--
-+
- return(XAAInit(pScreen, infoPtr));
-
- }
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c Mon Oct 1 15:44:07 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c Thu Apr 4 16:05:44 2002
-@@ -101,8 +101,6 @@
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- NEOPtr nPtr = NEOPTR(pScrn);
- NEOACLPtr nAcl = NEOACLPTR(pScrn);
-- BoxRec AvailFBArea;
-- int lines;
-
- nPtr->AccelInfoRec = infoPtr = XAACreateInfoRec();
- if(!infoPtr) return FALSE;
-@@ -197,20 +195,6 @@
-
- nAcl->BltCntlFlags |= NEO_BC3_FIFO_EN;
-
-- lines = nAcl->cacheEnd /
-- (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3));
-- if(lines > 1024) lines = 1024;
--
-- AvailFBArea.x1 = 0;
-- AvailFBArea.y1 = 0;
-- AvailFBArea.x2 = pScrn->displayWidth;
-- AvailFBArea.y2 = lines;
-- xf86InitFBManager(pScreen, &AvailFBArea);
--
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-- "Using %i scanlines of offscreen memory for pixmap caching\n",
-- lines - pScrn->virtualY);
--
- return(XAAInit(pScreen, infoPtr));
- }
-
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c Mon Oct 1 15:44:07 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c Thu Apr 4 16:05:44 2002
-@@ -123,8 +123,6 @@
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- NEOPtr nPtr = NEOPTR(pScrn);
- NEOACLPtr nAcl = NEOACLPTR(pScrn);
-- int lines;
-- BoxRec AvailFBArea;
-
- nPtr->AccelInfoRec = infoPtr = XAACreateInfoRec();
- if(!infoPtr) return FALSE;
-@@ -245,21 +243,7 @@
- default:
- return FALSE;
- }
--
-- lines = nAcl->cacheEnd /
-- (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3));
-- if(lines > 1024) lines = 1024;
--
-- AvailFBArea.x1 = 0;
-- AvailFBArea.y1 = 0;
-- AvailFBArea.x2 = pScrn->displayWidth;
-- AvailFBArea.y2 = lines;
-- xf86InitFBManager(pScreen, &AvailFBArea);
--
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-- "Using %i scanlines of offscreen memory for pixmap caching\n",
-- lines - pScrn->virtualY);
--
-+
- return(XAAInit(pScreen, infoPtr));
- }
-
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c Sun Oct 28 04:33:42 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c Thu Apr 4 16:05:44 2002
-@@ -120,8 +120,6 @@
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- NEOPtr nPtr = NEOPTR(pScrn);
- NEOACLPtr nAcl = NEOACLPTR(pScrn);
-- BoxRec AvailFBArea;
-- int lines;
-
- nPtr->AccelInfoRec = infoPtr = XAACreateInfoRec();
- if(!infoPtr) return FALSE;
-@@ -251,19 +249,6 @@
- return FALSE;
- }
-
-- lines = nAcl->cacheEnd /
-- (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3));
-- if(lines > 1024) lines = 1024;
--
-- AvailFBArea.x1 = 0;
-- AvailFBArea.y1 = 0;
-- AvailFBArea.x2 = pScrn->displayWidth;
-- AvailFBArea.y2 = lines;
-- xf86InitFBManager(pScreen, &AvailFBArea);
--
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-- "Using %i scanlines of offscreen memory for pixmap caching\n",
-- lines - pScrn->virtualY);
-
- return(XAAInit(pScreen, infoPtr));
- }
-@@ -482,7 +467,7 @@
- NEOPtr nPtr = NEOPTR(pScrn);
-
- WAIT_ENGINE_IDLE();
-- OUTREG(NEOREG_DSTSTARTOFF, (y<<16) | (x & 0xffff));
-+ OUTREG(NEOREG_DSTSTARTOFF, (y <<16) | (x & 0xffff));
- OUTREG(NEOREG_XYEXT, (h<<16) | (w & 0xffff));
- }
-
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_dga.c Mon Oct 1 15:44:07 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_dga.c Thu Apr 4 16:05:44 2002
-@@ -43,8 +43,10 @@
- static void NEO_SetViewport(ScrnInfoPtr, int, int, int);
- static void NEO_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
- static void NEO_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
-+#if 0
- static void NEO_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int,
- unsigned long);
-+#endif
-
- static
- DGAFunctionRec NEODGAFuncs = {
-@@ -76,7 +78,7 @@
- imlines = (pScrn->videoRam * 1024) /
- (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3));
-
-- pixlines = (imlines > 1024 && !pNEO->noAccel) ? 1024 : imlines;
-+ pixlines = (imlines > 1024 && !pNEO->noAccel) ? 1024 : imlines;
-
- pMode = firstMode = pScrn->modes;
-
-@@ -184,7 +186,7 @@
- ){
- NEOPtr pNEO = NEOPTR(pScrn);
- vgaHWPtr hwp = VGAHWPTR(pScrn);
--
-+
- NEOAdjustFrame(pScrn->pScreen->myNum, x, y, flags);
- /* wait for retrace */
- while((hwp->readST01(hwp) & 0x08));
-@@ -240,7 +242,7 @@
- }
- }
-
--
-+#if 0
- static void
- NEO_BlitTransRect(
- ScrnInfoPtr pScrn,
-@@ -252,7 +254,7 @@
- /* this one should be separate since the XAA function would
- prohibit usage of ~0 as the key */
- }
--
-+#endif
-
- static Bool
- NEO_OpenFramebuffer(
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c Fri Nov 30 13:11:57 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c Sat Apr 6 19:49:40 2002
-@@ -299,7 +307,11 @@
- OPTION_PROG_LCD_MODE_REGS,
- OPTION_PROG_LCD_MODE_STRETCH,
- OPTION_OVERRIDE_VALIDATE_MODE,
-+ OPTION_SHOWCACHE,
- OPTION_ROTATE,
-+ OPTION_VIDEO_KEY,
-+ OPTION_OVERLAYMEM,
-+ OPTION_VIDEO_INTERLACE,
- OPTION_DISPLAY_HEIGHT_480,
- OPTION_STRANGE_LOCKUPS
- } NEOOpts;
-@@ -314,6 +326,7 @@
- { OPTION_LCD_STRETCH, "NoStretch", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_PCI_BURST, "pciBurst", OPTV_BOOLEAN, {0}, FALSE },
-+ { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE },
- { OPTION_PROG_LCD_MODE_REGS, "progLcdModeRegs",
- OPTV_BOOLEAN, {0}, FALSE },
-@@ -321,6 +334,10 @@
- OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_OVERRIDE_VALIDATE_MODE, "overrideValidateMode",
- OPTV_BOOLEAN, {0}, FALSE },
-+ { OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE },
-+ { OPTION_OVERLAYMEM, "OverlayMem", OPTV_INTEGER, {0}, FALSE },
-+ { OPTION_VIDEO_INTERLACE, "Interlace",
-+ OPTV_INTEGER, {0}, FALSE },
- { -1, NULL, OPTV_NONE, {0}, FALSE }
- };
-
-@@ -335,6 +352,7 @@
- { OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_LCD_STRETCH,"NoStretch", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_PCI_BURST, "pciBurst", OPTV_BOOLEAN, {0}, FALSE },
-+ { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE },
- { OPTION_STRANGE_LOCKUPS, "StrangeLockups", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_DISPLAY_HEIGHT_480, "DisplayHeight480",
-@@ -345,6 +363,10 @@
- OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_OVERRIDE_VALIDATE_MODE, "overrideValidateMode",
- OPTV_BOOLEAN, {0}, FALSE },
-+ { OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE },
-+ { OPTION_OVERLAYMEM, "OverlayMem", OPTV_INTEGER, {0}, FALSE },
-+ { OPTION_VIDEO_INTERLACE, "Interlace",
-+ OPTV_INTEGER, {0}, FALSE },
- { -1, NULL, OPTV_NONE, {0}, FALSE }
- };
-
-@@ -979,6 +1001,7 @@
- xf86GetOptValBool(nPtr->Options, OPTION_LCD_CENTER,&nPtr->lcdCenter);
- xf86GetOptValBool(nPtr->Options, OPTION_LCD_STRETCH,&nPtr->noLcdStretch);
- xf86GetOptValBool(nPtr->Options, OPTION_SHADOW_FB,&nPtr->shadowFB);
-+ xf86GetOptValBool(nPtr->Options, OPTION_SHOWCACHE,&nPtr->showcache);
- nPtr->onPciBurst = TRUE;
- xf86GetOptValBool(nPtr->Options, OPTION_PCI_BURST,&nPtr->onPciBurst);
- xf86GetOptValBool(nPtr->Options,
-@@ -1014,6 +1037,39 @@
- "Valid options are \"CW\" or \"CCW\"\n");
- }
- }
-+#ifdef XvExtension
-+ if(xf86GetOptValInteger(nPtr->Options,
-+ OPTION_VIDEO_KEY, &(nPtr->videoKey))) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n",
-+ nPtr->videoKey);
-+ } else {
-+ nPtr->videoKey = (1 << pScrn->offset.red) |
-+ (1 << pScrn->offset.green) |
-+ (((pScrn->mask.blue >> pScrn->offset.blue) - 1)
-+ << pScrn->offset.blue);
-+ }
-+ if(xf86GetOptValInteger(nPtr->Options, OPTION_OVERLAYMEM,
-+ &(nPtr->overlay))) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-+ "reserve %d bytes for overlay.\n", nPtr->overlay);
-+ } else {
-+ nPtr->overlay = 0;
-+ }
-+ nPtr->interlace = 0;
-+ if(xf86GetOptValInteger(nPtr->Options, OPTION_VIDEO_INTERLACE,
-+ &(nPtr->interlace))) {
-+ if (nPtr->interlace >= 0 && nPtr->interlace <= 2){
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "interlace flag = %d\n",
-+ nPtr->interlace);
-+ } else {
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-+ "\"%s\" is not a valid value for "
-+ "Option \"Interlaced\"\n", s);
-+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Valid options are 0..2\n");
-+ }
-+ }
-+#endif /* XvExtension */
-+
-
- if (height_480 && nPtr->NeoPanelWidth == 800) {
- xf86DrvMsg(pScrn->scrnIndex,X_CONFIG,
-@@ -1069,6 +1125,9 @@
- if (nPtr->strangeLockups)
- xf86DrvMsg(pScrn->scrnIndex,X_CONFIG,
- "Option StrangeLockups set: disabling some acceleration\n");
-+ if (nPtr->showcache)
-+ xf86DrvMsg(pScrn->scrnIndex,X_CONFIG,
-+ "Show chache for debugging\n");
- if (nPtr->shadowFB) {
- if (nPtr->noLinear) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-@@ -1096,6 +1155,8 @@
- nPtr->NeoLinearAddr = 0;
- }
-
-+ nPtr->NeoMMIOAddr2 = 0;
-+ nPtr->NeoMMIOBase2 = NULL;
- if (nPtr->pEnt->device->IOBase && !nPtr->noMMIO) {
- /* XXX Check this matches a PCI base address */
- nPtr->NeoMMIOAddr = nPtr->pEnt->device->IOBase;
-@@ -1113,7 +1174,7 @@
- "FB base address is set at 0x%X.\n",
- nPtr->NeoLinearAddr);
- }
-- if (!nPtr->NeoMMIOAddr) {
-+ if (!nPtr->NeoMMIOAddr && !nPtr->noMMIO) {
- switch (nPtr->NeoChipset) {
- case NM2070 :
- nPtr->NeoMMIOAddr = nPtr->NeoLinearAddr + 0x100000;
-@@ -1129,11 +1190,17 @@
- case NM2360:
- case NM2380:
- nPtr->NeoMMIOAddr = nPtr->PciInfo->memBase[1];
-+ nPtr->NeoMMIOAddr2 = nPtr->PciInfo->memBase[2];
- break;
- }
- xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
- "MMIO base address is set at 0x%X.\n",
- nPtr->NeoMMIOAddr);
-+ if (nPtr->NeoMMIOAddr2 != 0){
-+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-+ "MMIO base address2 is set at 0x%X.\n",
-+ nPtr->NeoMMIOAddr2);
-+ }
- }
- /* XXX What about VGA resources in OPERATING mode? */
- if (xf86RegisterResources(nPtr->pEnt->index, NULL, ResExclusive))
-@@ -1152,7 +1219,7 @@
- "FB base address is set at 0x%X.\n",
- nPtr->NeoLinearAddr);
- }
-- if (!nPtr->NeoMMIOAddr) {
-+ if (!nPtr->NeoMMIOAddr && !nPtr->noMMIO) {
- nPtr->NeoMMIOAddr = nPtr->NeoLinearAddr + 0x100000;
- xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
- "MMIO base address is set at 0x%X.\n",
-@@ -1293,6 +1360,10 @@
- /* Should we re-save the text mode on each VT enter? */
- if(!neoModeInit(pScrn, pScrn->currentMode))
- return FALSE;
-+#ifdef XvExtension
-+ if (nPtr->video)
-+ NEOResetVideo(pScrn);
-+#endif
- if (nPtr->NeoHWCursorShown)
- NeoShowCursor(pScrn);
- NEOAdjustFrame(pScrn->scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
-@@ -1384,12 +1455,12 @@
- /* Map the Neo memory and possible MMIO areas */
- if (!neoMapMem(pScrn))
- return FALSE;
--
-+
- /*
- * next we save the current state and setup the first mode
- */
- neoSave(pScrn);
--
-+
- if (!neoModeInit(pScrn,pScrn->currentMode))
- return FALSE;
- vgaHWSaveScreen(pScreen,SCREEN_SAVER_ON);
-@@ -1431,7 +1502,7 @@
- nPtr->ShadowPtr = NULL;
- FBStart = nPtr->NeoFbBase;
- }
--
-+
- ret = fbScreenInit(pScreen, FBStart,
- width, height,
- pScrn->xDpi, pScrn->yDpi,
-@@ -1509,13 +1580,13 @@
- nPtr->NeoLinearAddr);
- /* Setup pointers to free space in video ram */
- allocatebase = (pScrn->videoRam << 10);
-- freespace = allocatebase - pScrn->displayWidth *
-+ freespace = allocatebase - pScrn->displayWidth *
- pScrn->virtualY * (pScrn->bitsPerPixel >> 3);
- currentaddr = allocatebase;
- xf86DrvMsg(scrnIndex, X_PROBED,
- "%d bytes off-screen memory available\n", freespace);
-
-- if (nPtr->swCursor || nPtr->noMMIO) {
-+ if (nPtr->swCursor || !nPtr->NeoMMIOBase) {
- xf86DrvMsg(scrnIndex, X_CONFIG,
- "Using Software Cursor.\n");
- } else if (nPtr->NeoCursorMem <= freespace) {
-@@ -1530,19 +1601,52 @@
- } else xf86DrvMsg(scrnIndex, X_ERROR,
- "Too little space for H/W cursor.\n");
-
-- if (!nPtr->noAccel && nPtr->noMMIO)
-+ if (!nPtr->noAccel && !nPtr->NeoMMIOBase)
- xf86DrvMsg(pScrn->scrnIndex,X_INFO,
- "Acceleration disabled when not using MMIO\n");
--
-- /* Setup the acceleration primitives */
-- if (!nPtr->noAccel && !nPtr->noMMIO) {
-+ {
-+#ifdef XvExtension
-+ if (nPtr->overlay > 0){
-+ if (nPtr->overlay > freespace){
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,
-+ "Can not reserve %d bytes for overlay. "
-+ "Resize to %d bytes.\n",
-+ nPtr->overlay, freespace);
-+ nPtr->overlay = freespace;
-+ }
-+ currentaddr -= nPtr->overlay;
-+ freespace -= nPtr->overlay;
-+ nPtr->overlay_offset = currentaddr;
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"Overlay at 0x%x\n",
-+ nPtr->overlay_offset);
-+ }
-+#endif /* XvExtension */
- nAcl->cacheStart = currentaddr - freespace;
- nAcl->cacheEnd = currentaddr;
- freespace = 0;
-+ if (nAcl->cacheStart < nAcl->cacheEnd) {
-+ BoxRec AvailFBArea;
-+ int lines = nAcl->cacheEnd /
-+ (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3));
-+ if (!nPtr->noAccel && nPtr->NeoMMIOBase && lines > 1024)
-+ lines = 1024;
-+ AvailFBArea.x1 = 0;
-+ AvailFBArea.y1 = 0;
-+ AvailFBArea.x2 = pScrn->displayWidth;
-+ AvailFBArea.y2 = lines;
-+ xf86InitFBManager(pScreen, &AvailFBArea);
-+
-+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-+ "Using %i scanlines of offscreen memory \n"
-+ , lines - pScrn->virtualY);
-+ }
-+ }
-+ /* Setup the acceleration primitives */
-+ if (!nPtr->noAccel && nPtr->NeoMMIOBase) {
- if (nAcl->cacheStart >= nAcl->cacheEnd) {
- xf86DrvMsg(scrnIndex, X_ERROR,
- "Too little space for pixmap cache.\n");
-- }
-+ }
- switch(nPtr->NeoChipset) {
- case NM2070 :
- Neo2070AccelInit(pScreen);
-@@ -1624,6 +1728,8 @@
-
- pScrn->racIoFlags = pScrn->racMemFlags = racflag;
-
-+ NEOInitVideo(pScreen);
-+
- pScreen->SaveScreen = vgaHWSaveScreen;
-
- /* Setup DPMS mode */
-@@ -1635,18 +1741,7 @@
- pScrn->memPhysBase = (unsigned long)nPtr->NeoFbBase;
- pScrn->fbOffset = 0;
- }
--
--#ifdef XvExtension
-- {
-- XF86VideoAdaptorPtr *ptr;
-- int n;
--
-- n = xf86XVListGenericAdaptors(pScrn,&ptr);
-- if (n)
-- xf86XVScreenInit(pScreen, ptr, n);
-- }
--#endif
--
-+
- /* Wrap the current CloseScreen function */
- nPtr->CloseScreen = pScreen->CloseScreen;
- pScreen->CloseScreen = NEOCloseScreen;
-@@ -1677,11 +1772,21 @@
- int Base;
-
- pScrn = xf86Screens[scrnIndex];
-- Base = (y * pScrn->displayWidth + x) >> 2;
- hwp = VGAHWPTR(pScrn);
- nPtr = NEOPTR(pScrn);
-- /* Scale Base by the number of bytes per pixel. */
-
-+ if (nPtr->showcache && y) {
-+ int lastline = nPtr->NeoFbMapSize /
-+ ((pScrn->displayWidth * pScrn->bitsPerPixel) / 8);
-+
-+ lastline -= pScrn->currentMode->VDisplay;
-+ y += pScrn->virtualY - 1;
-+ if (y > lastline) y = lastline;
-+ }
-+
-+ Base = (y * pScrn->displayWidth + x) >> 2;
-+
-+ /* Scale Base by the number of bytes per pixel. */
- switch (pScrn->depth) {
- case 8 :
- break;
-@@ -1730,6 +1835,7 @@
- if (nPtr->NeoHWCursorShown)
- NeoHideCursor(pScrn);
- neoRestore(pScrn, &(VGAHWPTR(pScrn))->SavedReg, &nPtr->NeoSavedReg, TRUE);
-+
- neoLock(pScrn);
- neoUnmapMem(pScrn);
- }
-@@ -1845,12 +1951,18 @@
-
- if (!nPtr->noLinear) {
- if (!nPtr->noMMIO) {
-- if (nPtr->pEnt->location.type == BUS_PCI)
-+ if (nPtr->pEnt->location.type == BUS_PCI){
- nPtr->NeoMMIOBase =
- xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
- nPtr->PciTag, nPtr->NeoMMIOAddr,
- 0x200000L);
-- else
-+ if (nPtr->NeoMMIOAddr2 != 0){
-+ nPtr->NeoMMIOBase2 =
-+ xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
-+ nPtr->PciTag, nPtr->NeoMMIOAddr2,
-+ 0x100000L);
-+ }
-+ } else
- nPtr->NeoMMIOBase =
- xf86MapVidMem(pScrn->scrnIndex,
- VIDMEM_MMIO, nPtr->NeoMMIOAddr,
-@@ -1889,8 +2001,14 @@
- NEOPtr nPtr = NEOPTR(pScrn);
-
- if (!nPtr->noLinear) {
-- xf86UnMapVidMem(pScrn->scrnIndex, (pointer)nPtr->NeoMMIOBase, 0x200000L);
-+ if (nPtr->NeoMMIOBase)
-+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer)nPtr->NeoMMIOBase,
-+ 0x200000L);
- nPtr->NeoMMIOBase = NULL;
-+ if (nPtr->NeoMMIOBase2)
-+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer)nPtr->NeoMMIOBase2,
-+ 0x100000L);
-+ nPtr->NeoMMIOBase2 = NULL;
- xf86UnMapVidMem(pScrn->scrnIndex, (pointer)nPtr->NeoFbBase,
- nPtr->NeoFbMapSize);
- }
-@@ -2200,7 +2318,7 @@
- unsigned char temp;
- int i;
- Bool clock_hi = FALSE;
--
-+
- vgaHWProtect(pScrn,TRUE); /* Blank the screen */
-
- VGAwGR(0x09,0x26);
-@@ -2220,6 +2338,7 @@
- * any reserved bits.
- */
- temp = VGArGR(0x90);
-+
- switch (nPtr->NeoChipset) {
- case NM2070 :
- temp &= 0xF0; /* Save bits 7:4 */
-@@ -2238,6 +2357,7 @@
- break;
- }
- VGAwGR(0x90,temp);
-+
- /*
- * In some rare cases a lockup might occur if we don't delay
- * here. (Reported by Miles Lane)
-@@ -2256,7 +2376,6 @@
- * had time to take effect.
- */
- xf86UDelay(200000);
--
- /*
- * This function handles restoring the generic VGA registers. */
- vgaHWRestore(pScrn, VgaReg,
-@@ -2273,6 +2392,7 @@
- VGAwGR(0x11, restore->SysIfaceCntl2);
- VGAwGR(0x15, restore->SingleAddrPage);
- VGAwGR(0x16, restore->DualAddrPage);
-+
- temp = VGArGR(0x20);
- switch (nPtr->NeoChipset) {
- case NM2070 :
-@@ -2349,7 +2469,7 @@
- }
- if (restore->biosMode)
- VGAwCR(0x23,restore->biosMode);
--
-+
- if (restore->reg) {
- VGAwCR(0x23,restore->reg->CR[0x23]);
- VGAwCR(0x25,restore->reg->CR[0x25]);
-@@ -2371,13 +2491,13 @@
- VGAwGR(i, restore->reg->GR[i]);
- }
- }
-+
- /* Program vertical extension register */
- if (nPtr->NeoChipset == NM2200 || nPtr->NeoChipset == NM2230
- || nPtr->NeoChipset == NM2360 || nPtr->NeoChipset == NM2380) {
- VGAwCR(0x70, restore->VerticalExt);
- }
--
--
-+
- vgaHWProtect(pScrn, FALSE); /* Turn on screen */
-
- }
-@@ -2574,7 +2694,7 @@
- NeoNew->PanelHorizCenterReg3 = 0x00;
- NeoNew->PanelHorizCenterReg4 = 0x00;
- NeoNew->PanelHorizCenterReg5 = 0x00;
--
-+
- if (nPtr->lcdCenter &&
- (NeoNew->PanelDispCntlReg1 & 0x02)) {
- if (mode->HDisplay == nPtr->NeoPanelWidth) {
-@@ -2632,6 +2752,18 @@
- }
- }
- }
-+#ifdef XvExtension
-+ if (!noLcdStretch) {
-+ if (mode->HDisplay != nPtr->NeoPanelWidth)
-+ nPtr->videoHZoom = (double)nPtr->NeoPanelWidth/mode->HDisplay;
-+ if (mode->VDisplay != nPtr->NeoPanelHeight)
-+ nPtr->videoVZoom = (double)nPtr->NeoPanelHeight/mode->VDisplay;
-+ } else {
-+ nPtr->videoHZoom = 1.0;
-+ nPtr->videoVZoom = 1.0;
-+ }
-+#endif
-+
- NeoNew->biosMode = neoFindMode(mode->HDisplay,mode->VDisplay,pScrn->depth);
-
- /*
-@@ -2764,9 +2896,8 @@
- }
-
- /* Turn the screen on/off */
-- outb(0x3C4, 0x01);
-- SEQ01 |= inb(0x3C5) & ~0x20;
-- outb(0x3C5, SEQ01);
-+ SEQ01 |= VGArSR(0x01) & ~0x20;
-+ VGAwSR(0x01, SEQ01);
-
- /* Turn the LCD on/off */
- LCD_on |= VGArGR(0x20) & ~0x02;
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c Thu Jan 1 01:00:00 1970
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c Thu Apr 4 16:05:44 2002
-@@ -0,0 +1,1232 @@
-+/**********************************************************************
-+Copyright 2002 by Shigehiro Nomura.
-+
-+ All Rights Reserved
-+
-+Permission to use, copy, modify, distribute, and sell this software and
-+its documentation for any purpose is hereby granted without fee,
-+provided that the above copyright notice appear in all copies and that
-+both that copyright notice and this permission notice appear in
-+supporting documentation, and that the name of Shigehiro Nomura not be
-+used in advertising or publicity pertaining to distribution of the
-+software without specific, written prior permission. Shigehiro Nomura
-+and its suppliers make no representations about the suitability of this
-+software for any purpose. It is provided "as is" without express or
-+implied warranty.
-+
-+SHIGEHIRO NOMURA DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-+INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-+EVENT SHALL SHIGEHIRO NOMURA AND/OR ITS SUPPLIERS BE LIABLE FOR ANY
-+SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER
-+RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
-+CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
-+CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+**********************************************************************/
-+
-+/*
-+ * Copyright 2002 SuSE Linux AG, Author: Egbert Eich
-+ */
-+
-+#include "neo.h"
-+#include "neo_video.h"
-+
-+#define nElems(x) (sizeof(x) / sizeof(x[0]))
-+#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
-+
-+#if defined(XvExtension)
-+
-+#include "dixstruct.h"
-+#include "xaa.h"
-+#include "xaalocal.h"
-+
-+static XF86VideoAdaptorPtr NEOSetupVideo(ScreenPtr);
-+
-+static int NEOPutVideo(ScrnInfoPtr, short, short, short, short,
-+ short, short, short, short, RegionPtr, pointer);
-+
-+static void NEOStopVideo(ScrnInfoPtr, pointer, Bool);
-+static int NEOSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
-+static int NEOGetPortAttribute(ScrnInfoPtr, Atom, INT32 *, pointer);
-+static void NEOQueryBestSize(ScrnInfoPtr, Bool, short, short, short,
-+ short, unsigned int *, unsigned int *, pointer);
-+static int NEOPutImage(ScrnInfoPtr, short, short, short, short, short, short,
-+ short, short, int, unsigned char *, short, short, Bool,
-+ RegionPtr, pointer);
-+static int NEOQueryImageAttributes(ScrnInfoPtr, int, unsigned short *,
-+ unsigned short *, int *, int *);
-+
-+static Bool RegionsEqual(RegionPtr, RegionPtr);
-+static void NEODisplayVideo(ScrnInfoPtr, int, int, short, short, int, int,
-+ int, int, int, BoxPtr, short, short, short, short);
-+
-+static void NEOInitOffscreenImages(ScreenPtr);
-+static FBLinearPtr NEOAllocateMemory(ScrnInfoPtr, FBLinearPtr, int);
-+static void NEOCopyData(unsigned char *, unsigned char *, int, int, int, int);
-+static void NEOCopyYV12Data(unsigned char *, unsigned char *, unsigned char *,
-+ unsigned char *, int, int, int, int, int);
-+
-+static int NEOAllocSurface(ScrnInfoPtr, int, unsigned short, unsigned short,
-+ XF86SurfacePtr);
-+static int NEOFreeSurface(XF86SurfacePtr);
-+static int NEODisplaySurface(XF86SurfacePtr, short, short, short, short,
-+ short, short, short, short, RegionPtr clipBoxes);
-+static int NEOStopSurface(XF86SurfacePtr);
-+static int NEOGetSurfaceAttribute(ScrnInfoPtr, Atom, INT32 *);
-+static int NEOSetSurfaceAttribute(ScrnInfoPtr, Atom, INT32);
-+
-+static Atom xvColorKey, xvBrightness, xvInterlace;
-+
-+void
-+NEOInitVideo(ScreenPtr pScreen)
-+{
-+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ XF86VideoAdaptorPtr *overlayAdaptors, *newAdaptors = NULL;
-+ XF86VideoAdaptorPtr newAdaptor = NULL;
-+ int numAdaptors;
-+
-+ numAdaptors = xf86XVListGenericAdaptors(pScrn, &overlayAdaptors);
-+
-+ if (nPtr->NeoChipset >= NM2160
-+ && !nPtr->noLinear
-+ && nPtr->NeoMMIOBase2 != NULL){
-+ nPtr->video = TRUE;
-+ newAdaptor = NEOSetupVideo(pScreen);
-+ NEOInitOffscreenImages(pScreen);
-+ } else
-+ nPtr->video = FALSE;
-+
-+ if (newAdaptor){
-+ if (!numAdaptors){
-+ numAdaptors = 1;
-+ overlayAdaptors = &newAdaptor;
-+ } else {
-+ newAdaptors = xalloc((numAdaptors + 1)
-+ * sizeof(XF86VideoAdaptorPtr*));
-+ if (newAdaptors){
-+ memcpy(newAdaptors, overlayAdaptors,
-+ numAdaptors * sizeof(XF86VideoAdaptorPtr));
-+ newAdaptors[numAdaptors++] = newAdaptor;
-+ overlayAdaptors = newAdaptors;
-+ }
-+ }
-+ }
-+
-+ if (numAdaptors)
-+ xf86XVScreenInit(pScreen, overlayAdaptors, numAdaptors);
-+
-+ if (newAdaptors)
-+ xfree(newAdaptors);
-+}
-+
-+static XF86VideoEncodingRec NEOVideoEncodings[] =
-+{
-+ {
-+ NEO_VIDEO_VIDEO,
-+ "XV_VIDEO",
-+ 1024, 1024,
-+ {1, 1}
-+ },
-+ {
-+ NEO_VIDEO_IMAGE,
-+ "XV_IMAGE",
-+ 1024, 1024,
-+ {1, 1}
-+ }
-+};
-+
-+static XF86VideoFormatRec NEOVideoFormats[] =
-+{
-+ { 8, PseudoColor },
-+ { 15, TrueColor },
-+ { 16, TrueColor },
-+ { 24, TrueColor },
-+};
-+
-+static XF86AttributeRec NEOVideoAttributes[] =
-+{
-+ {
-+ XvSettable | XvGettable,
-+ 0x000000, 0xFFFFFF,
-+ "XV_COLORKEY"
-+ },
-+ {
-+ XvSettable | XvGettable,
-+ -128, 127,
-+ "XV_BRIGHTNESS"
-+ },
-+ {
-+ XvSettable | XvGettable,
-+ 0,2,
-+ "XV_INTERLACE"
-+ },
-+};
-+
-+static XF86ImageRec NEOVideoImages[] =
-+{
-+ XVIMAGE_YUY2,
-+ XVIMAGE_YV12,
-+ XVIMAGE_I420,
-+ {
-+ FOURCC_RV15,
-+ XvRGB,
-+ LSBFirst,
-+ { 'R', 'V' ,'1', '5',
-+ 0x00,'5',0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
-+ 16,
-+ XvPacked,
-+ 1,
-+ 15, 0x001F, 0x03E0, 0x7C00,
-+ 0, 0, 0,
-+ 0, 0, 0,
-+ 0, 0, 0,
-+ { 'R', 'V', 'B' },
-+ XvTopToBottom
-+ },
-+ {
-+ FOURCC_RV16,
-+ XvRGB,
-+ LSBFirst,
-+ { 'R', 'V' ,'1', '6',
-+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 },
-+ 16,
-+ XvPacked,
-+ 1,
-+ 16, 0x001F, 0x07E0, 0xF800,
-+ 0, 0, 0,
-+ 0, 0, 0,
-+ 0, 0, 0,
-+ { 'R', 'V', 'B' },
-+ XvTopToBottom
-+ }
-+};
-+
-+static XF86VideoAdaptorPtr
-+NEOSetupVideo(ScreenPtr pScreen)
-+{
-+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ NEOPortPtr pPriv;
-+ XF86VideoAdaptorPtr overlayAdaptor;
-+ int i;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOSetupVideo\n");
-+#endif
-+ if ((overlayAdaptor = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
-+ sizeof(DevUnion) +
-+ sizeof(NEOPortRec))) == NULL){
-+ return (NULL);
-+ }
-+
-+ overlayAdaptor->type = XvInputMask | XvImageMask | XvWindowMask
-+ | XvOutputMask | XvVideoMask;
-+ overlayAdaptor->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
-+ overlayAdaptor->name = "NeoMagic Video Engine";
-+ overlayAdaptor->nEncodings = nElems(NEOVideoEncodings);
-+ overlayAdaptor->pEncodings = NEOVideoEncodings;
-+ for (i = 0; i < nElems(NEOVideoEncodings); i++){
-+ NEOVideoEncodings[i].width = 1024;
-+ NEOVideoEncodings[i].height = 1024;
-+ }
-+ overlayAdaptor->nFormats = nElems(NEOVideoFormats);
-+ overlayAdaptor->pFormats = NEOVideoFormats;
-+ overlayAdaptor->nPorts = 1;
-+ overlayAdaptor->pPortPrivates = (DevUnion*) &overlayAdaptor[1];
-+ overlayAdaptor->pPortPrivates[0].ptr =
-+ (pointer) &overlayAdaptor->pPortPrivates[1];
-+ overlayAdaptor->nAttributes = nElems(NEOVideoAttributes);
-+ overlayAdaptor->pAttributes = NEOVideoAttributes;
-+ overlayAdaptor->nImages = nElems(NEOVideoImages);
-+ overlayAdaptor->pImages = NEOVideoImages;
-+
-+ overlayAdaptor->PutVideo = NEOPutVideo;
-+ overlayAdaptor->PutStill = NULL;
-+ overlayAdaptor->GetVideo = NULL;
-+ overlayAdaptor->GetStill = NULL;
-+
-+ overlayAdaptor->StopVideo = NEOStopVideo;
-+ overlayAdaptor->SetPortAttribute = NEOSetPortAttribute;
-+ overlayAdaptor->GetPortAttribute = NEOGetPortAttribute;
-+ overlayAdaptor->QueryBestSize = NEOQueryBestSize;
-+ overlayAdaptor->PutImage = NEOPutImage;
-+ overlayAdaptor->QueryImageAttributes = NEOQueryImageAttributes;
-+
-+ pPriv = (NEOPortPtr)overlayAdaptor->pPortPrivates[0].ptr;
-+ pPriv->colorKey = nPtr->videoKey;
-+ pPriv->interlace = nPtr->interlace;
-+ pPriv->videoStatus = 0;
-+ pPriv->brightness = 0;
-+ REGION_INIT(pScreen, &pPriv->clip, NullBox, 0);
-+ nPtr->overlayAdaptor = overlayAdaptor;
-+
-+ xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
-+ xvColorKey = MAKE_ATOM("XV_COLORKEY");
-+ xvInterlace = MAKE_ATOM("XV_INTERLACE");
-+
-+ NEOResetVideo(pScrn);
-+
-+ return (overlayAdaptor);
-+}
-+
-+void
-+NEOResetVideo(ScrnInfoPtr pScrn)
-+{
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ NEOPortPtr pPriv = (NEOPortPtr)nPtr->overlayAdaptor->pPortPrivates[0].ptr;
-+ int r, g, b;
-+ VGA_HWP(pScrn);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOResetVideo\n");
-+#endif
-+ switch (pScrn->depth){
-+ case 8:
-+ OUTGR(0xc6, pPriv->colorKey & 0);
-+ OUTGR(0xc5, pPriv->colorKey & 0xff);
-+ OUTGR(0xc7, pPriv->colorKey & 0);
-+ break;
-+ default:
-+ r = (pPriv->colorKey & pScrn->mask.red) >> pScrn->offset.red;
-+ g = (pPriv->colorKey & pScrn->mask.green) >> pScrn->offset.green;
-+ b = (pPriv->colorKey & pScrn->mask.blue) >> pScrn->offset.blue;
-+ OUTGR(0xc5, r);
-+ OUTGR(0xc6, g);
-+ OUTGR(0xc7, b);
-+ break;
-+ }
-+ OUTGR(0xc4, pPriv->brightness);
-+}
-+
-+static int
-+NEOPutVideo(ScrnInfoPtr pScrn,
-+ short src_x, short src_y, short drw_x, short drw_y,
-+ short src_w, short src_h, short drw_w, short drw_h,
-+ RegionPtr clipBoxes, pointer data)
-+{
-+ NEOPortPtr pPriv = (NEOPortPtr)data;
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ CARD32 src_pitch, offset;
-+ int xscale, yscale;
-+ BoxRec dstBox;
-+ INT32 x1, y1, x2, y2;
-+ int size, bpp;
-+ unsigned char capctrl;
-+ VGA_HWP(pScrn);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOPutVideo: src: %d %d %d %d\n",
-+ src_x, src_y, src_w, src_h);
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOPutVideo: drw: %d %d %d %d\n",
-+ drw_x, drw_y, drw_w, drw_h);
-+#endif
-+ if (src_w > 720)
-+ src_w = 720;
-+ if (src_h > 576)
-+ src_h = 576;
-+ if (pPriv->interlace != 2)
-+ src_h /= 2;
-+ x1 = src_x;
-+ y1 = src_y;
-+ x2 = src_x + src_w;
-+ y2 = src_y + src_h;
-+
-+ dstBox.x1 = drw_x;
-+ dstBox.y1 = drw_y;
-+ dstBox.x2 = drw_x + drw_w;
-+ dstBox.y2 = drw_y + drw_h;
-+
-+ if (!xf86XVClipVideoHelper(&dstBox, &x1, &x2, &y1, &y2,
-+ clipBoxes, src_w, src_h)){
-+ return(Success);
-+ }
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOPutVideo: %d %d %d %d\n",
-+ x1, y1, x2, y2);
-+#endif
-+
-+ dstBox.x1 -= pScrn->frameX0;
-+ dstBox.y1 -= pScrn->frameY0;
-+ dstBox.x2 -= pScrn->frameX0;
-+ dstBox.y2 -= pScrn->frameY0;
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOPutVideo: dstBox %d %d %d %d\n",
-+ dstBox.x1, dstBox.y1, dstBox.x2, dstBox.y2);
-+#endif
-+
-+ bpp = (pScrn->bitsPerPixel + 1) >> 3;
-+ src_pitch = (src_w + 7) & ~7;
-+
-+ xscale = 0x1000;
-+ if (src_w <= drw_w){
-+ xscale = (src_w * 0x1000 / drw_w) & 0xffff;
-+ }
-+
-+ yscale = 0x1000;
-+ if (src_h <= drw_h){
-+ yscale = (src_h * 0x1000 / drw_h) & 0xffff;
-+ }
-+
-+ size = src_h * src_pitch * 2;
-+
-+ if (size > nPtr->overlay){
-+ if ((pPriv->linear = NEOAllocateMemory(pScrn, pPriv->linear, size))
-+ == NULL){
-+ return (BadAlloc);
-+ }
-+ } else {
-+ pPriv->linear = NULL;
-+ }
-+
-+ if (pPriv->linear == NULL){
-+ offset = nPtr->overlay_offset;
-+ } else {
-+ offset = pPriv->linear->offset * bpp;
-+ }
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOPutVideo: offset=0x%x\n", offset);
-+#endif
-+ WAIT_ENGINE_IDLE();
-+ memset(nPtr->NeoFbBase + offset, 0, size);
-+
-+ if (!RegionsEqual(&pPriv->clip, clipBoxes)){
-+ REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
-+ xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey,
-+ clipBoxes);
-+ }
-+
-+ x1 >>= 16;
-+ y1 >>= 16;
-+ x2 >>= 16;
-+ y2 >>= 16;
-+
-+ switch (nPtr->NeoChipset) {
-+ default:
-+ case NM2160:
-+ offset/=2;
-+ OUTGR(0xbc, 0x4f);
-+ break;
-+ case NM2200:
-+ case NM2230:
-+ case NM2360:
-+ case NM2380:
-+ OUTGR(0xbc, 0x2e);
-+ break;
-+ }
-+
-+
-+ OUTGR(0xb1, (((dstBox.x2-1) >> 4) & 0xf0) | ((dstBox.x1 >> 8) & 0x0f));
-+ OUTGR(0xb2, dstBox.x1);
-+ OUTGR(0xb3, dstBox.x2 - 1);
-+ OUTGR(0xb4, (((dstBox.y2 - 1) >> 4) & 0xf0) | ((dstBox.y1 >> 8) & 0x0f));
-+ OUTGR(0xb5, dstBox.y1);
-+ OUTGR(0xb6, dstBox.y2 - 1);
-+ OUTGR(0xb7, offset >> 16);
-+ OUTGR(0xb8, offset >> 8);
-+ OUTGR(0xb9, offset );
-+ OUTGR(0xba, src_pitch >> 8);
-+ OUTGR(0xbb, src_pitch);
-+
-+ OUTGR(0xc0, xscale >> 8);
-+ OUTGR(0xc1, xscale);
-+ OUTGR(0xc2, yscale >> 8);
-+ OUTGR(0xc3, yscale);
-+ OUTGR(0xbf, 0x02);
-+
-+ OUTGR(0x0a, 0x21);
-+
-+ OUTSR(0x0c, offset );
-+ OUTSR(0x0d, offset >> 8);
-+ OUTSR(0x0e, offset >> 16);
-+ OUTSR(0x1a, src_pitch);
-+ OUTSR(0x1b, src_pitch>>8);
-+
-+ OUTSR(0x17, 0 + x1);
-+ OUTSR(0x18, 0 + x2 -1);
-+ OUTSR(0x19, (((0 + x2 - 1) >> 4) & 0xf0) | (((0 + x1) >> 8) & 0x0f));
-+
-+ OUTSR(0x14, 14 + y1);
-+ OUTSR(0x15, 14 + y2 - 2);
-+ OUTSR(0x16, (((14 + y2 - 1) >> 4) & 0xf0) | (((14 + y1) >> 8) & 0x0f));
-+
-+ OUTSR(0x1c, 0xfb);
-+ OUTSR(0x1d, 0x00);
-+ OUTSR(0x1e, 0xe2);
-+ OUTSR(0x1f, 0x02);
-+
-+ OUTSR(0x09, 0x11);
-+ OUTSR(0x0a, 0x00);
-+
-+ capctrl = 0x21;
-+ switch (pPriv->interlace){
-+ case 0: /* Combine 2 fields */
-+ break;
-+ case 1: /* one field only */
-+ capctrl |= 0x80;
-+ break;
-+ case 2: /* Interlaced fields */
-+ capctrl |= 0x40;
-+ break;
-+ }
-+ OUTSR(0x08, capctrl);
-+
-+#if 0
-+ OUTGR(0x0a, 0x01);
-+#endif
-+ OUTGR(0xb0, 0x03);
-+
-+ pPriv->videoStatus = CLIENT_VIDEO_ON;
-+ return (Success);
-+}
-+
-+static void
-+NEOStopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
-+{
-+ NEOPortPtr pPriv = (NEOPortPtr)data;
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ VGA_HWP(pScrn);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOStopVideo\n");
-+#endif
-+ REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
-+
-+ if (exit){
-+ if (pPriv->videoStatus & CLIENT_VIDEO_ON){
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOStopVideo: stop capture\n");
-+#endif
-+ OUTGR(0xb0, 0x02);
-+ OUTGR(0x0a, 0x21);
-+ OUTSR(0x08, 0xa0);
-+#if 0
-+ OUTGR(0x0a, 0x01);
-+#endif
-+ }
-+ if (pPriv->linear != NULL){
-+ xf86FreeOffscreenLinear(pPriv->linear);
-+ pPriv->linear = NULL;
-+ }
-+ pPriv->videoStatus = 0;
-+ } else {
-+ if (pPriv->videoStatus & CLIENT_VIDEO_ON){
-+ OUTGR(0xb0, 0x02);
-+ OUTGR(0x0a, 0x21);
-+ OUTSR(0x08, 0xa0);
-+#if 0
-+ OUTGR(0x0a, 0x01);
-+#endif
-+ pPriv->videoStatus |= OFF_TIMER;
-+ pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
-+ }
-+ }
-+}
-+
-+static int
-+NEOSetPortAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 value,
-+ pointer data)
-+{
-+ NEOPortPtr pPriv = (NEOPortPtr)data;
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ VGA_HWP(pScrn);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOSetPortAttribute\n");
-+#endif
-+ if (attribute == xvColorKey){
-+ int r, g, b;
-+
-+ pPriv->colorKey = value;
-+ switch (pScrn->depth){
-+ case 8:
-+ OUTGR(0xc6, pPriv->colorKey & 0xff);
-+ OUTGR(0xc5, 0x00);
-+ OUTGR(0xc7, 0x00);
-+ break;
-+ default:
-+ r = (pPriv->colorKey & pScrn->mask.red) >> pScrn->offset.red;
-+ g = (pPriv->colorKey & pScrn->mask.green) >> pScrn->offset.green;
-+ b = (pPriv->colorKey & pScrn->mask.blue) >> pScrn->offset.blue;
-+ OUTGR(0xc5, r);
-+ OUTGR(0xc6, g);
-+ OUTGR(0xc7, b);
-+ }
-+ } else if (attribute == xvBrightness){
-+ if ((value < -128) || (value > 127)){
-+ return (BadValue);
-+ }
-+ pPriv->brightness = value;
-+ OUTGR(0xc4, value);
-+ } else if (attribute == xvInterlace){
-+ if (value < 0 || value > 2){
-+ return (BadValue);
-+ }
-+ pPriv->interlace = value;
-+ } else {
-+ return (BadMatch);
-+ }
-+ return (Success);
-+}
-+
-+static int
-+NEOGetPortAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 *value,
-+ pointer data)
-+{
-+ NEOPortPtr pPriv = (NEOPortPtr)data;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOGetPortAttribute\n");
-+#endif
-+ if (attribute == xvColorKey){
-+ *value = pPriv->colorKey;
-+ } else if (attribute == xvBrightness){
-+ *value = pPriv->brightness;
-+ } else if (attribute == xvInterlace){
-+ *value = pPriv->interlace;
-+ } else {
-+ return (BadMatch);
-+ }
-+ return (Success);
-+}
-+
-+static void
-+NEOQueryBestSize(ScrnInfoPtr pScrn, Bool motion,
-+ short vid_w, short vid_h, short drw_w, short drw_h,
-+ unsigned int *p_w, unsigned int *p_h,
-+ pointer data)
-+{
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOQueryBestSize\n");
-+#endif
-+ *p_w = min(drw_w, 1024);
-+ *p_h = min(drw_h, 1024);
-+}
-+
-+static int
-+NEOPutImage(ScrnInfoPtr pScrn,
-+ short src_x, short src_y, short drw_x, short drw_y,
-+ short src_w, short src_h, short drw_w, short drw_h,
-+ int id, unsigned char *buf, short width, short height,
-+ Bool sync, RegionPtr clipBoxes, pointer data)
-+{
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ NEOPortPtr pPriv = (NEOPortPtr)nPtr->overlayAdaptor->pPortPrivates[0].ptr;
-+ INT32 x1, y1, x2, y2;
-+ int bpp;
-+ int srcPitch, srcPitch2 = 0, dstPitch, size;
-+ BoxRec dstBox;
-+ CARD32 offset, offset2 = 0, offset3 = 0, tmp;
-+ int left, top, nPixels, nLines;
-+ unsigned char *dstStart;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOPutImage\n");
-+#endif
-+
-+ x1 = src_x;
-+ y1 = src_y;
-+ x2 = src_x + src_w;
-+ y2 = src_y + src_h;
-+
-+ dstBox.x1 = drw_x;
-+ dstBox.y1 = drw_y;
-+ dstBox.x2 = drw_x + drw_w;
-+ dstBox.y2 = drw_y + drw_h;
-+
-+ if (!xf86XVClipVideoHelper(&dstBox, &x1, &x2, &y1, &y2,
-+ clipBoxes, width, height)){
-+ return (Success);
-+ }
-+
-+ dstBox.x1 -= pScrn->frameX0;
-+ dstBox.y1 -= pScrn->frameY0;
-+ dstBox.x2 -= pScrn->frameX0;
-+ dstBox.y2 -= pScrn->frameY0;
-+
-+ bpp = ((pScrn->bitsPerPixel + 1) >> 3);
-+
-+ switch (id){
-+ case FOURCC_YV12:
-+ srcPitch = (width + 3) & ~3;
-+ offset2 = srcPitch * height;
-+ srcPitch2 = ((width >> 1) + 3) & ~3;
-+ offset3 = offset2 + (srcPitch2 * (height >> 1));
-+ dstPitch = ((width << 1) + 15) & ~15;
-+ break;
-+ case FOURCC_I420:
-+ srcPitch = (width + 3) & ~3;
-+ offset3 = srcPitch * height;
-+ srcPitch2 = ((width >> 1) + 3) & ~3;
-+ offset2 = offset3 + (srcPitch2 * (height >> 1));
-+ dstPitch = ((width << 1) + 15) & ~15;
-+ break;
-+ case FOURCC_YUY2:
-+ case FOURCC_RV15:
-+ case FOURCC_RV16:
-+ default:
-+ srcPitch = width << 1;
-+ dstPitch = (srcPitch + 15) & ~15;
-+ break;
-+ }
-+
-+ size = dstPitch * height;
-+ if (size > nPtr->overlay){
-+ if ((pPriv->linear = NEOAllocateMemory(pScrn, pPriv->linear, size))
-+ == NULL){
-+ return (BadAlloc);
-+ }
-+ } else {
-+ pPriv->linear = NULL;
-+ }
-+
-+ top = y1 >> 16;
-+ left = (x1 >> 16) & ~1;
-+ nPixels = ((((x2 + 0xFFFF) >> 16) + 1) & ~1) - left;
-+ left <<= 1;
-+
-+ if (pPriv->linear == NULL){
-+ offset = nPtr->overlay_offset;
-+ } else {
-+ offset = pPriv->linear->offset * bpp;
-+ }
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"offset=%x\n", offset);
-+#endif
-+
-+ dstStart = (unsigned char *)(nPtr->NeoFbBase + offset + left);
-+
-+ switch (id){
-+ case FOURCC_YV12:
-+ case FOURCC_I420:
-+ top &= ~1;
-+ tmp = ((top >> 1) * srcPitch2) + (left >> 2);
-+ offset2 += tmp;
-+ offset3 += tmp;
-+ nLines = ((((y2 + 0xFFFF) >> 16) + 1) & ~1) - top;
-+ NEOCopyYV12Data(buf + (top * srcPitch) + (left >> 1), buf + offset2,
-+ buf + offset3, dstStart, srcPitch, srcPitch2,
-+ dstPitch, nLines, nPixels);
-+ break;
-+ default:
-+ buf += (top * srcPitch) + left;
-+ nLines = ((y2 + 0xFFFF) >> 16) - top;
-+ NEOCopyData(buf, dstStart, srcPitch, dstPitch, nLines, nPixels << 1);
-+ }
-+
-+ if (!RegionsEqual(&pPriv->clip, clipBoxes)){
-+ REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
-+ xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
-+ }
-+ NEODisplayVideo(pScrn, id, offset, width, height, dstPitch, x1, y1,
-+ x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
-+
-+ pPriv->videoStatus = CLIENT_VIDEO_ON;
-+ return (Success);
-+
-+}
-+
-+static int
-+NEOQueryImageAttributes(ScrnInfoPtr pScrn, int id,
-+ unsigned short *width, unsigned short *height,
-+ int *pitches, int *offsets)
-+{
-+ int size, tmp;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOQueryImageAttributes\n");
-+#endif
-+ if (*width > 1024){
-+ *width = 1024;
-+ }
-+ if (*height > 1024){
-+ *height = 1024;
-+ }
-+
-+ *width = (*width + 1) & ~1;
-+ if (offsets != NULL){
-+ offsets[0] = 0;
-+ }
-+
-+ switch (id){
-+ case FOURCC_YV12:
-+ case FOURCC_I420:
-+ *height = (*height + 1) & ~1;
-+ size = (*width + 3) & ~3;
-+ if (pitches != NULL){
-+ pitches[0] = size;
-+ }
-+ size *= *height;
-+ if (offsets != NULL){
-+ offsets[1] = size;
-+ }
-+ tmp = ((*width >> 1) + 3) & ~3;
-+ if (pitches != NULL){
-+ pitches[1] = pitches[2] = tmp;
-+ }
-+ tmp *= (*height >> 1);
-+ size += tmp;
-+ if (offsets != NULL){
-+ offsets[2] = size;
-+ }
-+ size += tmp;
-+ break;
-+ case FOURCC_YUY2:
-+ case FOURCC_RV15:
-+ case FOURCC_RV16:
-+ default:
-+ size = *width * 2;
-+ if (pitches != NULL){
-+ pitches[0] = size;
-+ }
-+ size *= *height;
-+ break;
-+ }
-+ return (size);
-+}
-+
-+static Bool
-+RegionsEqual(RegionPtr A, RegionPtr B)
-+{
-+ int *dataA, *dataB;
-+ int num;
-+
-+ num = REGION_NUM_RECTS(A);
-+ if (num != REGION_NUM_RECTS(B)){
-+ return (FALSE);
-+ }
-+
-+ if ((A->extents.x1 != B->extents.x1)
-+ || (A->extents.y1 != B->extents.y1)
-+ || (A->extents.x2 != B->extents.x2)
-+ || (A->extents.y2 != B->extents.y2)){
-+ return (FALSE);
-+ }
-+
-+ dataA = (int*) REGION_RECTS(A);
-+ dataB = (int*) REGION_RECTS(B);
-+
-+ while (num--){
-+ if ((dataA[0] != dataB[0]) || (dataA[1] != dataB[1])){
-+ return (FALSE);
-+ }
-+ dataA += 2;
-+ dataB += 2;
-+ }
-+ return (TRUE);
-+}
-+
-+static void
-+NEODisplayVideo(ScrnInfoPtr pScrn, int id, int offset,
-+ short width, short height, int pitch,
-+ int x1, int y1, int x2, int y2, BoxPtr dstBox,
-+ short src_w, short src_h, short drw_w, short drw_h)
-+{
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+ int hstretch, vstretch, fmt;
-+ VGA_HWP(pScrn);
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEODisplayVideo\n");
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEODisplayVideo src_w=%d, src_h=%d, pitch=%d, drw_w=%d, drw_h=%d\n", src_w, src_h, pitch, drw_w, drw_h);
-+#endif
-+#define WIDTH_THRESHOLD 160
-+ if (dstBox->x2 >= pScrn->virtualX) {
-+ /*
-+ * This is a hack to work around a problem when video is moved
-+ * accross the right border.
-+ */
-+ int diff_s = (width - ((x2 - x1) >> 16)) & ~1;
-+ int diff_d = (drw_w - dstBox->x2 + dstBox->x1) & ~1;
-+
-+ offset -= 2 * ((diff_s > diff_d) ? diff_d : diff_s);
-+ dstBox->x1 -= diff_d;
-+ } else if (dstBox->x2 - dstBox->x1 < WIDTH_THRESHOLD) {
-+ /*
-+ * When the video window is less than about 160 pixel wide
-+ * it will be distoreted. We attempt to fix it by actually
-+ * making it wider and relying on the color key to prevent
-+ * it from appearanig outside of the video.
-+ */
-+ int pre, post;
-+ int scale = 1;
-+
-+ if (dstBox->x1 < WIDTH_THRESHOLD) {
-+ pre = dstBox->x1;
-+ post = 160 - pre;
-+ } else {
-+ pre = 160;
-+ post = 0;
-+ }
-+ offset -= 2 * scale * pre;
-+ dstBox->x1 -= pre;
-+ dstBox->x2 += post;
-+ }
-+ if (nPtr->videoHZoom != 1.0) {
-+ if ((dstBox->x2 += 5) > pScrn->virtualX)
-+ dstBox->x2 = pScrn->virtualX;
-+ if (dstBox->x1 > 0) dstBox->x1 += 2;
-+ }
-+
-+ fmt = 0x00;
-+ switch (id){
-+ case FOURCC_YV12:
-+ case FOURCC_I420:
-+ case FOURCC_YUY2:
-+ fmt = 0x00;
-+ break;
-+ case FOURCC_RV15:
-+ case FOURCC_RV16:
-+ fmt = 0x20;
-+ break;
-+ }
-+
-+ offset += (x1 >> 15) & ~0x03;
-+
-+ switch (nPtr->NeoChipset) {
-+ default:
-+ case NM2160:
-+ offset/=2;
-+ pitch/=2;
-+ OUTGR(0xbc, 0x4f);
-+ break;
-+ case NM2200:
-+ case NM2230:
-+ case NM2360:
-+ case NM2380:
-+ OUTGR(0xbc, 0x2e);
-+ break;
-+ }
-+
-+ /* factor 4 for granularity */
-+ hstretch = (double)0x1000 * 4 / (int)(nPtr->videoHZoom * 4);
-+ if (drw_w > src_w)
-+ hstretch = (((int)src_w) * hstretch) / (int) drw_w;
-+
-+ vstretch = (double)0x1000 / nPtr->videoVZoom;
-+ if (drw_h > src_h)
-+ vstretch = (((int)src_h) * vstretch )/ (int) drw_h;
-+
-+ OUTGR(0xb1, (((dstBox->x2 - 1) >> 4) & 0xf0) | ((dstBox->x1 >> 8) & 0x0f));
-+ OUTGR(0xb2, dstBox->x1);
-+ OUTGR(0xb3, dstBox->x2 - 1);
-+ OUTGR(0xb4, (((dstBox->y2 - 1) >> 4) & 0xf0) | ((dstBox->y1 >> 8) & 0x0f));
-+ OUTGR(0xb5, dstBox->y1);
-+ OUTGR(0xb6, dstBox->y2 - 1);
-+ OUTGR(0xb7, offset >> 16);
-+ OUTGR(0xb8, offset >> 8);
-+ OUTGR(0xb9, offset );
-+ OUTGR(0xba, pitch >> 8);
-+ OUTGR(0xbb, pitch);
-+
-+ OUTGR(0xbd, 0x02);
-+ OUTGR(0xbe, 0x00);
-+ OUTGR(0xbf, 0x02);
-+
-+ OUTGR(0xc0, hstretch >> 8);
-+ OUTGR(0xc1, hstretch);
-+ OUTGR(0xc2, vstretch >> 8);
-+ OUTGR(0xc3, vstretch);
-+
-+ OUTGR(0xb0, fmt | 0x03);
-+
-+ OUTGR(0x0a, 0x21);
-+ OUTSR(0x08, 0xa0);
-+ OUTGR(0x0a, 0x01);
-+}
-+
-+static void
-+NEOInitOffscreenImages(ScreenPtr pScreen)
-+{
-+ XF86OffscreenImagePtr offscreenImages;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(xf86Screens[pScreen->myNum]->scrnIndex,X_INFO,"NEOInitOffscreenImages\n");
-+#endif
-+ if ((offscreenImages = xalloc(sizeof(XF86OffscreenImageRec))) == NULL){
-+ return;
-+ }
-+
-+ offscreenImages->image = NEOVideoImages;
-+ offscreenImages->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
-+ offscreenImages->alloc_surface = NEOAllocSurface;
-+ offscreenImages->free_surface = NEOFreeSurface;
-+ offscreenImages->display = NEODisplaySurface;
-+ offscreenImages->stop = NEOStopSurface;
-+ offscreenImages->getAttribute = NEOGetSurfaceAttribute;
-+ offscreenImages->setAttribute = NEOSetSurfaceAttribute;
-+ offscreenImages->max_width = 1024;
-+ offscreenImages->max_height = 1024;
-+ offscreenImages->num_attributes = nElems(NEOVideoAttributes);
-+ offscreenImages->attributes = NEOVideoAttributes;
-+
-+ xf86XVRegisterOffscreenImages(pScreen, offscreenImages, 1);
-+}
-+
-+static FBLinearPtr
-+NEOAllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size)
-+{
-+ ScreenPtr pScreen;
-+ FBLinearPtr new_linear;
-+ int bytespp = pScrn->bitsPerPixel >> 3;
-+
-+ /* convert size in bytes into number of pixels */
-+ size = (size + bytespp - 1) / bytespp;
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,
-+ "NEOAllocateMemory: linear=%x, size=%d\n", linear, size);
-+#endif
-+ if (linear){
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,
-+ "NEOAllocateMemory: linear->size=%d\n", linear->size);
-+#endif
-+ if (linear->size >= size){
-+ return (linear);
-+ }
-+
-+ if (xf86ResizeOffscreenLinear(linear, size)){
-+ return (linear);
-+ }
-+
-+ xf86FreeOffscreenLinear(linear);
-+ }
-+
-+
-+ pScreen = screenInfo.screens[pScrn->scrnIndex];
-+ if ((new_linear = xf86AllocateOffscreenLinear(pScreen, size, 16, NULL,
-+ NULL, NULL)) == NULL){
-+ int max_size;
-+
-+ xf86QueryLargestOffscreenLinear(pScreen, &max_size, 16,
-+ PRIORITY_EXTREME);
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,
-+ "NEOAllocateMemory: max_size=%d\n", max_size);
-+#endif
-+ if (max_size < size){
-+ return (NULL);
-+ }
-+
-+ xf86PurgeUnlockedOffscreenAreas(pScreen);
-+ new_linear = xf86AllocateOffscreenLinear(pScreen,
-+ size, 16, NULL, NULL, NULL);
-+ }
-+
-+ return (new_linear);
-+}
-+
-+static void
-+NEOCopyData(unsigned char *src, unsigned char *dst,
-+ int srcPitch, int dstPitch,
-+ int height, int width)
-+{
-+ while (height-- > 0){
-+ memcpy(dst, src, width);
-+ src += srcPitch;
-+ dst += dstPitch;
-+ }
-+}
-+
-+static void
-+NEOCopyYV12Data(unsigned char *src1, unsigned char *src2,
-+ unsigned char *src3, unsigned char *dst,
-+ int srcPitch1, int srcPitch2, int dstPitch,
-+ int height, int width)
-+{
-+ CARD32 *pDst = (CARD32 *) dst;
-+ int i;
-+
-+ width >>= 1;
-+ height >>= 1;
-+ dstPitch >>= 2;
-+ while (--height >= 0){
-+ for (i =0; i < width; i++){
-+ pDst[i] = src1[i << 1] | (src1[(i << 1) + 1] << 16) |
-+ (src3[i] << 8) | (src2[i] << 24);
-+ }
-+ pDst += dstPitch;
-+ src1 += srcPitch1;
-+
-+ for (i =0; i < width; i++){
-+ pDst[i] = src1[i << 1] | (src1[(i << 1) + 1] << 16) |
-+ (src3[i] << 8) | (src2[i] << 24);
-+ }
-+ pDst += dstPitch;
-+ src1 += srcPitch1;
-+ src2 += srcPitch2;
-+ src3 += srcPitch2;
-+ }
-+}
-+
-+static int
-+NEOAllocSurface(ScrnInfoPtr pScrn, int id,
-+ unsigned short width, unsigned short height,
-+ XF86SurfacePtr surface)
-+{
-+ int pitch, bpp, size;
-+ NEOOffscreenPtr pPriv;
-+ FBLinearPtr linear;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOAllocSurface\n");
-+#endif
-+ if (width > 1024 || height > 1024){
-+ return (BadAlloc);
-+ }
-+
-+ width = (width + 1) & ~1;
-+ bpp = ((pScrn->bitsPerPixel + 1) >> 3);
-+ pitch = ((width << 1) + 15) & ~15;
-+ size = pitch * height;
-+
-+ if ((linear = NEOAllocateMemory(pScrn, NULL, size)) == NULL){
-+ return (BadAlloc);
-+ }
-+
-+ surface->width = width;
-+ surface->height = height;
-+ if ((surface->pitches = xalloc(sizeof(int))) == NULL){
-+ xf86FreeOffscreenLinear(linear);
-+ return (BadAlloc);
-+ }
-+ if ((surface->offsets = xalloc(sizeof(int))) == NULL){
-+ xfree(surface->pitches);
-+ xf86FreeOffscreenLinear(linear);
-+ return (BadAlloc);
-+ }
-+
-+ if ((pPriv = xalloc(sizeof(NEOOffscreenRec))) == NULL){
-+ xfree(surface->pitches);
-+ xfree(surface->offsets);
-+ xf86FreeOffscreenLinear(linear);
-+ return (BadAlloc);
-+ }
-+
-+ pPriv->linear = linear;
-+ pPriv->isOn = FALSE;
-+
-+ surface->pScrn = pScrn;
-+ surface->id = id;
-+ surface->pitches[0] = pitch;
-+ surface->offsets[0] = linear->offset << 1;
-+ surface->devPrivate.ptr = (pointer)pPriv;
-+ return (Success);
-+}
-+
-+static int
-+NEOFreeSurface(XF86SurfacePtr surface)
-+{
-+ NEOOffscreenPtr pPriv = (NEOOffscreenPtr)surface->devPrivate.ptr;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(0,X_INFO,"NEOFreeSurface\n");
-+#endif
-+ if (pPriv->isOn)
-+ NEOStopSurface(surface);
-+
-+ xf86FreeOffscreenLinear(pPriv->linear);
-+ xfree(surface->pitches);
-+ xfree(surface->offsets);
-+ xfree(surface->devPrivate.ptr);
-+ return (Success);
-+}
-+
-+static int
-+NEODisplaySurface(XF86SurfacePtr surface,
-+ short src_x, short src_y, short drw_x, short drw_y,
-+ short src_w, short src_h, short drw_w, short drw_h,
-+ RegionPtr clipBoxes)
-+{
-+ NEOOffscreenPtr pPriv = (NEOOffscreenPtr)surface->devPrivate.ptr;
-+ NEOPtr nPtr = NEOPTR(surface->pScrn);
-+ NEOPortPtr portPriv = nPtr->overlayAdaptor->pPortPrivates[0].ptr;
-+ INT32 x1, y1, x2, y2;
-+ BoxRec dstBox;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(surface->pScrn->scrnIndex,X_INFO,"NEODisplaySurface\n");
-+#endif
-+ x1 = src_x;
-+ x2 = src_x + src_w;
-+ y1 = src_y;
-+ y2 = src_y + src_h;
-+
-+ dstBox.x1 = drw_x;
-+ dstBox.x2 = drw_x + drw_w;
-+ dstBox.y1 = drw_y;
-+ dstBox.y2 = drw_y + drw_h;
-+ if (!xf86XVClipVideoHelper( &dstBox, &x1, &x2, &y1, &y2,
-+ clipBoxes, surface->width, surface->height)){
-+ return (Success);
-+ }
-+
-+ dstBox.x1 -= surface->pScrn->frameX0;
-+ dstBox.y1 -= surface->pScrn->frameY0;
-+ dstBox.x2 -= surface->pScrn->frameX0;
-+ dstBox.y2 -= surface->pScrn->frameY0;
-+
-+ xf86XVFillKeyHelper(surface->pScrn->pScreen, portPriv->colorKey,
-+ clipBoxes);
-+ NEOResetVideo(surface->pScrn);
-+ NEODisplayVideo(surface->pScrn, surface->id, surface->offsets[0],
-+ surface->width, surface->height, surface->pitches[0],
-+ x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
-+
-+ pPriv->isOn = TRUE;
-+ if (portPriv->videoStatus & CLIENT_VIDEO_ON){
-+ REGION_EMPTY(pScrn->pScreen, &portPriv->clip);
-+ UpdateCurrentTime();
-+ portPriv->videoStatus = FREE_TIMER;
-+ portPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
-+ }
-+ return (Success);
-+}
-+
-+static int
-+NEOStopSurface(XF86SurfacePtr surface)
-+{
-+ NEOOffscreenPtr pPriv = (NEOOffscreenPtr)surface->devPrivate.ptr;
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(surface->pScrn->scrnIndex,X_INFO,"NEOStopSurface\n");
-+#endif
-+ if (pPriv->isOn){
-+ NEOPtr nPtr = NEOPTR(surface->pScrn);
-+ VGA_HWP(surface->pScrn);
-+ OUTGR(0xb0, 0x02);
-+ pPriv->isOn = FALSE;
-+ }
-+ return (Success);
-+}
-+
-+static int
-+NEOGetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attr, INT32 *value)
-+{
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOGetSurfaceAttribute\n");
-+#endif
-+ return (NEOGetPortAttribute(pScrn,
-+ attr, value, (pointer)nPtr->overlayAdaptor->pPortPrivates[0].ptr));
-+}
-+
-+static int
-+NEOSetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attr, INT32 value)
-+{
-+ NEOPtr nPtr = NEOPTR(pScrn);
-+
-+#ifdef DEBUG
-+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"NEOSetSurfaceAttribute\n");
-+#endif
-+ return (NEOSetPortAttribute(pScrn,
-+ attr, value, (pointer)nPtr->overlayAdaptor->pPortPrivates[0].ptr));
-+}
-+
-+#else /* XvExtension */
-+
-+void NEOInitVideo(ScreenPtr pScreen) {}
-+void NEOResetVideo(ScreenPtr pScreen) {}
-+
-+#endif
---- XFree86-4.2.0/xc.orig/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.h Thu Jan 1 01:00:00 1970
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.h Thu Apr 4 16:05:44 2002
-@@ -0,0 +1,83 @@
-+/**********************************************************************
-+Copyright 2002 by Shigehiro Nomura.
-+
-+ All Rights Reserved
-+
-+Permission to use, copy, modify, distribute, and sell this software and
-+its documentation for any purpose is hereby granted without fee,
-+provided that the above copyright notice appear in all copies and that
-+both that copyright notice and this permission notice appear in
-+supporting documentation, and that the name of Shigehiro Nomura not be
-+used in advertising or publicity pertaining to distribution of the
-+software without specific, written prior permission. Shigehiro Nomura
-+and its suppliers make no representations about the suitability of this
-+software for any purpose. It is provided "as is" without express or
-+implied warranty.
-+
-+SHIGEHIRO NOMURA DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-+INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-+EVENT SHALL SHIGEHIRO NOMURA AND/OR ITS SUPPLIERS BE LIABLE FOR ANY
-+SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER
-+RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
-+CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
-+CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+**********************************************************************/
-+
-+#ifndef _NEO_VIDEO_H
-+#define _NEO_VIDEO_H
-+
-+#define ACC_MMIO
-+
-+#include "vgaHW.h"
-+#include "fourcc.h"
-+#include "Xv.h"
-+
-+#define NEO_VIDEO_VIDEO 0
-+#define NEO_VIDEO_IMAGE 1
-+
-+#define FOURCC_RV15 0x35315652
-+#define FOURCC_RV16 0x36315652
-+
-+#define OFF_DELAY 200 /* milliseconds */
-+#define FREE_DELAY 60000 /* milliseconds */
-+
-+#define OFF_TIMER 0x01
-+#define FREE_TIMER 0x02
-+#define CLIENT_VIDEO_ON 0x04
-+#define TIMER_MASK (OFF_TIMER | FREE_TIMER)
-+
-+typedef struct
-+{
-+ FBLinearPtr linear;
-+ RegionRec clip;
-+ CARD32 colorKey;
-+ CARD32 interlace;
-+ CARD32 brightness;
-+ CARD32 videoStatus;
-+ Time offTime;
-+ Time freeTime;
-+} NEOPortRec, *NEOPortPtr;
-+
-+typedef struct
-+{
-+ FBLinearPtr linear;
-+ Bool isOn;
-+} NEOOffscreenRec, *NEOOffscreenPtr;
-+
-+/* I/O Functions */
-+# define OUTGR(idx,dat) \
-+ if (nPtr->NeoMMIOBase2) \
-+ (*(unsigned short *)(nPtr->NeoMMIOBase2+VGA_GRAPH_INDEX)\
-+ =(idx)|((dat)<<8));\
-+ else \
-+ VGAwGR((idx),(dat));
-+
-+# define OUTSR(idx,dat) \
-+if (nPtr->NeoMMIOBase2) \
-+ (*(unsigned short *)(nPtr->NeoMMIOBase2+VGA_SEQ_INDEX)=(idx)|((dat)<<8));\
-+else \
-+ VGAwSR((idx),(dat));
-+
-+# define VGA_HWP(x) vgaHWPtr hwp = VGAHWPTR(x)
-+
-+#endif /* _NEO_VIDEO_H */
+++ /dev/null
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv.man Tue Dec 18 05:52:33 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man Sun Apr 14 15:59:41 2002
-@@ -39,12 +39,13 @@
- NV10
- .TP 22
- .B GeForce2, QUADRO2
--NV11 & NV15 (except GeForce2 Go, which is
--.B NOT
--supported)
-+NV11 & NV15
- .TP 22
- .B GeForce3
- NV20
-+.TP 22
-+.B GeForce4, QUADRO4
-+NV17 & NV25
- .SH CONFIGURATION DETAILS
- Please refer to XF86Config(__filemansuffix__) for general configuration
- details. This section only covers configuration details specific to this
-@@ -66,6 +67,19 @@
- .BI "Option \*qUseFBDev\*q \*q" boolean \*q
- Enable or disable use of on OS-specific fb interface (and is not supported
- on all OSs). See fbdevhw(__drivermansuffix__) for further information.
-+Default: off.
-+.TP
-+.BI "Option \*qCrtcNumber\*q \*q" integer \*q
-+NV17 and NV25 can have two video outputs. The driver attempts to autodetect
-+which one the monitor is connected to. In the case that autodetection picks
-+the wrong one, this option may be used to force usage of a particular output.
-+The options are "0" or "1".
-+Default: autodetected.
-+.TP
-+.BI "Option \*qFlatPanel\*q \*q" boolean \*q
-+This driver has experimental flat panel support for some chips. The driver
-+cannot autodetect the presence of a flat panel so this option must be set
-+when used with a flat panel.
- Default: off.
- .TP
- .BI "Option \*qRotate\*q \*qCW\*q"
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_cursor.c Tue Dec 18 07:17:55 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c Sun Apr 14 15:59:41 2002
-@@ -109,7 +109,7 @@
- NVPtr pNv = NVPTR(pScrn);
-
- pNv->riva.ShowHideCursor(&pNv->riva, 0);
-- *(pNv->riva.CURSORPOS) = (x & 0xFFFF) | (y << 16);
-+ pNv->riva.PRAMDAC[0x0000300/4] = (x & 0xFFFF) | (y << 16);
- pNv->riva.ShowHideCursor(&pNv->riva, 1);
- }
-
-@@ -123,8 +123,10 @@
- back = ConvertToRGB555(bg);
-
- #if X_BYTE_ORDER == X_BIG_ENDIAN
-- fore = (fore << 8) | (fore >> 8);
-- back = (back << 8) | (back >> 8);
-+ if((pNv->Chipset & 0x0ff0) == 0x0110) {
-+ fore = (fore << 8) | (fore >> 8);
-+ back = (back << 8) | (back >> 8);
-+ }
- #endif
-
- if (pNv->curFg != fore || pNv->curBg != back) {
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_dac.c Wed Dec 12 04:42:01 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c Sun Apr 14 15:59:41 2002
-@@ -71,6 +71,15 @@
- if(mode->Flags & V_INTERLACE)
- vertTotal |= 1;
-
-+ if(pNv->FlatPanel == 1) {
-+ vertStart = vertTotal - 3;
-+ vertEnd = vertTotal - 2;
-+ vertBlankStart = vertStart;
-+ horizStart = horizTotal - 3;
-+ horizEnd = horizTotal - 2;
-+ horizBlankEnd = horizTotal + 4;
-+ }
-+
- pVga->CRTC[0x0] = Set8Bits(horizTotal);
- pVga->CRTC[0x1] = Set8Bits(horizDisplay);
- pVga->CRTC[0x2] = Set8Bits(horizBlankStart);
-@@ -147,6 +156,8 @@
- if(pNv->riva.Architecture >= NV_ARCH_10)
- pNv->riva.CURSOR = (U032 *)(pNv->FbStart + pNv->riva.CursorStart);
-
-+ pNv->riva.LockUnlock(&pNv->riva, 0);
-+
- pNv->riva.CalcStateExt(&pNv->riva,
- nvReg,
- i,
-@@ -156,21 +167,45 @@
- mode->Clock,
- mode->Flags);
-
-+ nvReg->scale = pNv->riva.PRAMDAC[0x00000848/4] & 0xfff000ff;
-+ if(pNv->FlatPanel == 1) {
-+ nvReg->pixel |= (1 << 7);
-+ nvReg->scale |= (1 << 8) ;
-+ }
-+ if(pNv->SecondCRTC) {
-+ nvReg->head = pNv->riva.PCRTC0[0x00000860/4] & ~0x00001000;
-+ nvReg->head2 = pNv->riva.PCRTC0[0x00002860/4] | 0x00001000;
-+ nvReg->crtcOwner = 3;
-+ nvReg->pllsel |= 0x20000800;
-+ nvReg->vpll2 = nvReg->vpll;
-+ } else
-+ if(pNv->riva.twoHeads) {
-+ nvReg->head = pNv->riva.PCRTC0[0x00000860/4] | 0x00001000;
-+ nvReg->head2 = pNv->riva.PCRTC0[0x00002860/4] & ~0x00001000;
-+ nvReg->crtcOwner = 0;
-+ nvReg->vpll2 = pNv->riva.PRAMDAC0[0x00000520/4];
-+ }
-+
- return (TRUE);
- }
-
- void
- NVDACRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, NVRegPtr nvReg,
-- Bool restoreFonts)
-+ Bool primary)
- {
- NVPtr pNv = NVPTR(pScrn);
-+ int restore = VGA_SR_MODE;
-+
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACRestore\n"));
-+
-+ if(primary) restore |= VGA_SR_CMAP | VGA_SR_FONTS;
-+ else if(pNv->Chipset == NV_CHIP_RIVA_128)
-+ restore |= VGA_SR_CMAP;
- pNv->riva.LoadStateExt(&pNv->riva, nvReg);
- #if defined(__powerpc__)
-- restoreFonts = FALSE;
-+ restore &= ~VGA_SR_FONTS;
- #endif
-- vgaHWRestore(pScrn, vgaReg, VGA_SR_CMAP | VGA_SR_MODE |
-- (restoreFonts? VGA_SR_FONTS : 0));
-+ vgaHWRestore(pScrn, vgaReg, restore);
- }
-
- /*
-@@ -184,8 +219,17 @@
- {
- NVPtr pNv = NVPTR(pScrn);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACSave\n"));
-- vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | (saveFonts? VGA_SR_FONTS : 0));
-+
-+#if defined(__powerpc__)
-+ saveFonts = FALSE;
-+#endif
-+
-+ vgaHWSave(pScrn, vgaReg, VGA_SR_CMAP | VGA_SR_MODE |
-+ (saveFonts? VGA_SR_FONTS : 0));
- pNv->riva.UnloadStateExt(&pNv->riva, nvReg);
-+
-+ if((pNv->Chipset & 0x0ff0) == 0x0110)
-+ nvReg->crtcOwner = ((pNv->Chipset & 0x0fff) == 0x0112) ? 3 : 0;
- }
-
- #define DEPTH_SHIFT(val, w) ((val << (8 - w)) | (val >> ((w << 1) - 8)))
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_dga.c Tue Jan 23 06:32:36 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dga.c Sun Apr 14 15:59:41 2002
-@@ -234,8 +234,8 @@
-
- NVAdjustFrame(pScrn->pScreen->myNum, x, y, flags);
-
-- while(pNv->riva.PCIO[0x3da] & 0x08);
-- while(!(pNv->riva.PCIO[0x3da] & 0x08));
-+ while(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08);
-+ while(!(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08));
-
- pNv->DGAViewportStatus = 0;
- }
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_driver.c Sat Jan 5 06:22:33 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c Sun Apr 14 15:59:41 2002
-@@ -87,81 +87,91 @@
-
- /* Supported chipsets */
- static SymTabRec NVChipsets[] = {
-- { NV_CHIP_RIVA128, "RIVA128" },
-- { NV_CHIP_TNT, "RIVA TNT" },
-- { NV_CHIP_TNT2, "RIVA TNT2" },
-- { NV_CHIP_UTNT2, "RIVA TNT2 Ultra" },
-- { NV_CHIP_VTNT2, "Vanta" },
-- { NV_CHIP_UVTNT2, "RIVA TNT2 M64" },
-- { NV_CHIP_ITNT2, "Aladdin TNT2" },
-- { NV_CHIP_GEFORCE256, "GeForce 256" },
-- { NV_CHIP_GEFORCEDDR, "GeForce DDR" },
-- { NV_CHIP_QUADRO, "Quadro" },
-- { NV_CHIP_GEFORCE2GTS, "GeForce2 GTS/Pro"},
-- { NV_CHIP_GEFORCE2GTS_1,"GeForce2 Ti"},
-- { NV_CHIP_GEFORCE2ULTRA,"GeForce2 Ultra"},
-- { NV_CHIP_QUADRO2PRO, "Quadro2 Pro"},
-- { NV_CHIP_GEFORCE2MX, "GeForce2 MX/MX 400"},
-- { NV_CHIP_GEFORCE2MXDDR, "GeForce2 MX 100/200"},
-- { NV_CHIP_0x0170, "0x0170" },
-- { NV_CHIP_0x0171, "0x0171" },
-- { NV_CHIP_0x0172, "0x0172" },
-- { NV_CHIP_0x0173, "0x0173" },
-- { NV_CHIP_0x0174, "0x0174" },
-- { NV_CHIP_0x0175, "0x0175" },
-- { NV_CHIP_0x0178, "0x0178" },
-- { NV_CHIP_0x017A, "0x017A" },
-- { NV_CHIP_0x017B, "0x017B" },
-- { NV_CHIP_0x017C, "0x017C" },
-- { NV_CHIP_IGEFORCE2, "GeForce2 Integrated"},
-- { NV_CHIP_QUADRO2MXR, "Quadro2 MXR"},
-- { NV_CHIP_GEFORCE2GO, "GeForce2 Go"},
-- { NV_CHIP_GEFORCE3, "GeForce3"},
-- { NV_CHIP_GEFORCE3_1, "GeForce3 Ti 200"},
-- { NV_CHIP_GEFORCE3_2, "GeForce3 Ti 500"},
-- { NV_CHIP_QUADRO_DDC, "Quadro DDC"},
-- { NV_CHIP_0x0250, "0x0250"},
-- { NV_CHIP_0x0258, "0x0258"},
-+ {NV_CHIP_RIVA_128, "RIVA 128"},
-+ {NV_CHIP_TNT, "RIVA TNT"},
-+ {NV_CHIP_TNT2, "RIVA TNT2/TNT2 Pro"},
-+ {NV_CHIP_UTNT2, "RIVA TNT2 Ultra"},
-+ {NV_CHIP_VTNT2, "Vanta"},
-+ {NV_CHIP_UVTNT2, "Riva TNT2 M64"},
-+ {NV_CHIP_ITNT2, "Aladdin TNT2"},
-+ {NV_CHIP_GEFORCE_256, "GeForce 256"},
-+ {NV_CHIP_GEFORCE_DDR, "GeForce DDR"},
-+ {NV_CHIP_QUADRO, "Quadro"},
-+ {NV_CHIP_GEFORCE2_MX, "GeForce2 MX/MX 400"},
-+ {NV_CHIP_GEFORCE2_MX_100, "GeForce2 MX 100/200"},
-+ {NV_CHIP_GEFORCE2_GO, "GeForce2 Go"},
-+ {NV_CHIP_QUADRO2_MXR, "Quadro2 MXR"},
-+ {NV_CHIP_GEFORCE2_GTS, "GeForce2 GTS/Pro"},
-+ {NV_CHIP_GEFORCE2_TI, "GeForce2 Ti"},
-+ {NV_CHIP_GEFORCE2_ULTRA, "GeForce2 Ultra"},
-+ {NV_CHIP_QUADRO2_PRO, "Quadro2 Pro"},
-+ {NV_CHIP_GEFORCE4_MX_460, "GeForce4 MX 460"},
-+ {NV_CHIP_GEFORCE4_MX_440, "GeForce4 MX 440"},
-+ {NV_CHIP_GEFORCE4_MX_420, "GeForce4 MX 420"},
-+ {NV_CHIP_GEFORCE4_440_GO, "GeForce4 440 Go"},
-+ {NV_CHIP_GEFORCE4_420_GO, "GeForce4 420 Go"},
-+ {NV_CHIP_GEFORCE4_420_GO_M32,"GeForce4 420 Go M32"},
-+ {NV_CHIP_QUADRO4_500XGL, "Quadro4 500XGL"},
-+ {NV_CHIP_GEFORCE4_440_GO_M64,"GeForce4 440 Go M64"},
-+ {NV_CHIP_QUADRO4_200, "Quadro4 200/400NVS"},
-+ {NV_CHIP_QUADRO4_550XGL, "Quadro4 550XGL"},
-+ {NV_CHIP_QUADRO4_500_GOGL, "Quadro4 GoGL"},
-+ {NV_CHIP_IGEFORCE2, "GeForce2 Integrated"},
-+ {NV_CHIP_GEFORCE3, "GeForce3"},
-+ {NV_CHIP_GEFORCE3_TI_200, "GeForce3 Ti 200"},
-+ {NV_CHIP_GEFORCE3_TI_500, "GeForce3 Ti 500"},
-+ {NV_CHIP_QUADRO_DCC, "Quadro DCC"},
-+ {NV_CHIP_GEFORCE4_TI_4600, "GeForce4 Ti 4600"},
-+ {NV_CHIP_GEFORCE4_TI_4400, "GeForce4 Ti 4400"},
-+ {NV_CHIP_GEFORCE4_TI_4200, "GeForce4 Ti 4200"},
-+ {NV_CHIP_QUADRO4_900XGL, "Quadro4 900 XGL"},
-+ {NV_CHIP_QUADRO4_750XGL, "Quadro4 750 XGL"},
-+ {NV_CHIP_QUADRO4_700XGL, "Quadro4 700 XGL"},
- {-1, NULL }
- };
-
- static PciChipsets NVPciChipsets[] = {
-- { NV_CHIP_RIVA128, NV_CHIP_RIVA128, RES_SHARED_VGA },
-- { NV_CHIP_TNT, NV_CHIP_TNT, RES_SHARED_VGA },
-- { NV_CHIP_TNT2, NV_CHIP_TNT2, RES_SHARED_VGA },
-- { NV_CHIP_UTNT2, NV_CHIP_UTNT2, RES_SHARED_VGA },
-- { NV_CHIP_VTNT2, NV_CHIP_VTNT2, RES_SHARED_VGA },
-- { NV_CHIP_UVTNT2, NV_CHIP_UVTNT2, RES_SHARED_VGA },
-- { NV_CHIP_ITNT2, NV_CHIP_ITNT2, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE256, NV_CHIP_GEFORCE256, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCEDDR, NV_CHIP_GEFORCEDDR, RES_SHARED_VGA },
-- { NV_CHIP_QUADRO, NV_CHIP_QUADRO, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE2GTS, NV_CHIP_GEFORCE2GTS, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE2GTS_1, NV_CHIP_GEFORCE2GTS_1, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE2ULTRA, NV_CHIP_GEFORCE2ULTRA, RES_SHARED_VGA },
-- { NV_CHIP_QUADRO2PRO, NV_CHIP_QUADRO2PRO, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE2MX, NV_CHIP_GEFORCE2MX, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE2MXDDR, NV_CHIP_GEFORCE2MXDDR, RES_SHARED_VGA },
-- { NV_CHIP_0x0170, NV_CHIP_0x0170, RES_SHARED_VGA },
-- { NV_CHIP_0x0171, NV_CHIP_0x0171, RES_SHARED_VGA },
-- { NV_CHIP_0x0172, NV_CHIP_0x0172, RES_SHARED_VGA },
-- { NV_CHIP_0x0173, NV_CHIP_0x0173, RES_SHARED_VGA },
-- { NV_CHIP_0x0174, NV_CHIP_0x0174, RES_SHARED_VGA },
-- { NV_CHIP_0x0175, NV_CHIP_0x0175, RES_SHARED_VGA },
-- { NV_CHIP_0x0178, NV_CHIP_0x0178, RES_SHARED_VGA },
-- { NV_CHIP_0x017A, NV_CHIP_0x017A, RES_SHARED_VGA },
-- { NV_CHIP_0x017B, NV_CHIP_0x017B, RES_SHARED_VGA },
-- { NV_CHIP_0x017C, NV_CHIP_0x017C, RES_SHARED_VGA },
-- { NV_CHIP_IGEFORCE2, NV_CHIP_IGEFORCE2, RES_SHARED_VGA },
-- { NV_CHIP_QUADRO2MXR, NV_CHIP_QUADRO2MXR, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE2GO, NV_CHIP_GEFORCE2GO, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE3, NV_CHIP_GEFORCE3, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE3_1, NV_CHIP_GEFORCE3_1, RES_SHARED_VGA },
-- { NV_CHIP_GEFORCE3_2, NV_CHIP_GEFORCE3_2, RES_SHARED_VGA },
-- { NV_CHIP_QUADRO_DDC, NV_CHIP_QUADRO_DDC, RES_SHARED_VGA },
-- { NV_CHIP_0x0250, NV_CHIP_0x0250, RES_SHARED_VGA },
-- { NV_CHIP_0x0258, NV_CHIP_0x0258, RES_SHARED_VGA },
-- { -1, -1, RES_UNDEFINED }
-+ {NV_CHIP_RIVA_128, NV_CHIP_RIVA_128, RES_SHARED_VGA},
-+ {NV_CHIP_TNT, NV_CHIP_TNT, RES_SHARED_VGA},
-+ {NV_CHIP_TNT2, NV_CHIP_TNT2, RES_SHARED_VGA},
-+ {NV_CHIP_UTNT2, NV_CHIP_UTNT2, RES_SHARED_VGA},
-+ {NV_CHIP_VTNT2, NV_CHIP_VTNT2, RES_SHARED_VGA},
-+ {NV_CHIP_UVTNT2, NV_CHIP_UVTNT2, RES_SHARED_VGA},
-+ {NV_CHIP_ITNT2, NV_CHIP_ITNT2, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE_256, NV_CHIP_GEFORCE_256, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE_DDR, NV_CHIP_GEFORCE_DDR, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO, NV_CHIP_QUADRO, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE2_MX, NV_CHIP_GEFORCE2_MX, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE2_MX_100, NV_CHIP_GEFORCE2_MX_100, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE2_GO, NV_CHIP_GEFORCE2_GO, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO2_MXR, NV_CHIP_QUADRO2_MXR, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE2_GTS, NV_CHIP_GEFORCE2_GTS, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE2_TI, NV_CHIP_GEFORCE2_TI, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE2_ULTRA, NV_CHIP_GEFORCE2_ULTRA, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO2_PRO, NV_CHIP_QUADRO2_PRO, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_MX_460, NV_CHIP_GEFORCE4_MX_460, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_MX_440, NV_CHIP_GEFORCE4_MX_440, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_MX_420, NV_CHIP_GEFORCE4_MX_420, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_440_GO, NV_CHIP_GEFORCE4_440_GO, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_420_GO, NV_CHIP_GEFORCE4_420_GO, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_420_GO_M32,NV_CHIP_GEFORCE4_420_GO_M32,RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_500XGL, NV_CHIP_QUADRO4_500XGL, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_440_GO_M64,NV_CHIP_GEFORCE4_440_GO_M64,RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_200, NV_CHIP_QUADRO4_200, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_550XGL, NV_CHIP_QUADRO4_550XGL, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_500_GOGL, NV_CHIP_QUADRO4_500_GOGL, RES_SHARED_VGA},
-+ {NV_CHIP_IGEFORCE2, NV_CHIP_IGEFORCE2, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE3, NV_CHIP_GEFORCE3, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE3_TI_200, NV_CHIP_GEFORCE3_TI_200, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE3_TI_500, NV_CHIP_GEFORCE3_TI_500, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO_DCC, NV_CHIP_QUADRO_DCC, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_TI_4600, NV_CHIP_GEFORCE4_TI_4600, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_TI_4400, NV_CHIP_GEFORCE4_TI_4400, RES_SHARED_VGA},
-+ {NV_CHIP_GEFORCE4_TI_4200, NV_CHIP_GEFORCE4_TI_4200, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_900XGL, NV_CHIP_QUADRO4_900XGL, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_750XGL, NV_CHIP_QUADRO4_750XGL, RES_SHARED_VGA},
-+ {NV_CHIP_QUADRO4_700XGL, NV_CHIP_QUADRO4_700XGL, RES_SHARED_VGA},
-+ { -1, -1, RES_UNDEFINED }
- };
-
- /*
-@@ -179,13 +189,11 @@
- "vgaHWGetHWRec",
- "vgaHWGetIndex",
- "vgaHWInit",
-- "vgaHWLock",
- "vgaHWMapMem",
- "vgaHWProtect",
- "vgaHWRestore",
- "vgaHWSave",
- "vgaHWSaveScreen",
-- "vgaHWUnlock",
- "vgaHWddc1SetSpeed",
- NULL
- };
-@@ -305,7 +313,8 @@
- OPTION_FBDEV,
- OPTION_ROTATE,
- OPTION_VIDEO_KEY,
-- OPTION_FLAT_PANEL
-+ OPTION_FLAT_PANEL,
-+ OPTION_CRTC_NUMBER
- } NVOpts;
-
-
-@@ -319,6 +328,7 @@
- { OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE },
- { OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE },
- { OPTION_FLAT_PANEL, "FlatPanel", OPTV_BOOLEAN, {0}, FALSE },
-+ { OPTION_CRTC_NUMBER, "CrtcNumber", OPTV_INTEGER, {0}, FALSE },
- { -1, NULL, OPTV_NONE, {0}, FALSE }
- };
-
-@@ -333,7 +343,7 @@
- */
- static NVRamdacRec DacInit = {
- FALSE, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL,
-- 0, NULL, NULL, NULL, NULL, NULL
-+ 0, NULL, NULL, NULL, NULL
- };
-
-
-@@ -565,13 +575,9 @@
- NVEnterVT(int scrnIndex, int flags)
- {
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-- NVPtr pNv = NVPTR(pScrn);
-- vgaHWPtr hwp = VGAHWPTR(pScrn);
-
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVEnterVT\n"));
-
-- vgaHWUnlock(hwp);
-- pNv->riva.LockUnlock(&pNv->riva, 0);
- if (!NVModeInit(pScrn, pScrn->currentMode))
- return FALSE;
- NVAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
-@@ -600,13 +606,11 @@
- {
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- NVPtr pNv = NVPTR(pScrn);
-- vgaHWPtr hwp = VGAHWPTR(pScrn);
-
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVLeaveVT\n"));
-
- NVRestore(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 1);
-- vgaHWLock(hwp);
- }
-
-
-@@ -645,7 +649,6 @@
- NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
- {
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-- vgaHWPtr hwp = VGAHWPTR(pScrn);
- NVPtr pNv = NVPTR(pScrn);
-
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVCloseScreen\n"));
-@@ -653,7 +656,6 @@
- if (pScrn->vtSema) {
- NVRestore(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 1);
-- vgaHWLock(hwp);
- }
-
- NVUnmapMem(pScrn);
-@@ -779,15 +781,13 @@
-
-
- /* Internally used */
--static xf86MonPtr
-+xf86MonPtr
- NVdoDDC(ScrnInfoPtr pScrn)
- {
-- vgaHWPtr hwp;
- NVPtr pNv;
- NVRamdacPtr NVdac;
- xf86MonPtr MonInfo = NULL;
-
-- hwp = VGAHWPTR(pScrn);
- pNv = NVPTR(pScrn);
- NVdac = &pNv->Dac;
-
-@@ -800,7 +800,6 @@
- /* if ((MonInfo = nvDoDDCVBE(pScrn))) return MonInfo; */
-
- /* Enable access to extended registers */
-- vgaHWUnlock(hwp);
- pNv->riva.LockUnlock(&pNv->riva, 0);
- /* Save the current state */
- NVSave(pScrn);
-@@ -814,7 +813,6 @@
- /* Restore previous state */
- NVRestore(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 1);
-- vgaHWLock(hwp);
-
- return MonInfo;
- }
-@@ -972,7 +970,7 @@
- /* OK */
- break;
- case 16:
-- if(pNv->Chipset == NV_CHIP_RIVA128) {
-+ if(pNv->Chipset == NV_CHIP_RIVA_128) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "The Riva 128 chipset does not support depth 16. "
- "Using depth 15 instead\n");
-@@ -1141,10 +1139,23 @@
- (((pScrn->mask.blue >> pScrn->offset.blue) - 1) << pScrn->offset.blue);
- }
-
-- if (xf86ReturnOptValBool(pNv->Options, OPTION_FLAT_PANEL, FALSE)) {
-- pNv->FlatPanel = TRUE;
-- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "using flat panel\n");
-+ if (xf86GetOptValBool(pNv->Options, OPTION_FLAT_PANEL, &(pNv->FlatPanel))) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "forcing %s usage\n",
-+ pNv->FlatPanel ? "DFP" : "CRTC");
-+ } else {
-+ pNv->FlatPanel = -1; /* autodetect later */
- }
-+
-+ if (xf86GetOptValInteger(pNv->Options, OPTION_CRTC_NUMBER,
-+ &pNv->forceCRTC))
-+ {
-+ if((pNv->forceCRTC < 0) || (pNv->forceCRTC > 1)) {
-+ pNv->forceCRTC = -1;
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-+ "Invalid CRTC number. Must be 0 or 1\n");
-+ }
-+ } else pNv->forceCRTC = -1;
-+
-
- if (pNv->pEnt->device->MemBase != 0) {
- /* Require that the config file value matches one of the PCI values. */
-@@ -1233,12 +1244,6 @@
- }
-
- /*
-- * fill riva structure etc.
-- */
-- (*pNv->PreInit)(pScrn);
--
--
-- /*
- * If the user has specified the amount of memory in the XF86Config
- * file, we respect that setting.
- */
-@@ -1258,42 +1263,6 @@
-
- pNv->FbMapSize = pScrn->videoRam * 1024;
-
--#if !defined(__powerpc__)
-- /* Read and print the Monitor DDC info */
-- pScrn->monitor->DDC = NVdoDDC(pScrn);
--#endif
--
--#if 0
-- /*
-- * This code was for testing. It will be removed as soon
-- * as this is integrated into the common level.
-- */
-- if ((!pScrn->monitor->nHsync || !pScrn->monitor->nVrefresh)
-- && pScrn->monitor->DDC) {
-- int i;
-- int h = (!pScrn->monitor->nHsync) ? 0 : -1;
-- int v = (!pScrn->monitor->nVrefresh) ? 0 : -1;
-- xf86MonPtr pMon = (xf86MonPtr)pScrn->monitor->DDC;
-- for (i = 0; i < DET_TIMINGS; i++) {
-- if (pMon->det_mon[i].type == DS_RANGES) {
-- if (h != -1) {
-- pScrn->monitor->hsync[h].lo
-- = pMon->det_mon[i].section.ranges.min_h;
-- pScrn->monitor->hsync[h++].hi
-- = pMon->det_mon[i].section.ranges.max_h;
-- }
-- if (v != -1) {
-- pScrn->monitor->vrefresh[v].lo
-- = pMon->det_mon[i].section.ranges.min_v;
-- pScrn->monitor->vrefresh[v++].hi
-- = pMon->det_mon[i].section.ranges.max_v;
-- }
-- }
-- }
-- if (h != -1) pScrn->monitor->nHsync = h;
-- if (v != -1) pScrn->monitor->nVrefresh = v;
-- }
--#endif
- /*
- * If the driver can do gamma correction, it should call xf86SetGamma()
- * here.
-@@ -1318,6 +1287,7 @@
- case NV_ARCH_04:
- case NV_ARCH_10:
- case NV_ARCH_20:
-+ default:
- pNv->FbUsableSize -= 128 * 1024;
- break;
- }
-@@ -1344,6 +1314,11 @@
- clockRanges->interlaceAllowed = FALSE;
- clockRanges->doubleScanAllowed = TRUE;
-
-+ if(pNv->FlatPanel == 1) {
-+ clockRanges->interlaceAllowed = FALSE;
-+ clockRanges->doubleScanAllowed = FALSE;
-+ }
-+
- /*
- * xf86ValidateModes will check that the mode HTotal and VTotal values
- * don't exceed the chipset's limit if pScrn->maxHValue and
-@@ -1538,9 +1513,7 @@
-
-
- /*
-- * Initialise a new mode. This is currently still using the old
-- * "initialise struct, restore/write struct to HW" model. That could
-- * be changed.
-+ * Initialise a new mode.
- */
-
- static Bool
-@@ -1558,18 +1531,15 @@
- return FALSE;
- pScrn->vtSema = TRUE;
-
-- if ( pNv->ModeInit ) {
-- if (!(*pNv->ModeInit)(pScrn, mode))
-- return FALSE;
-- }
-+ if(!(*pNv->ModeInit)(pScrn, mode))
-+ return FALSE;
-
- /* Program the registers */
- vgaHWProtect(pScrn, TRUE);
- vgaReg = &hwp->ModeReg;
- nvReg = &pNv->ModeReg;
-
-- if ( pNv->Restore )
-- (*pNv->Restore)(pScrn, vgaReg, nvReg, FALSE);
-+ (*pNv->Restore)(pScrn, vgaReg, nvReg, FALSE);
-
- #if X_BYTE_ORDER == X_BIG_ENDIAN
- /* turn on LFB swapping */
-@@ -1606,10 +1576,7 @@
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVRestore\n"));
- /* Only restore text mode fonts/text for the primary card */
- vgaHWProtect(pScrn, TRUE);
-- if (pNv->Primary)
-- (*pNv->Restore)(pScrn, vgaReg, nvReg, TRUE);
-- else
-- vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE);
-+ (*pNv->Restore)(pScrn, vgaReg, nvReg, pNv->Primary);
- vgaHWProtect(pScrn, FALSE);
- }
-
-@@ -1666,7 +1633,6 @@
- return FALSE;
- } else {
- /* Save the current state */
-- vgaHWUnlock(hwp);
- pNv->riva.LockUnlock(&pNv->riva, 0);
- NVSave(pScrn);
- /* Initialise the first mode */
-@@ -1897,12 +1863,6 @@
- vgaRegPtr vgaReg = &pVga->SavedReg;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVSave\n"));
--#if defined(__powerpc__)
-- /* The console driver will have to save the fonts, we can't */
-- vgaHWSave(pScrn, vgaReg, VGA_SR_CMAP | VGA_SR_MODE);
--#else
-- vgaHWSave(pScrn, vgaReg, VGA_SR_CMAP | VGA_SR_MODE | VGA_SR_FONTS);
--#endif
-- pNv->riva.UnloadStateExt(&pNv->riva, nvReg);
-+ (*pNv->Save)(pScrn, vgaReg, nvReg, pNv->Primary);
- }
-
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_local.h Sat Nov 4 03:46:12 2000
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_local.h Sun Apr 14 15:59:41 2002
-@@ -36,40 +36,39 @@
- |* those rights set forth herein. *|
- |* *|
- \***************************************************************************/
--/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_local.h,v 1.6 2000/11/03 18:46:12 eich Exp $ */
-+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_local.h,v 1.7 2002/01/25 21:56:06 tsi Exp $ */
-
- #ifndef __NV_LOCAL_H__
- #define __NV_LOCAL_H__
-+
- /*
-- * This file includes any environment or machine specific values to access the HW.
-- * Put all affected includes, typdefs, etc. here so the riva_hw.* files can stay
-- * generic in nature.
-+ * This file includes any environment or machine specific values to access the
-+ * HW. Put all affected includes, typdefs, etc. here so the riva_hw.* files
-+ * can stay generic in nature.
- */
- #include "xf86_ansic.h"
- #include "compiler.h"
-+#include "xf86_OSproc.h"
-+
- /*
- * Typedefs to force certain sized values.
- */
- typedef unsigned char U008;
- typedef unsigned short U016;
- typedef unsigned int U032;
-+
- /*
-- * HW access macros.
-+ * HW access macros. These assume memory-mapped I/O, and not normal I/O space.
- */
--#include "xf86_OSproc.h"
--/* these assume memory-mapped I/O, and not normal I/O space */
- #define NV_WR08(p,i,d) MMIO_OUT8((volatile pointer)(p), (i), (d))
- #define NV_RD08(p,i) MMIO_IN8((volatile pointer)(p), (i))
- #define NV_WR16(p,i,d) MMIO_OUT16((volatile pointer)(p), (i), (d))
- #define NV_RD16(p,i) MMIO_IN16((volatile pointer)(p), (i))
- #define NV_WR32(p,i,d) MMIO_OUT32((volatile pointer)(p), (i), (d))
- #define NV_RD32(p,i) MMIO_IN32((volatile pointer)(p), (i))
--#if 1
-+
-+/* VGA I/O is now always done through MMIO */
- #define VGA_WR08(p,i,d) NV_WR08(p,i,d)
- #define VGA_RD08(p,i) NV_RD08(p,i)
--#else
--#define VGA_WR08(p,i,d) outb(i,d)
--#define VGA_RD08(p,i) inb(i)
--#endif
--#endif /* __NV_LOCAL_H__ */
-
-+#endif /* __NV_LOCAL_H__ */
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_proto.h Wed Mar 28 10:17:43 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h Sun Apr 14 15:59:41 2002
-@@ -6,6 +6,8 @@
- /* in nv_driver.c */
- Bool NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
- void NVAdjustFrame(int scrnIndex, int x, int y, int flags);
-+xf86MonPtr NVdoDDC(ScrnInfoPtr pScrn);
-+
-
- /* in nv_dac.c */
- void NVRamdacInit(ScrnInfoPtr pScrn);
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_setup.c Wed Oct 31 04:38:29 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c Sun Apr 14 15:59:41 2002
-@@ -155,6 +155,92 @@
- return (VGA_RD08(pNv->riva.PDIO, VGA_DAC_DATA));
- }
-
-+static Bool
-+NVIsConnected (ScrnInfoPtr pScrn, Bool second)
-+{
-+ NVPtr pNv = NVPTR(pScrn);
-+ volatile U032 *PRAMDAC = pNv->riva.PRAMDAC0;
-+ CARD32 reg52C, reg608;
-+ Bool present;
-+
-+ if(second) PRAMDAC += 0x800;
-+
-+ reg52C = PRAMDAC[0x052C/4];
-+ reg608 = PRAMDAC[0x0608/4];
-+
-+ PRAMDAC[0x0608/4] = reg608 & ~0x00010000;
-+
-+ PRAMDAC[0x052C/4] = reg52C & 0x0000FEEE;
-+ usleep(1000);
-+ PRAMDAC[0x052C/4] |= 1;
-+
-+ pNv->riva.PRAMDAC0[0x0610/4] = 0x94050140;
-+ pNv->riva.PRAMDAC0[0x0608/4] |= 0x00001000;
-+
-+ usleep(1000);
-+
-+ present = (PRAMDAC[0x0608/4] & (1 << 28)) ? TRUE : FALSE;
-+
-+ pNv->riva.PRAMDAC0[0x0608/4] &= 0x0000EFFF;
-+
-+ PRAMDAC[0x052C/4] = reg52C;
-+ PRAMDAC[0x0608/4] = reg608;
-+
-+ return present;
-+}
-+
-+static void
-+NVOverrideCRTC(ScrnInfoPtr pScrn)
-+{
-+ NVPtr pNv = NVPTR(pScrn);
-+
-+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-+ "Detected CRTC controller %i being used\n",
-+ pNv->SecondCRTC ? 1 : 0);
-+
-+ if(pNv->forceCRTC != -1) {
-+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-+ "Forcing usage of CRTC %i\n", pNv->forceCRTC);
-+ pNv->SecondCRTC = pNv->forceCRTC;
-+ }
-+}
-+
-+static void
-+NVIsSecond (ScrnInfoPtr pScrn)
-+{
-+ NVPtr pNv = NVPTR(pScrn);
-+
-+ if(pNv->FlatPanel == 1) {
-+ switch(pNv->Chipset) {
-+ case NV_CHIP_GEFORCE4_440_GO:
-+ case NV_CHIP_GEFORCE4_440_GO_M64:
-+ case NV_CHIP_GEFORCE4_420_GO:
-+ case NV_CHIP_GEFORCE4_420_GO_M32:
-+ case NV_CHIP_QUADRO4_500_GOGL:
-+ pNv->SecondCRTC = TRUE;
-+ break;
-+ default:
-+ pNv->SecondCRTC = FALSE;
-+ break;
-+ }
-+ } else {
-+ if(NVIsConnected(pScrn, 0)) {
-+ if(pNv->riva.PRAMDAC0[0x0000052C/4] & 0x100)
-+ pNv->SecondCRTC = TRUE;
-+ else
-+ pNv->SecondCRTC = FALSE;
-+ } else
-+ if (NVIsConnected(pScrn, 1)) {
-+ if(pNv->riva.PRAMDAC0[0x0000252C/4] & 0x100)
-+ pNv->SecondCRTC = TRUE;
-+ else
-+ pNv->SecondCRTC = FALSE;
-+ } else /* default */
-+ pNv->SecondCRTC = FALSE;
-+ }
-+
-+ NVOverrideCRTC(pScrn);
-+}
-
- static void
- NVCommonSetup(ScrnInfoPtr pScrn)
-@@ -168,7 +254,6 @@
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Regbase %x\n", regBase));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- riva %x\n", &pNv->riva));
-
-- pNv->PreInit = NVRamdacInit;
- pNv->Save = NVDACSave;
- pNv->Restore = NVDACRestore;
- pNv->ModeInit = NVDACInit;
-@@ -216,9 +301,9 @@
-
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
-
-- pNv->riva.PRAMDAC = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
-+ pNv->riva.PRAMDAC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00680000, 0x00003000);
-- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PRAMDAC %x\n", pNv->riva.PRAMDAC));
-+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PRAMDAC %x\n", pNv->riva.PRAMDAC0));
- pNv->riva.PFB = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00100000, 0x00001000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PFB %x\n", pNv->riva.PFB));
-@@ -245,22 +330,88 @@
- * These registers are read/write as 8 bit values. Probably have to map
- * sparse on alpha.
- */
-- pNv->riva.PCIO = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
-+ pNv->riva.PCIO0 = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pNv->PciTag, regBase+0x00601000,
-- 0x00001000);
-- pNv->riva.PDIO = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
-+ 0x00003000);
-+ pNv->riva.PDIO0 = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pNv->PciTag, regBase+0x00681000,
-- 0x00001000);
-+ 0x00003000);
- pNv->riva.PVIO = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pNv->PciTag, regBase+0x000C0000,
- 0x00001000);
--
-+
-+ if(pNv->FlatPanel == -1) {
-+ switch(pNv->Chipset) {
-+ case NV_CHIP_GEFORCE4_440_GO:
-+ case NV_CHIP_GEFORCE4_440_GO_M64:
-+ case NV_CHIP_GEFORCE4_420_GO:
-+ case NV_CHIP_GEFORCE4_420_GO_M32:
-+ case NV_CHIP_QUADRO4_500_GOGL:
-+ case NV_CHIP_GEFORCE2_GO:
-+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-+ "On a laptop. Assuming Digital Flat Panel\n");
-+ pNv->FlatPanel = 1;
-+ break;
-+ default:
-+ break;
-+ }
-+ }
-+
-+ switch(pNv->Chipset & 0x0ff0) {
-+ case 0x0110:
-+ if(pNv->Chipset == NV_CHIP_GEFORCE2_GO)
-+ pNv->SecondCRTC = TRUE;
-+#if defined(__powerpc__)
-+ else if(pNv->FlatPanel == 1)
-+ pNv->SecondCRTC = TRUE;
-+#endif
-+ NVOverrideCRTC(pScrn);
-+ break;
-+ case 0x0170:
-+ case 0x0250:
-+ NVIsSecond(pScrn);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if(pNv->SecondCRTC) {
-+ pNv->riva.PCIO = pNv->riva.PCIO0 + 0x2000;
-+ pNv->riva.PCRTC = pNv->riva.PCRTC0 + 0x800;
-+ pNv->riva.PRAMDAC = pNv->riva.PRAMDAC0 + 0x800;
-+ pNv->riva.PDIO = pNv->riva.PDIO0 + 0x2000;
-+ } else {
-+ pNv->riva.PCIO = pNv->riva.PCIO0;
-+ pNv->riva.PCRTC = pNv->riva.PCRTC0;
-+ pNv->riva.PRAMDAC = pNv->riva.PRAMDAC0;
-+ pNv->riva.PDIO = pNv->riva.PDIO0;
-+ }
-+
- RivaGetConfig(pNv);
-
- pNv->Dac.maxPixelClock = pNv->riva.MaxVClockFreqKHz;
-
-- vgaHWUnlock(VGAHWPTR(pScrn));
- pNv->riva.LockUnlock(&pNv->riva, 0);
-+
-+ NVRamdacInit(pScrn);
-+
-+#if !defined(__powerpc__)
-+ /* Read and print the Monitor DDC info */
-+ pScrn->monitor->DDC = NVdoDDC(pScrn);
-+#endif
-+ if(pNv->FlatPanel == -1) {
-+ pNv->FlatPanel = 0;
-+ if(pScrn->monitor->DDC) {
-+ xf86MonPtr ddc = (xf86MonPtr)pScrn->monitor->DDC;
-+
-+ if(ddc->features.input_type) {
-+ pNv->FlatPanel = 1;
-+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-+ "autodetected Digital Flat Panel\n");
-+ }
-+ }
-+ }
-+ pNv->riva.flatPanel = (pNv->FlatPanel > 0) ? TRUE : FALSE;
- }
-
- void
-@@ -289,6 +440,7 @@
- frameBase+0x00C00000, 0x00008000);
-
- NVCommonSetup(pScrn);
-+ pNv->riva.PCRTC = pNv->riva.PCRTC0 = pNv->riva.PGRAPH;
- }
-
- void
-@@ -307,11 +459,12 @@
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00710000, 0x00010000);
-- pNv->riva.PCRTC = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
-+ pNv->riva.PCRTC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00600000, 0x00001000);
-
- NVCommonSetup(pScrn);
- }
-+
- void
- NV10Setup(ScrnInfoPtr pScrn)
- {
-@@ -322,14 +475,11 @@
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV10Setup\n"));
-
- pNv->riva.Architecture = 0x10;
-- /*
-- * Map chip-specific memory-mapped registers. This MUST be done in the OS specific driver code.
-- */
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00710000, 0x00010000);
-- pNv->riva.PCRTC = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
-- regBase+0x00600000, 0x00001000);
-+ pNv->riva.PCRTC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
-+ regBase+0x00600000, 0x00003000);
-
- NVCommonSetup(pScrn);
- }
-@@ -341,18 +491,14 @@
- CARD32 regBase = pNv->IOAddress;
- int mmioFlags;
-
-- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV10Setup\n"));
-+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV20Setup\n"));
-
- pNv->riva.Architecture = 0x20;
-- /*
-- * Map chip-specific memory-mapped registers. This MUST be done in the OS sp
--ecific driver code.
-- */
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00710000, 0x00010000);
-- pNv->riva.PCRTC = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
-- regBase+0x00600000, 0x00001000);
-+ pNv->riva.PCRTC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
-+ regBase+0x00600000, 0x00003000);
-
- NVCommonSetup(pScrn);
- }
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nv_type.h Fri Dec 7 09:09:56 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h Sun Apr 14 15:59:41 2002
-@@ -32,7 +32,6 @@
- void (*SetCursorColors)(ScrnInfoPtr, int, int);
- long maxPixelClock;
- void (*LoadPalette)(ScrnInfoPtr, int, int*, LOCO*, VisualPtr);
-- void (*PreInit)(ScrnInfoPtr);
- void (*Save)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- void (*Restore)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr);
-@@ -80,7 +79,6 @@
- int numDGAModes;
- Bool DGAactive;
- int DGAViewportStatus;
-- void (*PreInit)(ScrnInfoPtr pScrn);
- void (*Save)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- void (*Restore)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr);
-@@ -113,7 +111,9 @@
- void (*VideoTimerCallback)(ScrnInfoPtr, Time);
- XF86VideoAdaptorPtr overlayAdaptor;
- int videoKey;
-- Bool FlatPanel;
-+ int FlatPanel;
-+ Bool SecondCRTC;
-+ int forceCRTC;
- OptionInfoPtr Options;
- } NVRec, *NVPtr;
-
-@@ -127,40 +127,46 @@
-
- int RivaGetConfig(NVPtr);
-
--#define NV_CHIP_RIVA128 ((PCI_VENDOR_NVIDIA_SGS << 16)| PCI_CHIP_RIVA128)
--#define NV_CHIP_TNT ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_TNT)
--#define NV_CHIP_TNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_TNT2)
--#define NV_CHIP_UTNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_UTNT2)
--#define NV_CHIP_VTNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_VTNT2)
--#define NV_CHIP_UVTNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_UVTNT2)
--#define NV_CHIP_ITNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_ITNT2)
--#define NV_CHIP_GEFORCE256 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_GEFORCE256)
--#define NV_CHIP_GEFORCEDDR ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_GEFORCEDDR)
--#define NV_CHIP_QUADRO ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_QUADRO)
--#define NV_CHIP_GEFORCE2MX ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2MX)
--#define NV_CHIP_GEFORCE2MXDDR ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2MXDDR)
--#define NV_CHIP_IGEFORCE2 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_IGEFORCE2)
--#define NV_CHIP_0x0170 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0170)
--#define NV_CHIP_0x0171 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0171)
--#define NV_CHIP_0x0172 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0172)
--#define NV_CHIP_0x0173 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0173)
--#define NV_CHIP_0x0174 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0174)
--#define NV_CHIP_0x0175 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0175)
--#define NV_CHIP_0x0178 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0178)
--#define NV_CHIP_0x017A ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x017A)
--#define NV_CHIP_0x017B ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x017B)
--#define NV_CHIP_0x017C ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x017C)
--#define NV_CHIP_QUADRO2MXR ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO2MXR)
--#define NV_CHIP_GEFORCE2GO ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2GO)
--#define NV_CHIP_GEFORCE2GTS ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2GTS)
--#define NV_CHIP_GEFORCE2GTS_1 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2GTS_1)
--#define NV_CHIP_GEFORCE2ULTRA ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2ULTRA)
--#define NV_CHIP_QUADRO2PRO ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO2PRO)
--#define NV_CHIP_GEFORCE3 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3)
--#define NV_CHIP_GEFORCE3_1 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3_1)
--#define NV_CHIP_GEFORCE3_2 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3_2)
--#define NV_CHIP_QUADRO_DDC ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO_DDC)
--#define NV_CHIP_0x0250 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0250)
--#define NV_CHIP_0x0258 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_0x0258)
-+#define NV_CHIP_RIVA_128 ((PCI_VENDOR_NVIDIA_SGS << 16)| PCI_CHIP_RIVA128)
-+#define NV_CHIP_TNT ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_TNT)
-+#define NV_CHIP_TNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_TNT2)
-+#define NV_CHIP_UTNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_UTNT2)
-+#define NV_CHIP_VTNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_VTNT2)
-+#define NV_CHIP_UVTNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_UVTNT2)
-+#define NV_CHIP_ITNT2 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_ITNT2)
-+#define NV_CHIP_GEFORCE_256 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_GEFORCE_256)
-+#define NV_CHIP_GEFORCE_DDR ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_GEFORCE_DDR)
-+#define NV_CHIP_QUADRO ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_QUADRO)
-+#define NV_CHIP_GEFORCE2_MX ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_MX)
-+#define NV_CHIP_GEFORCE2_MX_100 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_MX_100)
-+#define NV_CHIP_QUADRO2_MXR ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO2_MXR)
-+#define NV_CHIP_GEFORCE2_GO ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_GO)
-+#define NV_CHIP_GEFORCE2_GTS ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_GTS)
-+#define NV_CHIP_GEFORCE2_TI ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_TI)
-+#define NV_CHIP_GEFORCE2_ULTRA ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_ULTRA)
-+#define NV_CHIP_QUADRO2_PRO ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO2_PRO)
-+#define NV_CHIP_GEFORCE4_MX_460 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_MX_460)
-+#define NV_CHIP_GEFORCE4_MX_440 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_MX_440)
-+#define NV_CHIP_GEFORCE4_MX_420 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_MX_420)
-+#define NV_CHIP_GEFORCE4_440_GO ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_440_GO)
-+#define NV_CHIP_GEFORCE4_420_GO ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_420_GO)
-+#define NV_CHIP_GEFORCE4_420_GO_M32 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_420_GO_M32)
-+#define NV_CHIP_QUADRO4_500XGL ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_500XGL)
-+#define NV_CHIP_GEFORCE4_440_GO_M64 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_440_GO_M64)
-+#define NV_CHIP_QUADRO4_200 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_200)
-+#define NV_CHIP_QUADRO4_550XGL ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_550XGL)
-+#define NV_CHIP_QUADRO4_500_GOGL ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_500_GOGL)
-+#define NV_CHIP_IGEFORCE2 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_IGEFORCE2)
-+#define NV_CHIP_GEFORCE3 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3)
-+#define NV_CHIP_GEFORCE3_TI_200 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3_TI_200)
-+#define NV_CHIP_GEFORCE3_TI_500 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3_TI_500)
-+#define NV_CHIP_QUADRO_DCC ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO_DCC)
-+#define NV_CHIP_GEFORCE4_TI_4600 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_TI_4600)
-+#define NV_CHIP_GEFORCE4_TI_4400 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_TI_4400)
-+#define NV_CHIP_GEFORCE4_TI_4200 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_TI_4200)
-+#define NV_CHIP_QUADRO4_900XGL ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_900XGL)
-+#define NV_CHIP_QUADRO4_750XGL ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_750XGL)
-+#define NV_CHIP_QUADRO4_700XGL ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_700XGL)
-+
-
- #endif /* __NV_STRUCT_H__ */
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/nvreg.h Fri Nov 12 11:12:41 1999
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/nvreg.h Sun Apr 14 15:59:41 2002
-@@ -164,18 +164,9 @@
- (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
- (PDAC_Write(INDEX_DATA,(value))))
-
--#define CRTC_Write(index,value) outb(0x3d4,(index));outb(0x3d5,value)
--#define CRTC_Read(index) (outb(0x3d4,index),inb(0x3d5))
--
--#define PCRTC_Write(index,value) CRTC_Write(NV_PCRTC_##index,value)
--#define PCRTC_Read(index) CRTC_Read(NV_PCRTC_##index)
--
- #define PCRTC_Def(mask,value) DEVICE_DEF(PCRTC,mask,value)
- #define PCRTC_Val(mask,value) DEVICE_VALUE(PCRTC,mask,value)
- #define PCRTC_Mask(mask) DEVICE_MASK(PCRTC,mask)
--
--#define SR_Write(index,value) outb(0x3c4,(index));outb(0x3c5,value)
--#define SR_Read(index) (outb(0x3c4,index),inb(0x3c5))
-
-
- /* These are the variables which actually point at the register blocks */
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/riva_hw.c Tue Dec 18 07:17:55 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c Sun Apr 14 15:59:41 2002
-@@ -70,34 +70,40 @@
- {
- return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01));
- }
--static void nv3LockUnlock
-+static void vgaLockUnlock
- (
- RIVA_HW_INST *chip,
-- int LockUnlock
-+ Bool Lock
- )
- {
-- VGA_WR08(chip->PVIO, 0x3C4, 0x06);
-- VGA_WR08(chip->PVIO, 0x3C5, LockUnlock ? 0x99 : 0x57);
-+ CARD8 cr11;
-+ VGA_WR08(chip->PCIO, 0x3D4, 0x11);
-+ cr11 = VGA_RD08(chip->PCIO, 0x3D5);
-+ if(Lock) cr11 |= 0x80;
-+ else cr11 &= ~0x80;
-+ VGA_WR08(chip->PCIO, 0x3D5, cr11);
- }
--static void nv4LockUnlock
-+
-+static void nv3LockUnlock
- (
- RIVA_HW_INST *chip,
-- int LockUnlock
-+ Bool Lock
- )
- {
-- VGA_WR08(chip->PCIO, 0x3D4, 0x1F);
-- VGA_WR08(chip->PCIO, 0x3D5, LockUnlock ? 0x99 : 0x57);
-+ VGA_WR08(chip->PVIO, 0x3C4, 0x06);
-+ VGA_WR08(chip->PVIO, 0x3C5, Lock ? 0x99 : 0x57);
-+ vgaLockUnlock(chip, Lock);
- }
--static void nv10LockUnlock
-+static void nv4LockUnlock
- (
- RIVA_HW_INST *chip,
-- int LockUnlock
-+ Bool Lock
- )
- {
- VGA_WR08(chip->PCIO, 0x3D4, 0x1F);
-- VGA_WR08(chip->PCIO, 0x3D5, LockUnlock ? 0x99 : 0x57);
-+ VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57);
-+ vgaLockUnlock(chip, Lock);
- }
--
- static int ShowHideCursor
- (
- RIVA_HW_INST *chip,
-@@ -601,7 +607,7 @@
- nv3_sim_state sim_data;
- unsigned int M, N, P, pll, MClk;
-
-- pll = chip->PRAMDAC[0x00000504/4];
-+ pll = chip->PRAMDAC0[0x00000504/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- MClk = (N * chip->CrystalFreqKHz / M) >> P;
- sim_data.pix_bpp = (char)pixelDepth;
-@@ -788,10 +794,10 @@
- nv4_sim_state sim_data;
- unsigned int M, N, P, pll, MClk, NVClk, cfg1;
-
-- pll = chip->PRAMDAC[0x00000504/4];
-+ pll = chip->PRAMDAC0[0x00000504/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- MClk = (N * chip->CrystalFreqKHz / M) >> P;
-- pll = chip->PRAMDAC[0x00000500/4];
-+ pll = chip->PRAMDAC0[0x00000500/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- NVClk = (N * chip->CrystalFreqKHz / M) >> P;
- cfg1 = chip->PFB[0x00000204/4];
-@@ -1049,10 +1055,10 @@
- nv10_sim_state sim_data;
- unsigned int M, N, P, pll, MClk, NVClk, cfg1;
-
-- pll = chip->PRAMDAC[0x00000504/4];
-+ pll = chip->PRAMDAC0[0x00000504/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- MClk = (N * chip->CrystalFreqKHz / M) >> P;
-- pll = chip->PRAMDAC[0x00000500/4];
-+ pll = chip->PRAMDAC0[0x00000500/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- NVClk = (N * chip->CrystalFreqKHz / M) >> P;
- cfg1 = chip->PFB[0x00000204/4];
-@@ -1078,6 +1084,66 @@
- }
- }
-
-+static void nForceUpdateArbitrationSettings
-+(
-+ unsigned VClk,
-+ unsigned pixelDepth,
-+ unsigned *burst,
-+ unsigned *lwm,
-+ RIVA_HW_INST *chip
-+)
-+{
-+ nv10_fifo_info fifo_data;
-+ nv10_sim_state sim_data;
-+ unsigned int M, N, P, pll, MClk, NVClk;
-+ unsigned int uMClkPostDiv, memctrl;
-+
-+ uMClkPostDiv = (pciReadLong(pciTag(0, 0, 3), 0x6C) >> 8) & 0xf;
-+ if(!uMClkPostDiv) uMClkPostDiv = 4;
-+ MClk = 400000 / uMClkPostDiv;
-+
-+ pll = chip->PRAMDAC0[0x00000500/4];
-+ M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
-+ NVClk = (N * chip->CrystalFreqKHz / M) >> P;
-+ sim_data.pix_bpp = (char)pixelDepth;
-+ sim_data.enable_video = 0;
-+ sim_data.enable_mp = 0;
-+ sim_data.memory_type = (pciReadLong(pciTag(0, 0, 1), 0x7C) >> 12) & 1;
-+ sim_data.memory_width = 64;
-+
-+ memctrl = pciReadLong(pciTag(0, 0, 3), 0x00) >> 16;
-+
-+ if((memctrl == 0x1A9) || (memctrl == 0x1AB)) {
-+ int dimm[3];
-+
-+ dimm[0] = (pciReadLong(pciTag(0, 0, 2), 0x40) >> 8) & 0x4F;
-+ dimm[1] = (pciReadLong(pciTag(0, 0, 2), 0x44) >> 8) & 0x4F;
-+ dimm[2] = (pciReadLong(pciTag(0, 0, 2), 0x48) >> 8) & 0x4F;
-+
-+ if((dimm[0] + dimm[1]) != dimm[2]) {
-+ ErrorF("WARNING: "
-+ "your nForce DIMMs are not arranged in optimal banks!\n");
-+ }
-+ }
-+
-+ sim_data.mem_latency = 3;
-+ sim_data.mem_aligned = 1;
-+ sim_data.mem_page_miss = 10;
-+ sim_data.gr_during_vid = 0;
-+ sim_data.pclk_khz = VClk;
-+ sim_data.mclk_khz = MClk;
-+ sim_data.nvclk_khz = NVClk;
-+ nv10CalcArbitration(&fifo_data, &sim_data);
-+ if (fifo_data.valid)
-+ {
-+ int b = fifo_data.graphics_burst_size >> 4;
-+ *burst = 0;
-+ while (b >>= 1) (*burst)++;
-+ *lwm = fifo_data.graphics_lwm >> 3;
-+ }
-+}
-+
-+
- /****************************************************************************\
- * *
- * RIVA Mode State Routines *
-@@ -1211,11 +1277,19 @@
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
-- nv10UpdateArbitrationSettings(VClk,
-+ if(chip->Chipset == NV_CHIP_IGEFORCE2) {
-+ nForceUpdateArbitrationSettings(VClk,
-+ pixelDepth * 8,
-+ &(state->arbitration0),
-+ &(state->arbitration1),
-+ chip);
-+ } else {
-+ nv10UpdateArbitrationSettings(VClk,
- pixelDepth * 8,
- &(state->arbitration0),
- &(state->arbitration1),
- chip);
-+ }
- state->cursor0 = 0x80 | (chip->CursorStart >> 17);
- state->cursor1 = (chip->CursorStart >> 11) << 2;
- state->cursor2 = chip->CursorStart >> 24;
-@@ -1272,18 +1346,10 @@
- {
- case NV_ARCH_04:
- LOAD_FIXED_STATE(nv4,FIFO);
-- chip->Tri03 = 0L;
-- chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]);
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
-- /*
-- * Initialize state for the RivaTriangle3D05 routines.
-- */
-- LOAD_FIXED_STATE(nv10tri05,PGRAPH);
- LOAD_FIXED_STATE(nv10,FIFO);
-- chip->Tri03 = 0L;
-- chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]);
- break;
- }
- }
-@@ -1316,19 +1382,16 @@
- case 16:
- LOAD_FIXED_STATE_15BPP(nv3,PRAMIN);
- LOAD_FIXED_STATE_15BPP(nv3,PGRAPH);
-- chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]);
- break;
- case 24:
- case 32:
- LOAD_FIXED_STATE_32BPP(nv3,PRAMIN);
- LOAD_FIXED_STATE_32BPP(nv3,PGRAPH);
-- chip->Tri03 = 0L;
- break;
- case 8:
- default:
- LOAD_FIXED_STATE_8BPP(nv3,PRAMIN);
- LOAD_FIXED_STATE_8BPP(nv3,PGRAPH);
-- chip->Tri03 = 0L;
- break;
- }
- for (i = 0x00000; i < 0x00800; i++)
-@@ -1355,24 +1418,20 @@
- case 15:
- LOAD_FIXED_STATE_15BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_15BPP(nv4,PGRAPH);
-- chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]);
- break;
- case 16:
- LOAD_FIXED_STATE_16BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_16BPP(nv4,PGRAPH);
-- chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]);
- break;
- case 24:
- case 32:
- LOAD_FIXED_STATE_32BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_32BPP(nv4,PGRAPH);
-- chip->Tri03 = 0L;
- break;
- case 8:
- default:
- LOAD_FIXED_STATE_8BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_8BPP(nv4,PGRAPH);
-- chip->Tri03 = 0L;
- break;
- }
- chip->PGRAPH[0x00000640/4] = state->offset0;
-@@ -1386,6 +1445,12 @@
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
-+ if(chip->twoHeads) {
-+ VGA_WR08(chip->PCIO, 0x03D4, 0x44);
-+ VGA_WR08(chip->PCIO, 0x03D5, state->crtcOwner);
-+ chip->LockUnlock(chip, 0);
-+ }
-+
- LOAD_FIXED_STATE(nv10,PFIFO);
- LOAD_FIXED_STATE(nv10,PRAMIN);
- LOAD_FIXED_STATE(nv10,PGRAPH);
-@@ -1394,24 +1459,20 @@
- case 15:
- LOAD_FIXED_STATE_15BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_15BPP(nv10,PGRAPH);
-- chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]);
- break;
- case 16:
- LOAD_FIXED_STATE_16BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_16BPP(nv10,PGRAPH);
-- chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]);
- break;
- case 24:
- case 32:
- LOAD_FIXED_STATE_32BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_32BPP(nv10,PGRAPH);
-- chip->Tri03 = 0L;
- break;
- case 8:
- default:
- LOAD_FIXED_STATE_8BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_8BPP(nv10,PGRAPH);
-- chip->Tri03 = 0L;
- break;
- }
-
-@@ -1438,11 +1499,12 @@
- chip->PGRAPH[0x00000864/4] = state->pitch3;
- chip->PGRAPH[0x000009A4/4] = chip->PFB[0x00000200/4];
- chip->PGRAPH[0x000009A8/4] = chip->PFB[0x00000204/4];
-- chip->PRAMDAC[0x0000052C/4] = 0x00000101;
-- chip->PRAMDAC[0x0000252C/4] = 0x00000001;
- }
-+ if(chip->twoHeads) {
-+ chip->PCRTC0[0x00000860/4] = state->head;
-+ chip->PCRTC0[0x00002860/4] = state->head2;
-+ }
- chip->PRAMDAC[0x00000404/4] |= (1 << 25);
-- chip->PRAMDAC[0x00002404/4] |= (1 << 25);
-
- chip->PMC[0x00008704/4] = 1;
- chip->PMC[0x00008140/4] = 0;
-@@ -1450,6 +1512,7 @@
- chip->PMC[0x00008924/4] = 0;
- chip->PMC[0x00008908/4] = 0x01ffffff;
- chip->PMC[0x0000890C/4] = 0x01ffffff;
-+ chip->PMC[0x00001588/4] = 0;
-
- chip->PFB[0x00000240/4] = 0;
- chip->PFB[0x00000244/4] = 0;
-@@ -1533,14 +1596,24 @@
- chip->PGRAPH[0x00000F50/4] = 0x00000040;
- for (i = 0; i < 4; i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
-+
-+ if(chip->flatPanel) {
-+ VGA_WR08(chip->PCIO, 0x03D4, 0x53);
-+ VGA_WR08(chip->PCIO, 0x03D5, 0);
-+ VGA_WR08(chip->PCIO, 0x03D4, 0x54);
-+ VGA_WR08(chip->PCIO, 0x03D5, 0);
-+ VGA_WR08(chip->PCIO, 0x03D4, 0x21);
-+ VGA_WR08(chip->PCIO, 0x03D5, 0xfa);
-+ }
- break;
- }
-+
- LOAD_FIXED_STATE(Riva,FIFO);
- UpdateFifoState(chip);
-+
- /*
- * Load HW mode state.
- */
--
- VGA_WR08(chip->PCIO, 0x03D4, 0x19);
- VGA_WR08(chip->PCIO, 0x03D5, state->repaint0);
- VGA_WR08(chip->PCIO, 0x03D4, 0x1A);
-@@ -1565,14 +1638,22 @@
- VGA_WR08(chip->PCIO, 0x03D5, state->interlace);
- VGA_WR08(chip->PCIO, 0x03D4, 0x41);
- VGA_WR08(chip->PCIO, 0x03D5, state->extra);
-- chip->PRAMDAC[0x00000508/4] = state->vpll;
-- chip->PRAMDAC[0x0000050C/4] = state->pllsel;
-+
-+ if(!chip->flatPanel) {
-+ chip->PRAMDAC0[0x00000508/4] = state->vpll;
-+ chip->PRAMDAC0[0x0000050C/4] = state->pllsel;
-+ if(chip->twoHeads)
-+ chip->PRAMDAC0[0x00000520/4] = state->vpll2;
-+ } else {
-+ chip->PRAMDAC[0x00000848/4] = state->scale;
-+ }
- chip->PRAMDAC[0x00000600/4] = state->general;
-+
- /*
- * Turn off VBlank enable and reset.
- */
-- *(chip->VBLANKENABLE) = 0;
-- *(chip->VBLANK) = chip->VBlankBit;
-+ chip->PCRTC[0x00000140/4] = 0;
-+ chip->PCRTC[0x00000100/4] = chip->VBlankBit;
- /*
- * Set interrupt enable.
- */
-@@ -1588,6 +1669,7 @@
- /* Free count from first subchannel */
- chip->FifoEmptyCount = chip->Rop->FifoFree;
- }
-+
- static void UnloadStateExt
- (
- RIVA_HW_INST *chip,
-@@ -1621,10 +1703,13 @@
- state->interlace = VGA_RD08(chip->PCIO, 0x03D5);
- VGA_WR08(chip->PCIO, 0x03D4, 0x41);
- state->extra = VGA_RD08(chip->PCIO, 0x03D5);
-- state->vpll = chip->PRAMDAC[0x00000508/4];
-- state->pllsel = chip->PRAMDAC[0x0000050C/4];
-+ state->vpll = chip->PRAMDAC0[0x00000508/4];
-+ state->vpll2 = chip->PRAMDAC0[0x00000520/4];
-+ state->pllsel = chip->PRAMDAC0[0x0000050C/4];
- state->general = chip->PRAMDAC[0x00000600/4];
-+ state->scale = chip->PRAMDAC[0x00000848/4];
- state->config = chip->PFB[0x00000200/4];
-+
- switch (chip->Architecture)
- {
- case NV_ARCH_03:
-@@ -1657,6 +1742,13 @@
- state->pitch1 = chip->PGRAPH[0x00000674/4];
- state->pitch2 = chip->PGRAPH[0x00000678/4];
- state->pitch3 = chip->PGRAPH[0x0000067C/4];
-+ if(chip->twoHeads) {
-+ state->head = chip->PCRTC0[0x00000860/4];
-+ state->head2 = chip->PCRTC0[0x00002860/4];
-+ VGA_WR08(chip->PCIO, 0x03D4, 0x44);
-+ state->crtcOwner = VGA_RD08(chip->PCIO, 0x03D5);
-+ }
-+
- break;
- }
- }
-@@ -1666,6 +1758,15 @@
- unsigned start
- )
- {
-+ chip->PCRTC[0x800/4] = start;
-+}
-+
-+static void SetStartAddress3
-+(
-+ RIVA_HW_INST *chip,
-+ unsigned start
-+)
-+{
- int offset = start >> 2;
- int pan = (start & 3) << 1;
- unsigned char tmp;
-@@ -1692,99 +1793,6 @@
- VGA_WR08(chip->PCIO, 0x3C0, 0x13);
- VGA_WR08(chip->PCIO, 0x3C0, pan);
- }
--static void nv3SetSurfaces2D
--(
-- RIVA_HW_INST *chip,
-- unsigned surf0,
-- unsigned surf1
--)
--{
-- RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);
--
-- RIVA_FIFO_FREE(*chip,Tri03,5);
-- chip->FIFO[0x00003800] = 0x80000003;
-- Surface->Offset = surf0;
-- chip->FIFO[0x00003800] = 0x80000004;
-- Surface->Offset = surf1;
-- chip->FIFO[0x00003800] = 0x80000013;
--}
--static void nv4SetSurfaces2D
--(
-- RIVA_HW_INST *chip,
-- unsigned surf0,
-- unsigned surf1
--)
--{
-- RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);
--
-- chip->FIFO[0x00003800] = 0x80000003;
-- Surface->Offset = surf0;
-- chip->FIFO[0x00003800] = 0x80000004;
-- Surface->Offset = surf1;
-- chip->FIFO[0x00003800] = 0x80000014;
--}
--static void nv10SetSurfaces2D
--(
-- RIVA_HW_INST *chip,
-- unsigned surf0,
-- unsigned surf1
--)
--{
-- RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);
--
-- chip->FIFO[0x00003800] = 0x80000003;
-- Surface->Offset = surf0;
-- chip->FIFO[0x00003800] = 0x80000004;
-- Surface->Offset = surf1;
-- chip->FIFO[0x00003800] = 0x80000014;
--}
--static void nv3SetSurfaces3D
--(
-- RIVA_HW_INST *chip,
-- unsigned surf0,
-- unsigned surf1
--)
--{
-- RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);
--
-- RIVA_FIFO_FREE(*chip,Tri03,5);
-- chip->FIFO[0x00003800] = 0x80000005;
-- Surface->Offset = surf0;
-- chip->FIFO[0x00003800] = 0x80000006;
-- Surface->Offset = surf1;
-- chip->FIFO[0x00003800] = 0x80000013;
--}
--static void nv4SetSurfaces3D
--(
-- RIVA_HW_INST *chip,
-- unsigned surf0,
-- unsigned surf1
--)
--{
-- RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);
--
-- chip->FIFO[0x00003800] = 0x80000005;
-- Surface->Offset = surf0;
-- chip->FIFO[0x00003800] = 0x80000006;
-- Surface->Offset = surf1;
-- chip->FIFO[0x00003800] = 0x80000014;
--}
--static void nv10SetSurfaces3D
--(
-- RIVA_HW_INST *chip,
-- unsigned surf0,
-- unsigned surf1
--)
--{
-- RivaSurface3D *Surfaces3D = (RivaSurface3D *)&(chip->FIFO[0x0000E000/4]);
--
-- RIVA_FIFO_FREE(*chip,Tri03,4);
-- chip->FIFO[0x00003800] = 0x80000007;
-- Surfaces3D->RenderBufferOffset = surf0;
-- Surfaces3D->ZBufferOffset = surf1;
-- chip->FIFO[0x00003800] = 0x80000014;
--}
--
- /****************************************************************************\
- * *
- * Probe RIVA Chip Configuration *
-@@ -1848,9 +1856,6 @@
- }
- chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
- chip->CURSOR = &(chip->PRAMIN[0x00008000/4 - 0x0800/4]);
-- chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]);
-- chip->VBLANKENABLE = &(chip->PGRAPH[0x0140/4]);
-- chip->VBLANK = &(chip->PGRAPH[0x0100/4]);
- chip->VBlankBit = 0x00000100;
- chip->MaxVClockFreqKHz = 256000;
- /*
-@@ -1861,9 +1866,7 @@
- chip->CalcStateExt = CalcStateExt;
- chip->LoadStateExt = LoadStateExt;
- chip->UnloadStateExt = UnloadStateExt;
-- chip->SetStartAddress = SetStartAddress;
-- chip->SetSurfaces2D = nv3SetSurfaces2D;
-- chip->SetSurfaces3D = nv3SetSurfaces3D;
-+ chip->SetStartAddress = SetStartAddress3;
- chip->LockUnlock = nv3LockUnlock;
- }
- static void nv4GetConfig
-@@ -1909,9 +1912,6 @@
- }
- chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
- chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]);
-- chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]);
-- chip->VBLANKENABLE = &(chip->PCRTC[0x0140/4]);
-- chip->VBLANK = &(chip->PCRTC[0x0100/4]);
- chip->VBlankBit = 0x00000001;
- chip->MaxVClockFreqKHz = 350000;
- /*
-@@ -1923,8 +1923,6 @@
- chip->LoadStateExt = LoadStateExt;
- chip->UnloadStateExt = UnloadStateExt;
- chip->SetStartAddress = SetStartAddress;
-- chip->SetSurfaces2D = nv4SetSurfaces2D;
-- chip->SetSurfaces3D = nv4SetSurfaces3D;
- chip->LockUnlock = nv4LockUnlock;
- }
- static void nv10GetConfig
-@@ -1989,9 +1987,6 @@
- 13500;
- chip->CursorStart = (chip->RamAmountKBytes - 128) * 1024;
- chip->CURSOR = NULL; /* can't set this here */
-- chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]);
-- chip->VBLANKENABLE = &(chip->PCRTC[0x0140/4]);
-- chip->VBLANK = &(chip->PCRTC[0x0100/4]);
- chip->VBlankBit = 0x00000001;
- chip->MaxVClockFreqKHz = 350000;
- /*
-@@ -2003,9 +1998,18 @@
- chip->LoadStateExt = LoadStateExt;
- chip->UnloadStateExt = UnloadStateExt;
- chip->SetStartAddress = SetStartAddress;
-- chip->SetSurfaces2D = nv10SetSurfaces2D;
-- chip->SetSurfaces3D = nv10SetSurfaces3D;
-- chip->LockUnlock = nv10LockUnlock;
-+ chip->LockUnlock = nv4LockUnlock;
-+
-+ switch(pNv->Chipset & 0x0ff0) {
-+ case 0x0110:
-+ case 0x0170:
-+ case 0x0250:
-+ chip->twoHeads = TRUE;
-+ break;
-+ default:
-+ chip->twoHeads = FALSE;
-+ break;
-+ }
- }
- int RivaGetConfig
- (
-@@ -2035,6 +2039,7 @@
- default:
- return (-1);
- }
-+ chip->Chipset = pNv->Chipset;
- /*
- * Fill in FIFO pointers.
- */
-@@ -2045,7 +2050,6 @@
- chip->Blt = (RivaScreenBlt *)&(chip->FIFO[0x00008000/4]);
- chip->Bitmap = (RivaBitmap *)&(chip->FIFO[0x0000A000/4]);
- chip->Line = (RivaLine *)&(chip->FIFO[0x0000C000/4]);
-- chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]);
- return (0);
- }
-
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/riva_hw.h Tue Oct 9 07:28:53 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h Sun Apr 14 15:59:41 2002
-@@ -225,74 +225,6 @@
- U032 MonochromeData01E;
- } RivaBitmap;
- /*
-- * 3D textured, Z buffered triangle.
-- */
--typedef volatile struct
--{
-- U032 reserved00[4];
--#if X_BYTE_ORDER == X_BIG_ENDIAN
-- U032 FifoFree;
--#else
-- U016 FifoFree;
-- U016 Nop;
--#endif
-- U032 reserved01[0x0BC];
-- U032 TextureOffset;
-- U032 TextureFormat;
-- U032 TextureFilter;
-- U032 FogColor;
--/* This is a problem on LynxOS */
--#ifdef Control
--#undef Control
--#endif
-- U032 Control;
-- U032 AlphaTest;
-- U032 reserved02[0x339];
-- U032 FogAndIndex;
-- U032 Color;
-- float ScreenX;
-- float ScreenY;
-- float ScreenZ;
-- float EyeM;
-- float TextureS;
-- float TextureT;
--} RivaTexturedTriangle03;
--typedef volatile struct
--{
-- U032 reserved00[4];
--#if X_BYTE_ORDER == X_BIG_ENDIAN
-- U032 FifoFree;
--#else
-- U016 FifoFree;
-- U016 Nop;
--#endif
-- U032 reserved01[0x0BB];
-- U032 ColorKey;
-- U032 TextureOffset;
-- U032 TextureFormat;
-- U032 TextureFilter;
-- U032 Blend;
--/* This is a problem on LynxOS */
--#ifdef Control
--#undef Control
--#endif
-- U032 Control;
-- U032 FogColor;
-- U032 reserved02[0x39];
-- struct
-- {
-- float ScreenX;
-- float ScreenY;
-- float ScreenZ;
-- float EyeM;
-- U032 Color;
-- U032 Specular;
-- float TextureS;
-- float TextureT;
-- } Vertex[16];
-- U032 DrawTriangle3D;
--} RivaTexturedTriangle05;
--/*
- * 2D line.
- */
- typedef volatile struct
-@@ -375,6 +307,7 @@
- */
- U032 Architecture;
- U032 Version;
-+ U032 Chipset;
- U032 CrystalFreqKHz;
- U032 RamAmountKBytes;
- U032 MaxVClockFreqKHz;
-@@ -385,11 +318,14 @@
- U032 FifoFreeCount;
- U032 FifoEmptyCount;
- U032 CursorStart;
-+ Bool flatPanel;
-+ Bool twoHeads;
- /*
- * Non-FIFO registers.
- */
-+ volatile U032 *PCRTC0;
- volatile U032 *PCRTC;
-- volatile U032 *PRAMDAC;
-+ volatile U032 *PRAMDAC0;
- volatile U032 *PFB;
- volatile U032 *PFIFO;
- volatile U032 *PGRAPH;
-@@ -399,12 +335,12 @@
- volatile U032 *PRAMIN;
- volatile U032 *FIFO;
- volatile U032 *CURSOR;
-- volatile U032 *CURSORPOS;
-- volatile U032 *VBLANKENABLE;
-- volatile U032 *VBLANK;
-+ volatile U008 *PCIO0;
- volatile U008 *PCIO;
- volatile U008 *PVIO;
-+ volatile U008 *PDIO0;
- volatile U008 *PDIO;
-+ volatile U032 *PRAMDAC;
- /*
- * Common chip functions.
- */
-@@ -413,8 +349,6 @@
- void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
- void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
- void (*SetStartAddress)(struct _riva_hw_inst *,U032);
-- void (*SetSurfaces2D)(struct _riva_hw_inst *,U032,U032);
-- void (*SetSurfaces3D)(struct _riva_hw_inst *,U032,U032);
- int (*ShowHideCursor)(struct _riva_hw_inst *,int);
- void (*LockUnlock)(struct _riva_hw_inst *, int);
- /*
-@@ -431,8 +365,6 @@
- RivaScreenBlt *Blt;
- RivaBitmap *Bitmap;
- RivaLine *Line;
-- RivaTexturedTriangle03 *Tri03;
-- RivaTexturedTriangle05 *Tri05;
- } RIVA_HW_INST;
- /*
- * Extended mode state information.
-@@ -446,14 +378,19 @@
- U032 repaint0;
- U032 repaint1;
- U032 screen;
-+ U032 scale;
- U032 extra;
- U032 pixel;
- U032 horiz;
- U032 arbitration0;
- U032 arbitration1;
- U032 vpll;
-+ U032 vpll2;
- U032 pllsel;
- U032 general;
-+ U032 crtcOwner;
-+ U032 head;
-+ U032 head2;
- U032 config;
- U032 cursor0;
- U032 cursor1;
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv.orig/riva_tbl.h Thu Sep 20 08:40:06 2001
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h Sun Apr 14 15:59:41 2002
-@@ -633,180 +633,6 @@
- {0x000001C9, 0x0077D777},
- {0x00000186, 0x000070E5},
- {0x0000020C, 0x0E0D0D0D}
--};
--static unsigned nv10tri05TablePGRAPH[][2] =
--{
-- {(0x00000E00/4), 0x00000000},
-- {(0x00000E04/4), 0x00000000},
-- {(0x00000E08/4), 0x00000000},
-- {(0x00000E0C/4), 0x00000000},
-- {(0x00000E10/4), 0x00001000},
-- {(0x00000E14/4), 0x00001000},
-- {(0x00000E18/4), 0x4003ff80},
-- {(0x00000E1C/4), 0x00000000},
-- {(0x00000E20/4), 0x00000000},
-- {(0x00000E24/4), 0x00000000},
-- {(0x00000E28/4), 0x00000000},
-- {(0x00000E2C/4), 0x00000000},
-- {(0x00000E30/4), 0x00080008},
-- {(0x00000E34/4), 0x00080008},
-- {(0x00000E38/4), 0x00000000},
-- {(0x00000E3C/4), 0x00000000},
-- {(0x00000E40/4), 0x00000000},
-- {(0x00000E44/4), 0x00000000},
-- {(0x00000E48/4), 0x00000000},
-- {(0x00000E4C/4), 0x00000000},
-- {(0x00000E50/4), 0x00000000},
-- {(0x00000E54/4), 0x00000000},
-- {(0x00000E58/4), 0x00000000},
-- {(0x00000E5C/4), 0x00000000},
-- {(0x00000E60/4), 0x00000000},
-- {(0x00000E64/4), 0x10000000},
-- {(0x00000E68/4), 0x00000000},
-- {(0x00000E6C/4), 0x00000000},
-- {(0x00000E70/4), 0x00000000},
-- {(0x00000E74/4), 0x00000000},
-- {(0x00000E78/4), 0x00000000},
-- {(0x00000E7C/4), 0x00000000},
-- {(0x00000E80/4), 0x00000000},
-- {(0x00000E84/4), 0x00000000},
-- {(0x00000E88/4), 0x08000000},
-- {(0x00000E8C/4), 0x00000000},
-- {(0x00000E90/4), 0x00000000},
-- {(0x00000E94/4), 0x00000000},
-- {(0x00000E98/4), 0x00000000},
-- {(0x00000E9C/4), 0x4B7FFFFF},
-- {(0x00000EA0/4), 0x00000000},
-- {(0x00000EA4/4), 0x00000000},
-- {(0x00000EA8/4), 0x00000000},
-- {(0x00000F00/4), 0x07FF0800},
-- {(0x00000F04/4), 0x07FF0800},
-- {(0x00000F08/4), 0x07FF0800},
-- {(0x00000F0C/4), 0x07FF0800},
-- {(0x00000F10/4), 0x07FF0800},
-- {(0x00000F14/4), 0x07FF0800},
-- {(0x00000F18/4), 0x07FF0800},
-- {(0x00000F1C/4), 0x07FF0800},
-- {(0x00000F20/4), 0x07FF0800},
-- {(0x00000F24/4), 0x07FF0800},
-- {(0x00000F28/4), 0x07FF0800},
-- {(0x00000F2C/4), 0x07FF0800},
-- {(0x00000F30/4), 0x07FF0800},
-- {(0x00000F34/4), 0x07FF0800},
-- {(0x00000F38/4), 0x07FF0800},
-- {(0x00000F3C/4), 0x07FF0800},
-- {(0x00000F40/4), 0x10000000},
-- {(0x00000F44/4), 0x00000000},
-- {(0x00000F50/4), 0x00006740},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F50/4), 0x00006750},
-- {(0x00000F54/4), 0x40000000},
-- {(0x00000F54/4), 0x40000000},
-- {(0x00000F54/4), 0x40000000},
-- {(0x00000F54/4), 0x40000000},
-- {(0x00000F50/4), 0x00006760},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00006770},
-- {(0x00000F54/4), 0xC5000000},
-- {(0x00000F54/4), 0xC5000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00006780},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x000067A0},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F50/4), 0x00006AB0},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F50/4), 0x00006AC0},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00006C10},
-- {(0x00000F54/4), 0xBF800000},
-- {(0x00000F50/4), 0x00007030},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00007040},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00007050},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00007060},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00007070},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00007080},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00007090},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x000070A0},
-- {(0x00000F54/4), 0x7149F2CA},
-- {(0x00000F50/4), 0x00006A80},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F50/4), 0x00006AA0},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00000040},
-- {(0x00000F54/4), 0x00000005},
-- {(0x00000F50/4), 0x00006400},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x4B7FFFFF},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00006410},
-- {(0x00000F54/4), 0xC5000000},
-- {(0x00000F54/4), 0xC5000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00006420},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x00006430},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x000064C0},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F54/4), 0x477FFFFF},
-- {(0x00000F54/4), 0x3F800000},
-- {(0x00000F50/4), 0x000064D0},
-- {(0x00000F54/4), 0xC5000000},
-- {(0x00000F54/4), 0xC5000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x000064E0},
-- {(0x00000F54/4), 0xC4FFF000},
-- {(0x00000F54/4), 0xC4FFF000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F50/4), 0x000064F0},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F54/4), 0x00000000},
-- {(0x00000F40/4), 0x30000000},
-- {(0x00000F44/4), 0x00000004},
-- {(0x00000F48/4), 0x10000000},
-- {(0x00000F4C/4), 0x00000000}
- };
- static unsigned nv10TablePRAMIN[][2] =
- {
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h.orig Sun Apr 14 15:53:25 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h Sun Apr 14 16:02:42 2002
-@@ -508,42 +508,47 @@
- #define PCI_CHIP_BT849 0x0351
-
- /* NVIDIA */
--#define PCI_CHIP_NV1 0x0008
--#define PCI_CHIP_DAC64 0x0009
--#define PCI_CHIP_TNT 0x0020
--#define PCI_CHIP_TNT2 0x0028
--#define PCI_CHIP_UTNT2 0x0029
--#define PCI_CHIP_VTNT2 0x002C
--#define PCI_CHIP_UVTNT2 0x002D
--#define PCI_CHIP_ITNT2 0x00A0
--#define PCI_CHIP_GEFORCE256 0x0100
--#define PCI_CHIP_GEFORCEDDR 0x0101
--#define PCI_CHIP_QUADRO 0x0103
--#define PCI_CHIP_GEFORCE2MX 0x0110
--#define PCI_CHIP_GEFORCE2MXDDR 0x0111
--#define PCI_CHIP_GEFORCE2GO 0x0112
--#define PCI_CHIP_QUADRO2MXR 0x0113
--#define PCI_CHIP_GEFORCE2GTS 0x0150
--#define PCI_CHIP_GEFORCE2GTS_1 0x0151
--#define PCI_CHIP_GEFORCE2ULTRA 0x0152
--#define PCI_CHIP_QUADRO2PRO 0x0153
--#define PCI_CHIP_0x0170 0x0170
--#define PCI_CHIP_0x0171 0x0171
--#define PCI_CHIP_0x0172 0x0172
--#define PCI_CHIP_0x0173 0x0173
--#define PCI_CHIP_0x0174 0x0174
--#define PCI_CHIP_0x0175 0x0175
--#define PCI_CHIP_0x0178 0x0178
--#define PCI_CHIP_0x017A 0x017A
--#define PCI_CHIP_0x017B 0x017B
--#define PCI_CHIP_0x017C 0x017C
--#define PCI_CHIP_IGEFORCE2 0x01A0
--#define PCI_CHIP_GEFORCE3 0x0200
--#define PCI_CHIP_GEFORCE3_1 0x0201
--#define PCI_CHIP_GEFORCE3_2 0x0202
--#define PCI_CHIP_QUADRO_DDC 0x0203
--#define PCI_CHIP_0x0250 0x0250
--#define PCI_CHIP_0x0258 0x0258
-+#define PCI_CHIP_NV1 0x0008
-+#define PCI_CHIP_DAC64 0x0009
-+#define PCI_CHIP_TNT 0x0020
-+#define PCI_CHIP_TNT2 0x0028
-+#define PCI_CHIP_UTNT2 0x0029
-+#define PCI_CHIP_VTNT2 0x002C
-+#define PCI_CHIP_UVTNT2 0x002D
-+#define PCI_CHIP_ITNT2 0x00A0
-+#define PCI_CHIP_GEFORCE_256 0x0100
-+#define PCI_CHIP_GEFORCE_DDR 0x0101
-+#define PCI_CHIP_QUADRO 0x0103
-+#define PCI_CHIP_GEFORCE2_MX 0x0110
-+#define PCI_CHIP_GEFORCE2_MX_100 0x0111
-+#define PCI_CHIP_GEFORCE2_GO 0x0112
-+#define PCI_CHIP_QUADRO2_MXR 0x0113
-+#define PCI_CHIP_GEFORCE2_GTS 0x0150
-+#define PCI_CHIP_GEFORCE2_TI 0x0151
-+#define PCI_CHIP_GEFORCE2_ULTRA 0x0152
-+#define PCI_CHIP_QUADRO2_PRO 0x0153
-+#define PCI_CHIP_GEFORCE4_MX_460 0x0170
-+#define PCI_CHIP_GEFORCE4_MX_440 0x0171
-+#define PCI_CHIP_GEFORCE4_MX_420 0x0172
-+#define PCI_CHIP_GEFORCE4_440_GO 0x0174
-+#define PCI_CHIP_GEFORCE4_420_GO 0x0175
-+#define PCI_CHIP_GEFORCE4_420_GO_M32 0x0176
-+#define PCI_CHIP_QUADRO4_500XGL 0x0178
-+#define PCI_CHIP_GEFORCE4_440_GO_M64 0x0179
-+#define PCI_CHIP_QUADRO4_200 0x017A
-+#define PCI_CHIP_QUADRO4_550XGL 0x017B
-+#define PCI_CHIP_QUADRO4_500_GOGL 0x017C
-+#define PCI_CHIP_IGEFORCE2 0x01A0
-+#define PCI_CHIP_GEFORCE3 0x0200
-+#define PCI_CHIP_GEFORCE3_TI_200 0x0201
-+#define PCI_CHIP_GEFORCE3_TI_500 0x0202
-+#define PCI_CHIP_QUADRO_DCC 0x0203
-+#define PCI_CHIP_GEFORCE4_TI_4600 0x0250
-+#define PCI_CHIP_GEFORCE4_TI_4400 0x0251
-+#define PCI_CHIP_GEFORCE4_TI_4200 0x0253
-+#define PCI_CHIP_QUADRO4_900XGL 0x0258
-+#define PCI_CHIP_QUADRO4_750XGL 0x0259
-+#define PCI_CHIP_QUADRO4_700XGL 0x025B
-
- /* NVIDIA & SGS */
- #define PCI_CHIP_RIVA128 0x0018
-@@ -1313,42 +1318,47 @@
- {0x0000, NULL,0}}},
- #endif
- {PCI_VENDOR_NVIDIA, {
-- {PCI_CHIP_NV1, "NV1",0},
-- {PCI_CHIP_DAC64, "DAC64",0},
-- {PCI_CHIP_TNT, "RIVA TNT",0},
-- {PCI_CHIP_TNT2, "RIVA TNT2/TNT2 Pro",0},
-- {PCI_CHIP_UTNT2, "RIVA TNT2 Ultra",0},
-- {PCI_CHIP_VTNT2, "Vanta",0},
-- {PCI_CHIP_UVTNT2, "Riva TNT2 M64",0},
-- {PCI_CHIP_ITNT2, "Aladdin TNT2",0},
-- {PCI_CHIP_GEFORCE256, "GeForce 256",0},
-- {PCI_CHIP_GEFORCEDDR, "GeForce DDR",0},
-- {PCI_CHIP_QUADRO, "Quadro",0},
-- {PCI_CHIP_GEFORCE2MX, "GeForce2 MX/MX 400",0},
-- {PCI_CHIP_GEFORCE2MXDDR,"GeForce2 MX 100/200",0},
-- {PCI_CHIP_GEFORCE2GO, "GeForce2 Go", 0},
-- {PCI_CHIP_QUADRO2MXR, "Quadro2 MXR",0},
-- {PCI_CHIP_GEFORCE2GTS, "GeForce2 GTS/Pro",0},
-- {PCI_CHIP_GEFORCE2GTS_1,"GeForce2 Ti",0},
-- {PCI_CHIP_GEFORCE2ULTRA,"GeForce2 Ultra",0},
-- {PCI_CHIP_QUADRO2PRO, "Quadro2 Pro",0},
-- {PCI_CHIP_0x0170, "0x0170",0},
-- {PCI_CHIP_0x0171, "0x0171",0},
-- {PCI_CHIP_0x0172, "0x0172",0},
-- {PCI_CHIP_0x0173, "0x0173",0},
-- {PCI_CHIP_0x0174, "0x0174",0},
-- {PCI_CHIP_0x0175, "0x0175",0},
-- {PCI_CHIP_0x0178, "0x0178",0},
-- {PCI_CHIP_0x017A, "0x017A",0},
-- {PCI_CHIP_0x017B, "0x017B",0},
-- {PCI_CHIP_0x017C, "0x017C",0},
-- {PCI_CHIP_IGEFORCE2, "GeForce2 Integrated",0},
-- {PCI_CHIP_GEFORCE3, "GeForce3",0},
-- {PCI_CHIP_GEFORCE3_1, "GeForce3 Ti 200",0},
-- {PCI_CHIP_GEFORCE3_2, "GeForce3 Ti 500",0},
-- {PCI_CHIP_QUADRO_DDC, "Quadro DDC",0},
-- {PCI_CHIP_0x0250, "0x0250",0},
-- {PCI_CHIP_0x0258, "0x0258",0},
-+ {PCI_CHIP_NV1, "NV1",0},
-+ {PCI_CHIP_DAC64, "DAC64",0},
-+ {PCI_CHIP_TNT, "RIVA TNT",0},
-+ {PCI_CHIP_TNT2, "RIVA TNT2/TNT2 Pro",0},
-+ {PCI_CHIP_UTNT2, "RIVA TNT2 Ultra",0},
-+ {PCI_CHIP_VTNT2, "Vanta",0},
-+ {PCI_CHIP_UVTNT2, "Riva TNT2 M64",0},
-+ {PCI_CHIP_ITNT2, "Aladdin TNT2",0},
-+ {PCI_CHIP_GEFORCE_256, "GeForce 256",0},
-+ {PCI_CHIP_GEFORCE_DDR, "GeForce DDR",0},
-+ {PCI_CHIP_QUADRO, "Quadro",0},
-+ {PCI_CHIP_GEFORCE2_MX, "GeForce2 MX/MX 400",0},
-+ {PCI_CHIP_GEFORCE2_MX_100, "GeForce2 MX 100/200",0},
-+ {PCI_CHIP_GEFORCE2_GO, "GeForce2 Go", 0},
-+ {PCI_CHIP_QUADRO2_MXR, "Quadro2 MXR",0},
-+ {PCI_CHIP_GEFORCE2_GTS, "GeForce2 GTS/Pro",0},
-+ {PCI_CHIP_GEFORCE2_TI, "GeForce2 Ti",0},
-+ {PCI_CHIP_GEFORCE2_ULTRA, "GeForce2 Ultra",0},
-+ {PCI_CHIP_QUADRO2_PRO, "Quadro2 Pro",0},
-+ {PCI_CHIP_GEFORCE4_MX_460, "GeForce4 MX 460",0},
-+ {PCI_CHIP_GEFORCE4_MX_440, "GeForce4 MX 440",0},
-+ {PCI_CHIP_GEFORCE4_MX_420, "GeForce4 MX 420",0},
-+ {PCI_CHIP_GEFORCE4_440_GO, "GeForce4 440 Go",0},
-+ {PCI_CHIP_GEFORCE4_420_GO, "GeForce4 420 Go",0},
-+ {PCI_CHIP_GEFORCE4_420_GO_M32,"GeForce4 420 Go M32",0},
-+ {PCI_CHIP_QUADRO4_500XGL, "Quadro4 500XGL",0},
-+ {PCI_CHIP_GEFORCE4_440_GO_M64,"GeForce4 440 Go M64",0},
-+ {PCI_CHIP_QUADRO4_200, "Quadro4 200/400NVS",0},
-+ {PCI_CHIP_QUADRO4_550XGL, "Quadro4 550XGL",0},
-+ {PCI_CHIP_QUADRO4_500_GOGL, "Quadro4 GoGL",0},
-+ {PCI_CHIP_IGEFORCE2, "GeForce2 Integrated",0},
-+ {PCI_CHIP_GEFORCE3, "GeForce3",0},
-+ {PCI_CHIP_GEFORCE3_TI_200, "GeForce3 Ti 200",0},
-+ {PCI_CHIP_GEFORCE3_TI_500, "GeForce3 Ti 500",0},
-+ {PCI_CHIP_QUADRO_DCC, "Quadro DCC",0},
-+ {PCI_CHIP_GEFORCE4_TI_4600, "GeForce4 Ti 4600",0},
-+ {PCI_CHIP_GEFORCE4_TI_4400, "GeForce4 Ti 4400",0},
-+ {PCI_CHIP_GEFORCE4_TI_4200, "GeForce4 Ti 4200",0},
-+ {PCI_CHIP_QUADRO4_900XGL, "Quadro4 900 XGL",0},
-+ {PCI_CHIP_QUADRO4_750XGL, "Quadro4 750 XGL",0},
-+ {PCI_CHIP_QUADRO4_700XGL, "Quadro4 700 XGL",0},
- {0x0000, NULL,0}}},
- {PCI_VENDOR_IMS, {
- {PCI_CHIP_IMSTT128, "TwinTurbo 128", 0},
+++ /dev/null
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h.orig Thu Feb 21 14:41:45 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h Thu Feb 21 14:56:44 2002
-@@ -625,6 +625,8 @@
- #define PCI_CHIP_SAVAGE_MX 0x8c11
- #define PCI_CHIP_SAVAGE_IX_MV 0x8c12
- #define PCI_CHIP_SAVAGE_IX 0x8c13
-+#define PCI_CHIP_S3TWISTER_P 0x8d01
-+#define PCI_CHIP_S3TWISTER_K 0x8d02
-
- /* ARK Logic */
- #define PCI_CHIP_1000PV 0xA091
-@@ -1555,6 +1557,8 @@
- {PCI_CHIP_SAVAGE_IX_MV, "Savage/IX-MV",0},
- {PCI_CHIP_PROSAVAGE_PM, "ProSavage PM133",0},
- {PCI_CHIP_PROSAVAGE_KM, "ProSavage KM133",0},
-+ {PCI_CHIP_S3TWISTER_P, "ProSavage PN133",0},
-+ {PCI_CHIP_S3TWISTER_K, "ProSavage KN133",0},
- {PCI_CHIP_VIRGE_MX, "ViRGE/MX",0},
- {PCI_CHIP_VIRGE_MXPLUS, "ViRGE/MX+",0},
- {PCI_CHIP_VIRGE_MXP, "ViRGE/MX+MV",0},
+++ /dev/null
---- XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c.maxxfbmem-fixup Sun Aug 25 19:26:12 2002
-+++ XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c Sun Aug 25 19:27:15 2002
-@@ -133,7 +133,7 @@
- else
- offset = 0;
-
-- topFB = (pSiS->maxxfbmem >= (pSiS->FbMapSize - offset)) ?
-+ topFB = (pSiS->maxxfbmem < (pSiS->FbMapSize - offset)) ?
- pSiS->maxxfbmem : pSiS->FbMapSize - offset;
- AvailFBArea.y2 = (topFB) / (pScrn->displayWidth *
- pScrn->bitsPerPixel / 8);
---- XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis530_accel.c.maxxfbmem-fixup Sun Aug 25 19:26:39 2002
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/sis/sis530_accel.c Sun Aug 25 19:26:56 2002
-@@ -135,7 +135,7 @@
- else if (pSiS->TurboQueue || pSiS->HWCursor)
- offset = 32768;
- }
-- topFB = (pSiS->maxxfbmem >= pSiS->FbMapSize - offset) ?
-+ topFB = (pSiS->maxxfbmem < pSiS->FbMapSize - offset) ?
- pSiS->maxxfbmem : pSiS->FbMapSize - offset;
-
- /* CPU To screen color expansion indirect method */
+++ /dev/null
---- XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c.sis-option-swcursor Sat Feb 9 01:19:22 2002
-+++ XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c Sat Feb 9 01:21:31 2002
-@@ -64,6 +64,7 @@
- pSiS->FastVram = TRUE;
- pSiS->UsePCIRetry = TRUE;
- pSiS->TurboQueue = TRUE;
-+ pSiS->SWCursor = FALSE;
- pSiS->HWCursor = TRUE;
- pSiS->Rotate = FALSE;
- pSiS->ShadowFB = FALSE;
-@@ -98,6 +99,7 @@
- if (xf86ReturnOptValBool(pSiS->Options, OPTION_SW_CURSOR, FALSE)) {
- from = X_CONFIG;
- pSiS->HWCursor = FALSE;
-+ pSiS->SWCursor = TRUE;
- }
- xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
- pSiS->HWCursor ? "HW" : "SW");
+++ /dev/null
---- XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c.sis-unresolved-symbols Mon Aug 26 08:02:32 2002
-+++ XFree86-4.2.1/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c Mon Aug 26 08:21:08 2002
-@@ -296,6 +296,16 @@
- "VBEInit",
- "vbeDoEDID",
- "vbeFree",
-+ "VBEGetVBEInfo",
-+ "VBEFreeVBEInfo",
-+ "VBESaveRestore",
-+ "VBEGetVBEMode",
-+ "VBESetVBEMode",
-+ "VBESetGetLogicalScanlineLength",
-+ "VBEGetModeInfo",
-+ "VBEFreeModeInfo",
-+ "VBESetDisplayStart",
-+ "",
- NULL
- };
-
-@@ -639,6 +649,7 @@
-
- if (flags & PROBE_DETECT) {
- if (xf86LoadSubModule(pScrn, "vbe")) {
-+ xf86LoaderReqSymLists(vbeSymbols, NULL);
- int index = xf86GetEntityInfo(pScrn->entityList[0])->index;
- if ((pVbe = VBEInit(NULL,index))) {
- ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
-@@ -1232,6 +1243,12 @@
- }
-
- #if 0
-+/* Note: Dunno why this code is here, but I just noticed that the variable
-+ * "ret" is not within scope of the above anonymous code block, and as such
-+ * does not exist at this point in the code. This code block should be moved
-+ * into the anonymous block above to be within scope of ret, if it is ever
-+ * removed from this #if 0 block. Mike A. Harris <mharris@redhat.com>
-+ */
- if (!ret && pSiS->ddc1Read)
- xf86SetDDCProperties(xf86PrintEDID(xf86DoEDID_DDC1(
- pScrn->scrnIndex,vgaHWddc1SetSpeed,pSiS->ddc1Read )));
+++ /dev/null
---- xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c.should-be-2048-not-2046 Sun Feb 3 00:57:24 2002
-+++ xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c Sun Feb 3 00:57:45 2002
-@@ -2392,7 +2392,7 @@
- static int
- TDFXValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) {
- TDFXTRACE("TDFXValidMode start\n");
-- if ((mode->HDisplay>2046) || (mode->VDisplay>1536))
-+ if ((mode->HDisplay>2048) || (mode->VDisplay>1536))
- return MODE_BAD;
- /* Banshee doesn't support interlace. Does V3? */
- if (mode->Flags&V_INTERLACE)
+++ /dev/null
-diff -u -r1.24 trident_video.c
---- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c 2002/04/01 12:06:20 1.24
-+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c 2002/04/03 22:47:27
-@@ -63,7 +63,9 @@
- static int TRIDENTQueryImageAttributes(ScrnInfoPtr,
- int, unsigned short *, unsigned short *, int *, int *);
- static void TRIDENTVideoTimerCallback(ScrnInfoPtr pScrn, Time time);
-+#if 0
- static void tridentSetVideoGamma(TRIDENTPtr pTrident,int value,int brightness);
-+#endif
- static void tridentSetVideoContrast(TRIDENTPtr pTrident,int value);
- static void tridentSetVideoParameters(TRIDENTPtr pTrident, int brightness,
- int saturation, int hue);
-@@ -305,7 +307,9 @@
- break;
- }
- }
-+#if 0
- tridentSetVideoGamma(pTrident,pPriv->Gamma,pPriv->Brightness);
-+#endif
- tridentSetVideoContrast(pTrident,pPriv->Contrast);
- tridentSetVideoParameters(pTrident,pPriv->Brightness,pPriv->Saturation,
- pPriv->HUE);
-@@ -355,7 +359,9 @@
- pPriv->Brightness = 45;
- pPriv->Saturation = 80;
- pPriv->Contrast = 4;
-+#if 0
- pPriv->Gamma = 0;
-+#endif
- pPriv->HUE = 0;
- pPriv->videoStatus = 0;
- pPriv->fixFrame = 100;
-@@ -371,7 +377,9 @@
- xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
- xvSaturation = MAKE_ATOM("XV_SATURATION");
- xvHUE = MAKE_ATOM("XV_HUE");
-+#if 0
- xvGamma = MAKE_ATOM("XV_GAMMA");
-+#endif
- xvContrast = MAKE_ATOM("XV_CONTRAST");
- }
-
-@@ -595,12 +603,14 @@
- pPriv->HUE = value;
- tridentSetVideoParameters(pTrident, pPriv->Brightness, pPriv->Saturation,
- pPriv->HUE);
-+#if 0
- tridentSetVideoGamma(pTrident,pPriv->Gamma,pPriv->Brightness);
- } else if (attribute == xvGamma) {
- if ((value < -128) || (value > 127))
- return BadValue;
- pPriv->Gamma = value;
- tridentSetVideoGamma(pTrident,value,pPriv->Brightness);
-+#endif
- } else if (attribute == xvContrast) {
- if ((value < 0) || (value > 127))
- return BadValue;
-@@ -629,8 +639,10 @@
- *value = pPriv->Saturation;
- } else if (attribute == xvHUE) {
- *value = pPriv->HUE;
-+#if 0
- } else if (attribute == xvGamma) {
- *value = pPriv->Gamma;
-+#endif
- } else if (attribute == xvContrast) {
- *value = pPriv->Contrast;
- } else
+++ /dev/null
---- XFree86-4.2.0/xc.old/extras/X-TrueType/xttfuncs.c Tue Dec 18 12:23:55 2001
-+++ XFree86-4.2.0/xc/extras/X-TrueType/xttfuncs.c Tue Apr 2 23:31:14 2002
-@@ -1100,7 +1100,7 @@
- char_width);
- }
-
-- if (!tmpchar->characterWidth)
-+ if (!tmpchar || !tmpchar->characterWidth)
- continue;
-
- adjust_min_max(&minchar, &maxchar, tmpchar);
# TODO:
-# - update and fix tdfx patchs
# - cleanups
# - man4/mouse from modules conflicts with man4/mouse from man-pages
# - add missing files
# - separate XFS to be standalone - is it possible without duplicated files?
# - imstt and nsc video drivers
-# _without_tdfx disables tdfx build
+#
+# Conditional build:
+# _without_tdfx - disables tdfx drivers building
+#
%define _sver %(echo %{version} | tr -d .)
License: MIT
Group: X11/XFree86
Source0: ftp://ftp.xfree86.org/pub/XFree86/4.3.0/source/X430src-1.tgz
-Source1: ftp://ftp.pld.org.pl/software/xinit/xdm-xinitrc-0.2.tar.bz2
-Source2: cvs://anonymous@cvs.gatos.sourceforge.net/cvsroot/gatos/ati.2-20021001.tar.bz2
-Source3: http://www.mif.pg.gda.pl/homepages/ankry/man-PLD/%{name}-non-english-Xman-pages.tar.bz2
+Source1: ftp://ftp.xfree86.org/pub/XFree86/4.3.0/source/X430src-2.tgz
+Source2: ftp://ftp.xfree86.org/pub/XFree86/4.3.0/source/X430src-3.tgz
+Source3: ftp://ftp.pld.org.pl/software/xinit/xdm-xinitrc-0.2.tar.bz2
Source4: xdm.pamd
Source5: xserver.pamd
Source6: xdm.init
Source35: xclock.png
Source36: oclock.png
Source37: xconsole.png
-Source38: ftp://ftp.xfree86.org/pub/XFree86/4.3.0/source/X430src-2.tgz
-Source39: ftp://ftp.xfree86.org/pub/XFree86/4.3.0/source/X430src-3.tgz
+Source38: http://www.mif.pg.gda.pl/homepages/ankry/man-PLD/%{name}-non-english-Xman-pages.tar.bz2
+Source39: cvs://anonymous@cvs.gatos.sourceforge.net/cvsroot/gatos/ati.2-20021001.tar.bz2
Patch0: %{name}-PLD.patch
Patch1: %{name}-HasZlib.patch
Patch2: %{name}-DisableDebug.patch
Patch27: %{name}-config-s3.patch
Patch28: %{name}-sparc_pci_domains.patch
Patch29: %{name}-XTerm.ad.patch
-#Patch30: %{name}-dri_directory_mode_fix.patch
-Patch31: %{name}-alpha_GLX_align_fix.patch
-#Patch32: %{name}-XftConfig_in_correct_place.patch
-Patch33: %{name}-PEX+XIE.patch
-Patch34: %{name}-xman-manpaths.patch
-#Patch36: ftp://ftp.xfree86.org/pub/XFree86/4.2.1/patches/4.2.0-4.2.1.diff.gz
-Patch37: %{name}-clearrts.patch
-#Patch38: %{name}-mga020414.patch
-#Patch39: %{name}-trident-9397.patch
-#Patch40: %{name}-4.2.0-i810-driver-update-cvs-20020617.patch.bz2
-#Patch41: %{name}-nv020414.patch
-#Patch42: %{name}-fix-07-s3trio64v2gx+netfinity.patch
-#Patch43: %{name}-prosavage.patch
-#Patch44: %{name}-xtt-null-pointer.patch
-Patch45: %{name}-i740-driver-update-cvs-20020617.patch
-#Patch46: %{name}-neomagic-Xv-support.patch
-Patch47: %{name}-tdfx-disable-dri-on-16Mb-cards-in-hires.patch
-#Patch48: %{name}-tdfx-should-be-2048-not-2046.patch
-Patch49: %{name}-tdfx-interlace.patch
-Patch50: %{name}-tdfx-fix-compiler-warnings.patch
-Patch51: %{name}-tdfx-fix-vtswitch-font-corruption.patch
-Patch52: %{name}-sis-option-swcursor.patch
-#Patch53: %{name}-sis-unresolved-symbols.patch
-Patch54: %{name}-sis-maxxfbmem-fixup.patch
-#Patch55: %{name}-Radeon9000.patch
-Patch56: %{name}-Xfont-Type1-large-DoS.patch
+Patch30: %{name}-alpha_GLX_align_fix.patch
+Patch31: %{name}-PEX+XIE.patch
+Patch32: %{name}-xman-manpaths.patch
+Patch33: %{name}-clearrts.patch
+Patch34: %{name}-fix-07-s3trio64v2gx+netfinity.patch
+Patch35: %{name}-i740-driver-update-cvs-20020617.patch
+Patch36: %{name}-tdfx-disable-dri-on-16Mb-cards-in-hires.patch
+Patch37: %{name}-tdfx-interlace.patch
+Patch38: %{name}-tdfx-fix-compiler-warnings.patch
+Patch39: %{name}-tdfx-fix-vtswitch-font-corruption.patch
+Patch40: %{name}-Xfont-Type1-large-DoS.patch
# "strip -g libGLcore.a" leaves empty objects m_debug_*.o, which cause
# warnings during GLcore loading ("m_debug_*.o: no symbols") - shut up them
-Patch57: %{name}-GLcore-strip-a-workaround.patch
-# Original from: ftp://ftp.xfree86.org/pub/XFree86/4.2.1/fixes/4.2.1-mit-shm-security.patch
-#Patch58: %{name}-4.2.1-mit-shm-security.patch
-Patch59: %{name}-disable_glide.patch
-Patch60: %{name}-expat.patch
-Patch61: %{name}-pkgconfig.patch
+Patch41: %{name}-GLcore-strip-a-workaround.patch
+Patch42: %{name}-disable_glide.patch
+Patch43: %{name}-expat.patch
+Patch44: %{name}-pkgconfig.patch
BuildRequires: bison
BuildRequires: expat-devel
BuildRequires: flex
%define _icondir /usr/share/icons
%define _pixmapsdir /usr/share/pixmaps
%define _soundsdir /usr/share/sounds
+%define _themesdir /usr/share/themes
%define _wmpropsdir /usr/share/wm-properties
# avoid Mesa dependency in XFree86-OpenGL-libs
%description driver-i810 -l pl
Sterownik do grafiki na uk³adach Intel i810/i815/i830.
+%package driver-imstt
+Summary: Integrated Micro Solutions Twin Turbo 128 driver
+Summary(pl): Sterownik do kart Integrated Micro Solutions Twin Turbo 128
+Group: X11/XFree86
+Requires: %{name}-modules = %{version}-%{release}
+Requires: %{name}-Xserver = %{version}-%{release}
+
+%description driver-imstt
+Integrated Micro Solutions Twin Turbo 128 driver.
+
+%description driver-imstt -l pl
+Sterownik do kart Integrated Micro Solutions Twin Turbo 128.
+
%package driver-mga
Summary: Matrox video driver
Summary(pl): Sterownik do kart Matrox
%description driver-neomagic -l pl
Sterownik do kart NeoMagic.
+%package driver-newport
+Summary: Newport (XL) adapters video driver
+Summary(pl): Sterownik do kart Newport (XL)
+Group: X11/XFree86
+Requires: %{name}-modules = %{version}-%{release}
+Requires: %{name}-Xserver = %{version}-%{release}
+
+%description driver-newport
+Newport (XL) adapters video driver (found primarily in SGI Indy and
+Indigo2 machines).
+
+%description driver-newport -l pl
+Sterownik do kart Newport (XL) (wystêpuj±cych g³ównie w komputerach
+SGI Indy i Indigo).
+
+%package driver-nsc
+Summary: National Semiconductors GEODE family video driver
+Summary(pl): Sterownik dla kart na uk³adach z rodziny GEODE firmy National Semiconductors
+Group: X11/XFree86
+Requires: %{name}-modules = %{version}-%{release}
+Requires: %{name}-Xserver = %{version}-%{release}
+
+%description driver-nsc
+National Semiconductors GEODE family video driver. Supports GXLV (5530
+companion chip), SC1200, SC1400 and GX2 (5535 companion chip).
+
+%description driver-nsc -l pl
+Sterownik dla kart na uk³adach z rodziny GEODE firmy National
+Semiconductors. Obs³uguje GXLV (uk³ad towarzysz±cy 5530), SC1200,
+SC1400 oraz GX2 (uk³ad towarzysz±cy 5535).
+
%package driver-nv
Summary: nVidia video driver
Summary(pl): Sterownik do kart na uk³adach firmy nVidia
#--- %prep ---------------------------
%prep
-%setup -q -c -a1 -b38 -b39
+%setup -q -c -b1 -b2 -a3
%patch0 -p0
%patch1 -p1
%patch2 -p1
#%patch28 -p1 -- needs update
%endif
%patch29 -p0
-#%patch30 -p1 -- obsoleted
-%patch31 -p1
-#%patch32 -p1 --obsoleted
-%patch33 -p0
-%patch34 -p1
-#%%{?_without_tdfx:%patch35}
-#%patch36 -p0 --obsoleted
-%patch37 -p1
-#%patch38 -p1 -- obsoleted
-#%patch39 -p1 -- obsoleted
-#%patch40 -p0 -- obsoleted
-#%patch41 -p1 -- obsoleted
-#%patch42 -p1 -- obsoleted (only partially???)
-#%patch43 -p1 -- obsoleted
-#%patch44 -p1 -- obsoleted
-#%patch45 -p1 -- obsoleted? (but doesn't look to be applied)
-#%patch46 -p1 -- obsoleted
-%{!?_without_tdfx:%patch47 -p0}
-#%patch48 -p0 -- obsoleted
-%{!?_without_tdfx:%patch49 -p1}
-#%patch50 -p0 -- causing problems IIRC (but not really needed)
-%{!?_without_tdfx:%patch51 -p0}
-#%patch52 -p1 -- probably not needed
-#%patch53 -p1 -- obsoleted
-#%patch54 -p1 -- obsoleted? (code looks very different)
-#%patch55 -p0 -- obsoleted
-%patch56 -p1
-%{!?debug:%patch57 -p1}
-#%patch58 -p0 --obsoleted
-%{?_without_tdfx:%patch59 -p0}
-%patch60 -p0
-%patch61 -p0
+%patch30 -p1
+%patch31 -p0
+%patch32 -p1
+%patch33 -p1
+#%patch34 -p1 -- seems not applied (was partially in rc1??? maybe another fix present?)
+#%patch35 -p1 -- obsoleted? (but doesn't look to be applied)
+%{!?_without_tdfx:%patch36 -p0}
+%{!?_without_tdfx:%patch37 -p1}
+#%patch38 -p0 -- causing problems IIRC (but not really needed)
+%{!?_without_tdfx:%patch39 -p0}
+%patch40 -p1
+%{!?debug:%patch41 -p1}
+%{?_without_tdfx:%patch42 -p0}
+%patch43 -p0
+%patch44 -p0
rm -f xc/config/cf/host.def
# New ATI drivers
# cd xc/programs/Xserver/hw/xfree86/drivers
-#%bzcat %{SOURCE2} | tar x
+#%bzcat %{SOURCE39} | tar x
# ati.2 directory
#--- %build --------------------------
$RPM_BUILD_ROOT/usr/{bin,include,lib} \
$RPM_BUILD_ROOT/var/{log,lib/xkb} \
$RPM_BUILD_ROOT%{_applnkdir}/{Amusements,Editors,Utilities,Terminals} \
- $RPM_BUILD_ROOT{%{_pixmapsdir}/mini,%{_wmpropsdir},%{_soundsdir}}
+ $RPM_BUILD_ROOT{%{_pixmapsdir}/mini,%{_wmpropsdir},%{_soundsdir},%{_themesdir}/Default}
%{__make} -C xc "DESTDIR=$RPM_BUILD_ROOT" \
"DOCDIR=/usr/share/doc/%{name}-%{version}" \
%{SOURCE36} %{SOURCE37} \
$RPM_BUILD_ROOT%{_pixmapsdir}
-bzip2 -dc %{SOURCE3} | tar xf - -C $RPM_BUILD_ROOT%{_mandir}
+bzip2 -dc %{SOURCE38} | tar xf - -C $RPM_BUILD_ROOT%{_mandir}
> $RPM_BUILD_ROOT/etc/security/console.apps/xserver
> $RPM_BUILD_ROOT/etc/security/blacklist.xserver
rm -rf $RPM_BUILD_ROOT/usr/share/doc/%{name}-%{version}/html
+# resolve conflict with man-pages
+mv -f $RPM_BUILD_ROOT%{_mandir}/man4/{mouse.4,mouse-x.4}
+
# directories for applications locales
echo '%defattr(644,root,root,755)' > XFree86-libs.lang
for lang in af az bg bg_BG.cp1251 br ca cs da de el en_GB eo es et eu fi \
%{_mandir}/man3/[A-EH-Z]*
%exclude %{_mandir}/man3/Xft.3*
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86}
%files driver-apm
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/apm_drv.o
%{_mandir}/man4/apm*
%endif
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86}
%files driver-ark
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/ark_drv.o
%endif
-%ifnarch sparc sparc64 alpha
+# Devel: sparc sparc64
+%ifarch %{ix86} mips ppc arm
%files driver-chips
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/chips_drv.o
%{_mandir}/man4/chips*
%endif
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86} alpha
%files driver-cirrus
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/cirrus_*.o
%{_mandir}/man4/cirrus*
%endif
-%ifnarch sparc sparc64 alpha ppc
+%ifarch %{ix86}
%files driver-cyrix
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/cyrix_drv.o
%{_mandir}/man4/cyrix*
%endif
-%ifnarch alpha
+%ifarch %{ix86} sparc sparc64 mips ppc arm superh
%files driver-fbdev
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/fbdev_drv.o
%{_mandir}/man4/fbdev*
%endif
-%ifnarch sparc sparc64 alpha ppc
+%ifarch %{ix86}
%{!?_without_tdfx:%files driver-glide}
%{!?_without_tdfx:%defattr(644,root,root,755)}
%{!?_without_tdfx:%attr(755,root,root) %{_libdir}/modules/drivers/glide_drv.o}
%files driver-glint
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/glint_drv.o
-%ifnarch sparc sparc64
+%ifarch %{ix86} alpha ppc arm
%attr(755,root,root) %{_libdir}/modules/dri/gamma_dri.so
%endif
%{_mandir}/man4/glint*
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86}
%files driver-i128
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/i128_drv.o
%{_mandir}/man4/i128*
%endif
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86}
%files driver-i740
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/i740_drv.o
%{_mandir}/man4/i740*
%endif
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86}
%files driver-i810
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/i810_drv.o
%{_mandir}/man4/i810*
%endif
-%ifnarch sparc sparc64
+# Devel: %{ix86} sparc sparc64 ppc
+%if 0
+%files driver-imstt
+%defattr(644,root,root,755)
+%attr(755,root,root) %{_libdir}/modules/drivers/imstt_drv.o
+%{_mandir}/man4/imstt.4*
+%endif
+
+%ifarch %{ix86} sparc sparc64 mips alpha ppc arm
%files driver-mga
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/mga_drv.o
+%ifarch %{ix86} alpha ppc arm
%attr(755,root,root) %{_libdir}/modules/dri/mga_dri.so
+%endif
%{_mandir}/man4/mga*
%endif
-%ifnarch sparc sparc64 alpha ppc
+# Devel: sparc sparc64
+%ifarch %{ix86}
%files driver-neomagic
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/neomagic_drv.o
%{_mandir}/man4/neomagic*
%endif
-%ifnarch sparc sparc64 ppc
+# Devel: %{ix86} sparc sparc64
+%ifarch mips
+%files driver-newport
+%defattr(644,root,root,755)
+%attr(755,root,root) %{_libdir}/modules/drivers/newport_drv.o
+%{_mandir}/man4/newport.4*
+%endif
+
+%ifarch %{ix86}
+%files driver-nsc
+%defattr(644,root,root,755)
+%attr(755,root,root) %{_libdir}/modules/drivers/nsc_drv.o
+%{_mandir}/man4/nsc.4*
+%endif
+
+# Devel: sparc sparc64
+%ifarch %{ix86} mips alpha arm
%files driver-nv
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/nv_drv.o
%{_mandir}/man4/nv*
%endif
-
%files driver-ati
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/ati*_drv.o
%files driver-r128
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/r128*_drv.o
-%ifnarch sparc sparc64
+%ifarch %{ix86} alpha ppc arm
%attr(755,root,root) %{_libdir}/modules/dri/r128_dri.so
%endif
%{_mandir}/man4/r128*
%files driver-radeon
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/radeon*_drv.o
-%ifnarch sparc sparc64
+%ifarch %{ix86} alpha ppc arm
%attr(755,root,root) %{_libdir}/modules/dri/radeon_dri.so
%attr(755,root,root) %{_libdir}/modules/dri/r200_dri.so
%endif
#%endif
%endif
-%ifnarch sparc sparc64 ppc
+# Devel: sparc sparc64
+%ifarch %{ix86} alpha
%files driver-rendition
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/rendition_drv.o
%{_mandir}/man4/rendition*
%endif
-%ifnarch sparc sparc64
+# Devel: sparc sparc64
+%ifarch %{ix86} mips alpha ppc arm
%files driver-s3virge
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/s3virge_drv.o
%{_mandir}/man4/s3virge*
%endif
-%ifnarch sparc sparc64
+%ifarch %{ix86} mips alpha ppc arm
%files driver-s3
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/s3_drv.o
-#%%{_mandir}/man4/s3*
+#%%{_mandir}/man4/s3.4*
%endif
-%ifnarch sparc sparc64
+# Devel: sparc sparc64
+%ifarch %{ix86} mips alpha ppc arm
%files driver-savage
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/savage_drv.o
%{_mandir}/man4/savage*
%endif
-%ifnarch sparc sparc64 ppc
+# Devel: sparc sparc64
+%ifarch %{ix86} alpha
%files driver-siliconmotion
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/siliconmotion_drv.o
%{_mandir}/man4/siliconmotion*
%endif
-%ifnarch sparc sparc64 alpha
+%ifarch %{ix86} mips ppc arm
%files driver-sis
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/sis_drv.o
-%ifnarch ppc
+%ifarch %{ix86}
#%attr(755,root,root) %{_libdir}/modules/dri/sis_dri.so
%endif
%{_mandir}/man4/sis*
%{_mandir}/man4/suntcx*
%endif
-%ifnarch sparc sparc64 ppc
+%ifarch %{ix86} sparc sparc64 mips alpha arm
%{!?_without_tdfx:%files driver-tdfx}
%{!?_without_tdfx:%defattr(644,root,root,755)}
%{!?_without_tdfx:%attr(755,root,root) %{_libdir}/modules/drivers/tdfx_drv.o}
+%ifarch %{ix86} alpha arm
%{!?_without_tdfx:%attr(755,root,root) %{_libdir}/modules/dri/tdfx_dri.so}
+%endif
%{!?_without_tdfx:%{_mandir}/man4/tdfx*}
%endif
-%ifnarch sparc sparc64 ppc
+# Devel: sparc sparc64
+%ifarch %{ix86} alpha
%files driver-tga
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/tga_drv.o
%endif
-%ifnarch sparc sparc64 alpha
+# Devel: sparc sparc64
+%ifarch %{ix86} mips ppc arm
%files driver-trident
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/trident_drv.o
%{_mandir}/man4/trident*
%endif
-%ifnarch sparc sparc64 alpha ppc
+%ifarch %{ix86}
%files driver-tseng
%defattr(644,root,root,755)
%attr(755,root,root) %{_libdir}/modules/drivers/tseng_drv.o
%{_mandir}/man4/tseng*
%endif
+# Devel: sparc sparc64
%ifarch %{ix86}
%files driver-vmware
%defattr(644,root,root,755)
%files libs -f XFree86-libs.lang
%defattr(644,root,root,755)
-%dir /usr/share/themes
-%dir /usr/share/themes/Default
+%dir %{_themesdir}
+%dir %{_themesdir}/Default
%{_libdir}/X11/XErrorDB
%{_libdir}/X11/XKeysymDB
%dir %{_libdir}/X11/app-defaults
%attr(755,root,root) %{_libdir}/modules/*.a
%attr(755,root,root) %{_libdir}/modules/codeconv
%attr(755,root,root) %{_libdir}/modules/drivers/linux
-%ifnarch sparc sparc64
+%ifarch %{ix86} sparc sparc64 alpha ppc arm
%attr(755,root,root) %{_libdir}/modules/drivers/vga_drv.o
-%ifnarch alpha ppc
-%attr(755,root,root) %{_libdir}/modules/drivers/vesa_drv.o
%endif
+%ifarch %{ix86} sparc sparc64
+%attr(755,root,root) %{_libdir}/modules/drivers/vesa_drv.o
%endif
%dir %{_libdir}/modules/extensions
%attr(755,root,root) %{_libdir}/modules/extensions/libdbe.a
%{_mandir}/man4/citron*
%{_mandir}/man4/dmc.4*
%{_mandir}/man4/dynapro*
+%{_mandir}/man4/fpit.4*
+%{_mandir}/man4/js_x.4*
+%{_mandir}/man4/kbd.4*
%{_mandir}/man4/keyboard*
%{_mandir}/man4/microtouch*
-#%%{_mandir}/man4/mouse* - conflicts with man-pages - fixme
+%{_mandir}/man4/mouse-x.4*
+%{_mandir}/man4/palmax.4*
%{_mandir}/man4/penmount.4*
+%{_mandir}/man4/tek4957.4*
%{_mandir}/man4/v4l*
-%ifnarch sparc sparc64
+%ifarch %{ix86} sparc sparc64 alpha ppc arm
%{_mandir}/man4/vga*
-%ifnarch alpha ppc
-%{_mandir}/man4/vesa*
%endif
+%ifarch %{ix86} sparc sparc64
+%{_mandir}/man4/vesa*
%endif
%{_mandir}/man4/void*
%{_mandir}/man4/wacom*
projects / packages / XFree86.git / commitdiff