X-Git-Url: http://git.pld-linux.org/?a=blobdiff_plain;f=crossm68k-gcc-idshlib.patch;fp=crossm68k-gcc-idshlib.patch;h=303396ab9c534cbf71ebeb59133c14ac39d39287;hb=1b8f31c8b1d8f68f39d532bf95ec9374da716842;hp=0000000000000000000000000000000000000000;hpb=88a9c143297b12948c60c8f930535ec126dc5a85;p=packages%2Fcrossm68k-gcc.git diff --git a/crossm68k-gcc-idshlib.patch b/crossm68k-gcc-idshlib.patch new file mode 100644 index 0000000..303396a --- /dev/null +++ b/crossm68k-gcc-idshlib.patch @@ -0,0 +1,884 @@ +diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/lb1sf68.asm gcc-3.3.1-20030720/gcc/config/m68k/lb1sf68.asm +--- gcc-3.3.1-20030720.orig/gcc/config/m68k/lb1sf68.asm 2003-07-26 03:15:35.000000000 +0200 ++++ gcc-3.3.1-20030720/gcc/config/m68k/lb1sf68.asm 2003-07-25 18:08:09.000000000 +0200 +@@ -86,6 +86,36 @@ + #define a6 REG (a6) + #define fp REG (fp) + #define sp REG (sp) ++#define pc REG (pc) ++ ++/* Provide a few macros to allow for PIC code support. ++ * With PIC, data is stored A5 relative so we've got to take a bit of special ++ * care to ensure that all loads of global data is via A5. PIC also requires ++ * jumps and subroutine calls to be PC relative rather than absolute. We cheat ++ * a little on this and in the PIC case, we use short offset branches and ++ * hope that the final object code is within range (which it should be). ++ */ ++#ifndef __PIC__ ++/* Non pic (absolute/relocatable) versions */ ++#define LEA(sym,reg) lea sym, reg ++#define PEA(sym,areg) pea sym ++#define CALL(addr) jbsr addr ++#define JUMP(addr) jmp addr ++#else ++#ifdef __ID_SHARED_LIBRARY__ ++/* shared library version */ ++#define LEA(sym,reg) movel a5@(_current_shared_library_a5_offset_), reg; \ ++ movel CONCAT1(sym, @GOT(reg)), reg ++#define PEA(sym,areg) movel a5@(_current_shared_library_a5_offset_), areg; \ ++ movel CONCAT1(sym, @GOT(areg)), sp@- ++#else ++/* msep-data version */ ++#define LEA(sym,reg) movel CONCAT1(sym, @GOT(a5)), reg ++#define PEA(sym,areg) movel CONCAT1(sym, @GOT(a5)), sp@- ++#endif ++#define CALL(addr) bsr addr ++#define JUMP(addr) bra addr ++#endif + + #ifdef L_floatex + +@@ -213,7 +243,7 @@ + + | void __clear_sticky_bits(void); + SYM (__clear_sticky_bit): +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + #ifndef __mcoldfire__ + movew IMM (0),a0@(STICK) + #else +@@ -246,7 +276,7 @@ + FPTRAP = 15 + + $_exception_handler: +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew d7,a0@(EBITS) | set __exception_bits + #ifndef __mcoldfire__ + orw d7,a0@(STICK) | and __sticky_bits +@@ -282,7 +312,7 @@ + andl d6,d7 + #endif + beq 1f | no, exit +- pea SYM (_fpCCR) | yes, push address of _fpCCR ++ PEA( SYM (_fpCCR),a1)| yes, push address of _fpCCR + trap IMM (FPTRAP) | and trap + #ifndef __mcoldfire__ + 1: moveml sp@+,d2-d7 | restore data registers +@@ -421,7 +451,7 @@ + + L2: movel d1, sp@- + movel d0, sp@- +- jbsr SYM (__udivsi3) /* divide abs(dividend) by abs(divisor) */ ++ CALL( SYM (__udivsi3))/* divide abs(dividend) by abs(divisor) */ + addql IMM (8), sp + + tstb d2 +@@ -441,13 +471,13 @@ + movel sp@(4), d0 /* d0 = dividend */ + movel d1, sp@- + movel d0, sp@- +- jbsr SYM (__udivsi3) ++ CALL( SYM (__udivsi3)) + addql IMM (8), sp + movel sp@(8), d1 /* d1 = divisor */ + #ifndef __mcoldfire__ + movel d1, sp@- + movel d0, sp@- +- jbsr SYM (__mulsi3) /* d0 = (a/b)*b */ ++ CALL( SYM (__mulsi3)) /* d0 = (a/b)*b */ + addql IMM (8), sp + #else + mulsl d1,d0 +@@ -467,13 +497,13 @@ + movel sp@(4), d0 /* d0 = dividend */ + movel d1, sp@- + movel d0, sp@- +- jbsr SYM (__divsi3) ++ CALL( SYM (__divsi3)) + addql IMM (8), sp + movel sp@(8), d1 /* d1 = divisor */ + #ifndef __mcoldfire__ + movel d1, sp@- + movel d0, sp@- +- jbsr SYM (__mulsi3) /* d0 = (a/b)*b */ ++ CALL( SYM (__mulsi3)) /* d0 = (a/b)*b */ + addql IMM (8), sp + #else + mulsl d1,d0 +@@ -540,7 +570,7 @@ + orl d7,d0 + movew IMM (INEXACT_RESULT+UNDERFLOW),d7 + moveq IMM (DOUBLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Ld$infty: + Ld$overflow: +@@ -550,7 +580,7 @@ + orl d7,d0 + movew IMM (INEXACT_RESULT+OVERFLOW),d7 + moveq IMM (DOUBLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Ld$underflow: + | Return 0 and set the exception flags +@@ -558,7 +588,7 @@ + movel d0,d1 + movew IMM (INEXACT_RESULT+UNDERFLOW),d7 + moveq IMM (DOUBLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Ld$inop: + | Return a quiet NaN and set the exception flags +@@ -566,7 +596,7 @@ + movel d0,d1 + movew IMM (INEXACT_RESULT+INVALID_OPERATION),d7 + moveq IMM (DOUBLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Ld$div$0: + | Return a properly signed INFINITY and set the exception flags +@@ -575,7 +605,7 @@ + orl d7,d0 + movew IMM (INEXACT_RESULT+DIVIDE_BY_ZERO),d7 + moveq IMM (DOUBLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + |============================================================================= + |============================================================================= +@@ -1015,8 +1045,8 @@ + addl IMM (1),d4 + #endif + 1: +- lea Ladddf$5,a0 | to return from rounding routine +- lea SYM (_fpCCR),a1 | check the rounding mode ++ lea pc@(Ladddf$5),a0 | to return from rounding routine ++ LEA( SYM (_fpCCR),a1)| check the rounding mode + #ifdef __mcoldfire__ + clrl d6 + #endif +@@ -1123,8 +1153,8 @@ + addl IMM (1),d4 + #endif + 1: +- lea Lsubdf$1,a0 | to return from rounding routine +- lea SYM (_fpCCR),a1 | check the rounding mode ++ lea pc@(Lsubdf$1),a0 | to return from rounding routine ++ LEA( SYM (_fpCCR),a1)| check the rounding mode + #ifdef __mcoldfire__ + clrl d6 + #endif +@@ -1168,7 +1198,7 @@ + #endif + movel a6@(16),d0 + movel a6@(20),d1 +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | restore data registers +@@ -1190,7 +1220,7 @@ + #endif + movel a6@(8),d0 + movel a6@(12),d1 +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | restore data registers +@@ -1248,7 +1278,7 @@ + + Ladddf$ret: + | Normal exit. +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + orl d7,d0 | put sign bit back + #ifndef __mcoldfire__ +@@ -1610,7 +1640,7 @@ + bclr IMM (31),d2 | clear sign bit + 1: cmpl IMM (0x7ff00000),d2 | check for non-finiteness + bge Ld$inop | in case NaN or +/-INFINITY return NaN +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 +@@ -1895,7 +1925,7 @@ + bne Ld$inop | + 1: movel IMM (0),d0 | else return zero + movel d0,d1 | +- lea SYM (_fpCCR),a0 | clear exception flags ++ LEA( SYM (_fpCCR),a0)| clear exception flags + movew IMM (0),a0@ | + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | +@@ -2035,8 +2065,8 @@ + orl d7,d3 | the bits which were flushed right + movel a0,d7 | get back sign bit into d7 + | Now call the rounding routine (which takes care of denormalized numbers): +- lea Lround$0,a0 | to return from rounding routine +- lea SYM (_fpCCR),a1 | check the rounding mode ++ lea pc@(Lround$0),a0 | to return from rounding routine ++ LEA( SYM (_fpCCR),a1)| check the rounding mode + #ifdef __mcoldfire__ + clrl d6 + #endif +@@ -2084,7 +2114,7 @@ + swap d0 | + orl d7,d0 | and sign also + +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 +@@ -2126,7 +2156,7 @@ + movel d0,d7 | else get sign and return INFINITY + andl IMM (0x80000000),d7 + bra Ld$infty +-1: lea SYM (_fpCCR),a0 ++1: LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 +@@ -2424,7 +2454,7 @@ + orl d7,d0 + movew IMM (INEXACT_RESULT+UNDERFLOW),d7 + moveq IMM (SINGLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Lf$infty: + Lf$overflow: +@@ -2433,21 +2463,21 @@ + orl d7,d0 + movew IMM (INEXACT_RESULT+OVERFLOW),d7 + moveq IMM (SINGLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Lf$underflow: + | Return 0 and set the exception flags + movel IMM (0),d0 + movew IMM (INEXACT_RESULT+UNDERFLOW),d7 + moveq IMM (SINGLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Lf$inop: + | Return a quiet NaN and set the exception flags + movel IMM (QUIET_NaN),d0 + movew IMM (INEXACT_RESULT+INVALID_OPERATION),d7 + moveq IMM (SINGLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + Lf$div$0: + | Return a properly signed INFINITY and set the exception flags +@@ -2455,7 +2485,7 @@ + orl d7,d0 + movew IMM (INEXACT_RESULT+DIVIDE_BY_ZERO),d7 + moveq IMM (SINGLE_FLOAT),d6 +- jmp $_exception_handler ++ JUMP( $_exception_handler) + + |============================================================================= + |============================================================================= +@@ -2737,8 +2767,8 @@ + #endif + addl IMM (1),d2 + 1: +- lea Laddsf$4,a0 | to return from rounding routine +- lea SYM (_fpCCR),a1 | check the rounding mode ++ lea pc@(Laddsf$4),a0 | to return from rounding routine ++ LEA( SYM (_fpCCR),a1)| check the rounding mode + #ifdef __mcoldfire__ + clrl d6 + #endif +@@ -2802,8 +2832,8 @@ + | Note that we do not have to normalize, since in the subtraction bit + | #FLT_MANT_DIG+1 is never set, and denormalized numbers are handled by + | the rounding routines themselves. +- lea Lsubsf$1,a0 | to return from rounding routine +- lea SYM (_fpCCR),a1 | check the rounding mode ++ lea pc@(Lsubsf$1),a0 | to return from rounding routine ++ LEA( SYM (_fpCCR),a1)| check the rounding mode + #ifdef __mcoldfire__ + clrl d6 + #endif +@@ -2834,7 +2864,7 @@ + | check for finiteness or zero). + Laddsf$a$small: + movel a6@(12),d0 +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | restore data registers +@@ -2848,7 +2878,7 @@ + + Laddsf$b$small: + movel a6@(8),d0 +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | restore data registers +@@ -2905,7 +2935,7 @@ + Laddsf$ret: + | Normal exit (a and b nonzero, result is not NaN nor +/-infty). + | We have to clear the exception flags (just the exception type). +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + orl d7,d0 | put sign bit + #ifndef __mcoldfire__ +@@ -3141,7 +3171,7 @@ + 1: bclr IMM (31),d1 | clear sign bit + cmpl IMM (INFINITY),d1 | and check for a large exponent + bge Lf$inop | if b is +/-INFINITY or NaN return NaN +- lea SYM (_fpCCR),a0 | else return zero ++ LEA( SYM (_fpCCR),a0)| else return zero + movew IMM (0),a0@ | + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | +@@ -3341,7 +3371,7 @@ + cmpl IMM (INFINITY),d1 | check for NaN + bhi Lf$inop | + movel IMM (0),d0 | else return zero +- lea SYM (_fpCCR),a0 | ++ LEA( SYM (_fpCCR),a0) | + movew IMM (0),a0@ | + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 | +@@ -3444,8 +3474,8 @@ + 2: orl d6,d1 | this is a trick so we don't lose ' + | the extra bits which were flushed right + | Now call the rounding routine (which takes care of denormalized numbers): +- lea Lround$0,a0 | to return from rounding routine +- lea SYM (_fpCCR),a1 | check the rounding mode ++ lea pc@(Lround$0),a0 | to return from rounding routine ++ LEA( SYM (_fpCCR),a1)| check the rounding mode + #ifdef __mcoldfire__ + clrl d6 + #endif +@@ -3493,7 +3523,7 @@ + swap d0 | + orl d7,d0 | and sign also + +- lea SYM (_fpCCR),a0 ++ LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 +@@ -3534,7 +3564,7 @@ + movel d0,d7 | else get sign and return INFINITY + andl IMM (0x80000000),d7 + bra Lf$infty +-1: lea SYM (_fpCCR),a0 ++1: LEA( SYM (_fpCCR),a0) + movew IMM (0),a0@ + #ifndef __mcoldfire__ + moveml sp@+,d2-d7 +@@ -3742,7 +3772,7 @@ + movl a6@(16),sp@- + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpdf2) ++ CALL( SYM (__cmpdf2)) + unlk a6 + rts + #endif /* L_eqdf2 */ +@@ -3757,7 +3787,7 @@ + movl a6@(16),sp@- + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpdf2) ++ CALL( SYM (__cmpdf2)) + unlk a6 + rts + #endif /* L_nedf2 */ +@@ -3772,7 +3802,7 @@ + movl a6@(16),sp@- + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpdf2) ++ CALL( SYM (__cmpdf2)) + unlk a6 + rts + #endif /* L_gtdf2 */ +@@ -3787,7 +3817,7 @@ + movl a6@(16),sp@- + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpdf2) ++ CALL( SYM (__cmpdf2)) + unlk a6 + rts + #endif /* L_gedf2 */ +@@ -3802,7 +3832,7 @@ + movl a6@(16),sp@- + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpdf2) ++ CALL( SYM (__cmpdf2)) + unlk a6 + rts + #endif /* L_ltdf2 */ +@@ -3817,7 +3847,7 @@ + movl a6@(16),sp@- + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpdf2) ++ CALL( SYM (__cmpdf2)) + unlk a6 + rts + #endif /* L_ledf2 */ +@@ -3833,7 +3863,7 @@ + link a6,IMM (0) + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpsf2) ++ CALL( SYM (__cmpsf2)) + unlk a6 + rts + #endif /* L_eqsf2 */ +@@ -3846,7 +3876,7 @@ + link a6,IMM (0) + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpsf2) ++ CALL( SYM (__cmpsf2)) + unlk a6 + rts + #endif /* L_nesf2 */ +@@ -3859,7 +3889,7 @@ + link a6,IMM (0) + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpsf2) ++ CALL( SYM (__cmpsf2)) + unlk a6 + rts + #endif /* L_gtsf2 */ +@@ -3872,7 +3902,7 @@ + link a6,IMM (0) + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpsf2) ++ CALL( SYM (__cmpsf2)) + unlk a6 + rts + #endif /* L_gesf2 */ +@@ -3885,7 +3915,7 @@ + link a6,IMM (0) + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpsf2) ++ CALL( SYM (__cmpsf2)) + unlk a6 + rts + #endif /* L_ltsf2 */ +@@ -3898,7 +3928,7 @@ + link a6,IMM (0) + movl a6@(12),sp@- + movl a6@(8),sp@- +- jbsr SYM (__cmpsf2) ++ CALL( SYM (__cmpsf2)) + unlk a6 + rts + #endif /* L_lesf2 */ +diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k-none.h gcc-3.3.1-20030720/gcc/config/m68k/m68k-none.h +--- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k-none.h 2003-07-26 03:15:35.000000000 +0200 ++++ gcc-3.3.1-20030720/gcc/config/m68k/m68k-none.h 2003-07-25 18:08:09.000000000 +0200 +@@ -145,6 +145,7 @@ + %{m5307:-D__mcoldfire__ -D__mcf5300__ -D__mcf5300 -D__mcf5307__ -D__mcf5307 } \ + %{m5407:-D__mcoldfire__ -D__mcf5400__ -D__mcf5400 -D__mcf5407__ -D__mcf5407 } \ + %{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32: %{!m68332:%{!m5200:%{!m5206e:%{!m528x:%{!m5307:%{!m5407:%(cpp_cpu_default)}}}}}}}}}}}}}}}}}} \ ++%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{msep-data:-D__PIC__ -D__pic__} %{mid-shared-library:-D__PIC__ -D__pic__ -D__ID_SHARED_LIBRARY__} \ + %(cpp_subtarget) \ + " + +@@ -153,6 +154,7 @@ + #undef ASM_SPEC + #define ASM_SPEC "\ + %{m68851}%{mno-68851}%{m68881}%{mno-68881}%{msoft-float:-mno-68881 }%{m68000}%{m68302}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}%{m68040}%{m68020-40:-mc68040 }%{m68020-60:-mc68040 }%{m68060}%{mcpu32}%{m68332}%{m5200}%{m5206e}%{m528x}%{m5307}%{m5407}%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32:%{!m68332:%{!m5200:%{!m5206e:%{!m528x:%{!m5307:%{!m5407:%(asm_cpu_default) }}}}}}}}}}}}}}}}}} \ ++%{fPIC:--pcrel} %{fpic:--pcrel} %{msep-data:--pcrel} %{mid-shared-library:--pcrel} \ + " + + /* cc1/cc1plus always receives all the -m flags. If the specs strings above +diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.c gcc-3.3.1-20030720/gcc/config/m68k/m68k.c +--- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.c 2003-07-26 03:15:35.000000000 +0200 ++++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.c 2003-07-26 03:12:54.000000000 +0200 +@@ -120,6 +120,8 @@ + const char *m68k_align_jumps_string; + /* Specify power of two alignment used for functions. */ + const char *m68k_align_funcs_string; ++/* Specified the identification number of the library being built */ ++const char *m68k_library_id_string; + + /* Specify power of two alignment used for loops. */ + int m68k_align_loops; +@@ -127,6 +129,8 @@ + int m68k_align_jumps; + /* Specify power of two alignment used for functions. */ + int m68k_align_funcs; ++/* Specify library identification number */ ++int m68k_library_id; + + /* Nonzero if the last compare/test insn had FP operands. The + sCC expanders peek at this to determine what to do for the +@@ -206,6 +210,32 @@ + m68k_align_loops = i; + } + ++ /* Library identification */ ++ if (m68k_library_id_string) ++ { ++ if (! TARGET_ID_SHARED_LIBRARY) ++ error ("-mshared-library-id= specified without -mid-shared-library"); ++ m68k_library_id = atoi (m68k_library_id_string); ++ if (m68k_library_id < 0 || m68k_library_id > MAX_LIBRARY_ID) ++ error ("-mshared-library-id=%d is not between 0 and %d", ++ m68k_library_id, MAX_LIBRARY_ID); ++ } ++ else ++ m68k_library_id = -1; ++ ++ /* Sanity check to ensure that msep-data and mid-sahred-library are not ++ * both specified together. Doing so simply doesn't make sense. ++ */ ++ if (TARGET_SEP_DATA && TARGET_ID_SHARED_LIBRARY) ++ error ("cannot specify both -msep-data and -mid-shared-library"); ++ ++ /* If we're generating code for a separate A5 relative data segment, ++ * we've got to enable -fPIC as well. This might be relaxable to ++ * -fpic but it hasn't been tested properly. ++ */ ++ if (TARGET_SEP_DATA || TARGET_ID_SHARED_LIBRARY) ++ flag_pic = 2; ++ + /* Validate -malign-jumps= value, or provide default */ + m68k_align_jumps = def_align; + if (m68k_align_jumps_string) +@@ -231,7 +261,7 @@ + + /* -fPIC uses 32-bit pc-relative displacements, which don't exist + until the 68020. */ +- if (! TARGET_68020 && flag_pic == 2) ++ if (!TARGET_68020 && !TARGET_COLDFIRE && (flag_pic == 2)) + error("-fPIC is not currently supported on the 68000 or 68010\n"); + + /* ??? A historic way of turning on pic, or is this intended to +@@ -833,18 +863,39 @@ + -cfa_store_offset + n_regs++ * 4); + } + } +- if (flag_pic && current_function_uses_pic_offset_table) ++ if (! TARGET_SEP_DATA && flag_pic && ++ (current_function_uses_pic_offset_table || ++ ( ! current_function_is_leaf && TARGET_ID_SHARED_LIBRARY))) + { ++ if (! TARGET_ID_SHARED_LIBRARY) ++ { + #ifdef MOTOROLA +- asm_fprintf (stream, "\t%Olea (%Rpc, %U_GLOBAL_OFFSET_TABLE_@GOTPC), %s\n", +- reg_names[PIC_OFFSET_TABLE_REGNUM]); ++ asm_fprintf (stream, "\t%Olea (%Rpc, %U_GLOBAL_OFFSET_TABLE_@GOTPC), %s\n", ++ reg_names[PIC_OFFSET_TABLE_REGNUM]); + #else +- asm_fprintf (stream, "\tmovel %0I__GLOBAL_OFFSET_TABLE_, %s\n", +- reg_names[PIC_OFFSET_TABLE_REGNUM]); +- asm_fprintf (stream, "\tlea %Rpc@(0,%s:l),%s\n", +- reg_names[PIC_OFFSET_TABLE_REGNUM], +- reg_names[PIC_OFFSET_TABLE_REGNUM]); ++ asm_fprintf (stream, "\tmovel %0I__GLOBAL_OFFSET_TABLE_, %s\n", ++ reg_names[PIC_OFFSET_TABLE_REGNUM]); ++ asm_fprintf (stream, "\tlea %Rpc@(0,%s:l),%s\n", ++ reg_names[PIC_OFFSET_TABLE_REGNUM], ++ reg_names[PIC_OFFSET_TABLE_REGNUM]); + #endif ++ } ++ else ++ { ++ if (m68k_library_id > 0) ++ { ++ asm_fprintf (stream, "\tmovel %s@(%d), %s\n", ++ reg_names[PIC_OFFSET_TABLE_REGNUM], ++ m68k_library_id * -4 - 4, ++ reg_names[PIC_OFFSET_TABLE_REGNUM]); ++ } ++ else ++ { ++ asm_fprintf (stream, "\tmovel %s@(_current_shared_library_a5_offset_), %s\n", ++ reg_names[PIC_OFFSET_TABLE_REGNUM], ++ reg_names[PIC_OFFSET_TABLE_REGNUM]); ++ } ++ } + } + } + #endif /* !CRDS */ +diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.h gcc-3.3.1-20030720/gcc/config/m68k/m68k.h +--- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.h 2003-07-26 03:15:35.000000000 +0200 ++++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.h 2003-07-26 03:12:31.000000000 +0200 +@@ -167,6 +167,18 @@ + #define MASK_528x 0x80000 + #define TARGET_528x (target_flags & MASK_528x) + ++/* Support A5 relative data seperate from text. ++ * This option implies -fPIC, however it inhibits the generation of the ++ * A5 save/restore in functions and the loading of a5 with a got pointer. ++ */ ++#define MASK_SEP_DATA 0x100000 ++#define TARGET_SEP_DATA (target_flags & MASK_SEP_DATA) ++ ++/* Compile using library ID based shared libraries. ++ * Set a specific ID using the -mshared-library-id=xxx option. ++ */ ++#define MASK_ID_SHARED_LIBRARY 0x200000 ++#define TARGET_ID_SHARED_LIBRARY (target_flags & MASK_ID_SHARED_LIBRARY) + + /* Is the target a coldfire */ + #define MASK_COLDFIRE (MASK_5200|MASK_528x|MASK_CFV3|MASK_CFV4) +@@ -279,6 +291,22 @@ + N_("Align variables on a 32-bit boundary") }, \ + { "no-align-int", -MASK_ALIGN_INT, \ + N_("Align variables on a 16-bit boundary") }, \ ++ { "sep-data", MASK_SEP_DATA, \ ++ N_("Enable separate data segment") }, \ ++ { "no-sep-data", -MASK_SEP_DATA, \ ++ N_("Disable separate data segment") }, \ ++ { "id-shared-library", MASK_ID_SHARED_LIBRARY, \ ++ N_("Enable ID based shared library") }, \ ++ { "no-id-shared-library", -MASK_ID_SHARED_LIBRARY, \ ++ N_("Disable ID based shared library") }, \ ++ { "hwdiv", MASK_CF_HWDIV, \ ++ N_("Use hardware divisor") }, \ ++ { "no-hwdiv", -MASK_CF_HWDIV, \ ++ N_("Don't use hardware divisor") }, \ ++ { "mac", 0, \ ++ N_("Use hardware Multiply-accumulate unit") }, \ ++ { "no-mac", 0, \ ++ N_("Don't use hardware Multiply-accumulate unit") }, \ + { "pcrel", MASK_PCREL, \ + N_("Generate pc-relative code") }, \ + { "strict-align", -MASK_NO_STRICT_ALIGNMENT, \ +@@ -305,6 +333,8 @@ + N_("Jump targets are aligned to this power of 2") }, \ + { "align-functions=", &m68k_align_funcs_string, \ + N_("Function starts are aligned to this power of 2") }, \ ++ { "shared-library-id=", &m68k_library_id_string, \ ++ N_("ID of shared library to build") }, \ + SUBTARGET_OPTIONS \ + } + +@@ -381,6 +411,9 @@ + /* Maximum power of 2 that code can be aligned to. */ + #define MAX_CODE_ALIGN 2 /* 4 byte alignment */ + ++/* Maximum number of library ids we permit */ ++#define MAX_LIBRARY_ID 255 ++ + /* Align loop starts for optimal branching. */ + #define LOOP_ALIGN(LABEL) (m68k_align_loops) + +@@ -1600,9 +1633,10 @@ + relative to an average of the time for add and the time for shift, + taking away a little more because sometimes move insns are needed. */ + /* div?.w is relatively cheaper on 68000 counted in COSTS_N_INSNS terms. */ +-#define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 : 13) +-#define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 : 5) +-#define DIVW_COST (TARGET_68020 ? 27 : 12) ++#define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 : TARGET_CFV3 ? 3 : TARGET_COLDFIRE ? 10 : 13) ++#define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 : \ ++ TARGET_CFV3 ? 2 : 5) ++#define DIVW_COST (TARGET_68020 ? 27 : TARGET_CF_HWDIV ? 11 : 12) + + #define RTX_COSTS(X,CODE,OUTER_CODE) \ + case PLUS: \ +@@ -1614,15 +1648,19 @@ + && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ + && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \ + || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \ +- || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \ +- return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \ ++ || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) { \ ++ if (TARGET_COLDFIRE) \ ++ return COSTS_N_INSNS (2); \ ++ else \ ++ return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \ ++ } \ + break; \ + case ASHIFT: \ + case ASHIFTRT: \ + case LSHIFTRT: \ + if (TARGET_68060) \ + return COSTS_N_INSNS(1); \ +- if (! TARGET_68020) \ ++ if (! TARGET_68020 && ! TARGET_COLDFIRE) \ + { \ + if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ + { \ +@@ -1640,8 +1678,12 @@ + return COSTS_N_INSNS (2); /* clrw;swap */ \ + if (GET_CODE (XEXP (X, 1)) == CONST_INT \ + && !(INTVAL (XEXP (X, 1)) > 0 \ +- && INTVAL (XEXP (X, 1)) <= 8)) \ +- return COSTS_N_INSNS (3); /* lsr #i,dn */ \ ++ && INTVAL (XEXP (X, 1)) <= 8)) { \ ++ if (TARGET_COLDFIRE) \ ++ return COSTS_N_INSNS(1); \ ++ else \ ++ return COSTS_N_INSNS (3); /* lsr #i,dn */ \ ++ } \ + break; \ + case MULT: \ + if ((GET_CODE (XEXP (X, 0)) == ZERO_EXTEND \ +@@ -1658,6 +1700,8 @@ + case UMOD: \ + if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \ + return COSTS_N_INSNS (DIVW_COST); /* div.w */ \ ++ if (TARGET_CF_HWDIV) \ ++ return COSTS_N_INSNS(18); \ + return COSTS_N_INSNS (43); /* div.l */ + + /* Tell final.c how to eliminate redundant test instructions. */ +@@ -1982,10 +2026,17 @@ + + #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) + ++/* The maximum alignment which the object file format can support. */ ++#undef MAX_OFILE_ALIGNMENT ++#define MAX_OFILE_ALIGNMENT 128 ++ ++ + /* Variables in m68k.c */ + extern const char *m68k_align_loops_string; + extern const char *m68k_align_jumps_string; + extern const char *m68k_align_funcs_string; ++extern const char *m68k_library_id_string; ++extern int m68k_library_id; + extern int m68k_align_loops; + extern int m68k_align_jumps; + extern int m68k_align_funcs; +diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.md gcc-3.3.1-20030720/gcc/config/m68k/m68k.md +--- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.md 2003-07-26 03:15:35.000000000 +0200 ++++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.md 2003-07-25 23:53:50.000000000 +0200 +@@ -7372,26 +7372,31 @@ + if (GET_CODE (operands[0]) == MEM + && GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF) + { +- if (TARGET_PCREL) return \"bsr.l %o0\"; +-#ifdef MOTOROLA ++ /* We output a bsr instruction if we've using -fpic or we're building for ++ * a target that supports long branches. If we're building -fPIC on the ++ * 68000. 68010 or coldfire we're generate one of two sequences ++ * a shorter one that uses a GOT entry or a longer one that doesn't. ++ * We'll use the -Os commandline flag to decide which to generate. ++ * Both sequences take the same time to execute on the coldfire. ++ */ ++ if (TARGET_SEP_DATA || TARGET_ID_SHARED_LIBRARY) ++ return \"move.l %0@GOT(%%a5), %%a1\\n\\tjsr (%%a1)\"; ++ else if (TARGET_PCREL) ++ return \"bsr.l %o0\"; ++ else if (flag_pic == 1 || TARGET_68020) + #ifdef HPUX_ASM +- return \"bsr.l %0\"; ++ return \"bsr.l %0\"; + #else + #ifdef USE_GAS +- return \"bsr.l %0@PLTPC\"; ++ return \"bsr %0@PLTPC\"; + #else +- return \"bsr %0@PLTPC\"; +-#endif +-#endif +-#else +-#ifdef USE_GAS +- return \"bsr.l %0\"; +-#else +- /* The ',a1' is a dummy argument telling the Sun assembler we want PIC, +- GAS just plain ignores it. FIXME: not anymore, gas doesn't! */ +- return \"jbsr %0,a1\"; ++ return \"bsr.l %0@PLTPC\"; + #endif + #endif ++ else if (optimize_size) ++ return \"move.l %0@GOT(%%a5), %%a1\\n\\tjsr (%%a1)\"; ++ else ++ return \"lea %0-.-8,%%a1\;jsr 0(%%pc,%%a1)\"; + } + return \"jsr %0\"; + ") +@@ -7443,25 +7448,26 @@ + && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF) + { + if (TARGET_PCREL) return \"bsr.l %o1\"; +-#ifdef MOTOROLA ++ /* We output a bsr instruction if we've using -fpic or we're building for ++ * a target that supports long branches. If we're building -fPIC on the ++ * 68000. 68010 or coldfire we're generate one of two sequences ++ * a shorter one that uses a GOT entry or a longer one that doesn't. ++ * We'll use the -Os commandline flag to decide which to generate. ++ */ ++ if (flag_pic == 1 || TARGET_68020) + #ifdef HPUX_ASM +- return \"bsr.l %1\"; ++ return \"bsr.l %1\"; + #else + #ifdef USE_GAS +- return \"bsr.l %1@PLTPC\"; ++ return \"bsr.l %1@PLTPC\"; + #else +- return \"bsr %1@PLTPC\"; +-#endif +-#endif +-#else +-#ifdef USE_GAS +- return \"bsr.l %1\"; +-#else +- /* The ',a1' is a dummy argument telling the Sun assembler we want PIC +- GAS just plain ignores it. FIXME: Not anymore, gas doesn't! */ +- return \"jbsr %1,a1\"; ++ return \"bsr %1@PLTPC\"; + #endif + #endif ++ else if (optimize_size || TARGET_ID_SHARED_LIBRARY) ++ return \"move.l %1@GOT(%%a5), %%a1\\n\\tjsr (%%a1)\"; ++ else ++ return \"lea %1-.-8,%%a1\;jsr 0(%%pc,%%a1)\"; + } + return \"jsr %1\"; + ") +diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/t-m68kelf gcc-3.3.1-20030720/gcc/config/m68k/t-m68kelf +--- gcc-3.3.1-20030720.orig/gcc/config/m68k/t-m68kelf 2003-07-26 03:15:35.000000000 +0200 ++++ gcc-3.3.1-20030720/gcc/config/m68k/t-m68kelf 2003-07-26 03:12:45.000000000 +0200 +@@ -12,14 +12,16 @@ + echo '#define EXTFLOAT' > xfgnulib.c + cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c + +-MULTILIB_OPTIONS = m68000/m68020/m5200/m5206e/m528x/m5307/m5407/mcpu32/m68040/m68060 m68881/msoft-float ++MULTILIB_OPTIONS = m68000/m68020/m68040/m68060/m5200/m5206e/m528x/m5307/m5407/mcpu32 m68881/msoft-float msep-data/mid-shared-library + MULTILIB_DIRNAMES = + MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 mcpu32=m68332 m68020=mc68020 m5206e=m5272 +-MULTILIB_EXCEPTIONS = m68000/msoft-float m5200/m68881 m5200/msoft-float \ +- m5206e/m68881 m5206e/msoft-float m528x/m68881 m528x/msoft-float \ +- m5307/m68881 m5307/msoft-float m5407/m68881 m5407/msoft-float \ +- mcpu32/m68881 mcpu32/msoft-float m68040/m68881 m68040/msoft-float \ +- m68060/m68881 m68060/msoft-float ++MULTILIB_EXCEPTIONS = m68000/msoft-float* m68000/msep-data* m68000/mid-shared-library* m5200/m68881* m5200/msoft-float* \ ++ m5206e/m68881* m5206e/msoft-float* m528x/m68881* m528x/msoft-float* \ ++ m5307/m68881* m5307/msoft-float* m5407/m68881* m5407/msoft-float* \ ++ mcpu32/m68881* mcpu32/msoft-float* m68040/m68881* m68040/msoft-float* \ ++ m68060/m68881* m68060/msoft-float* \ ++ msep-data* msoft-float/msep-data* \ ++ mid-shared-library msoft-float/mid-shared-library + LIBGCC = stmp-multilib + INSTALL_LIBGCC = install-multilib +