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120f5381 JB |
1 | /* |
2 | * Copyright 2005 Stephane Marchesin. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
22 | * OTHER DEALINGS IN THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #ifndef __NOUVEAU_DRM_H__ | |
26 | #define __NOUVEAU_DRM_H__ | |
27 | ||
28 | #define NOUVEAU_DRM_HEADER_PATCHLEVEL 6 | |
29 | ||
30 | typedef struct drm_nouveau_fifo_alloc { | |
31 | int channel; | |
32 | uint32_t put_base; | |
33 | /* FIFO control regs */ | |
34 | drm_handle_t ctrl; | |
35 | int ctrl_size; | |
36 | /* DMA command buffer */ | |
37 | drm_handle_t cmdbuf; | |
38 | int cmdbuf_size; | |
39 | } | |
40 | drm_nouveau_fifo_alloc_t; | |
41 | ||
42 | typedef struct drm_nouveau_object_init { | |
43 | int channel; | |
44 | uint32_t handle; | |
45 | int class; | |
46 | } | |
47 | drm_nouveau_object_init_t; | |
48 | ||
49 | #define NOUVEAU_MEM_ACCESS_RO 1 | |
50 | #define NOUVEAU_MEM_ACCESS_WO 2 | |
51 | #define NOUVEAU_MEM_ACCESS_RW 3 | |
52 | typedef struct drm_nouveau_dma_object_init { | |
53 | int channel; | |
54 | uint32_t handle; | |
55 | int class; | |
56 | int access; | |
57 | int target; | |
58 | uint32_t offset; | |
59 | int size; | |
60 | } | |
61 | drm_nouveau_dma_object_init_t; | |
62 | ||
63 | #define NOUVEAU_MEM_FB 0x00000001 | |
64 | #define NOUVEAU_MEM_AGP 0x00000002 | |
65 | #define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004 | |
66 | #define NOUVEAU_MEM_AGP_ACCEPTABLE 0x00000008 | |
67 | #define NOUVEAU_MEM_PINNED 0x00000010 | |
68 | #define NOUVEAU_MEM_USER_BACKED 0x00000020 | |
69 | #define NOUVEAU_MEM_MAPPED 0x00000040 | |
70 | #define NOUVEAU_MEM_INSTANCE 0x00000080 /* internal */ | |
71 | ||
72 | typedef struct drm_nouveau_mem_alloc { | |
73 | int flags; | |
74 | int alignment; | |
75 | uint64_t size; // in bytes | |
76 | uint64_t region_offset; | |
77 | } | |
78 | drm_nouveau_mem_alloc_t; | |
79 | ||
80 | typedef struct drm_nouveau_mem_free { | |
81 | uint64_t region_offset; | |
82 | int flags; | |
83 | } | |
84 | drm_nouveau_mem_free_t; | |
85 | ||
86 | /* FIXME : maybe unify {GET,SET}PARAMs */ | |
87 | #define NOUVEAU_GETPARAM_PCI_VENDOR 3 | |
88 | #define NOUVEAU_GETPARAM_PCI_DEVICE 4 | |
89 | #define NOUVEAU_GETPARAM_BUS_TYPE 5 | |
90 | #define NOUVEAU_GETPARAM_FB_PHYSICAL 6 | |
91 | #define NOUVEAU_GETPARAM_AGP_PHYSICAL 7 | |
92 | #define NOUVEAU_GETPARAM_FB_SIZE 8 | |
93 | #define NOUVEAU_GETPARAM_AGP_SIZE 9 | |
94 | typedef struct drm_nouveau_getparam { | |
95 | uint64_t param; | |
96 | uint64_t value; | |
97 | } | |
98 | drm_nouveau_getparam_t; | |
99 | ||
100 | #define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1 | |
101 | #define NOUVEAU_SETPARAM_CMDBUF_SIZE 2 | |
102 | typedef struct drm_nouveau_setparam { | |
103 | uint64_t param; | |
104 | uint64_t value; | |
105 | } | |
106 | drm_nouveau_setparam_t; | |
107 | ||
108 | enum nouveau_card_type { | |
109 | NV_UNKNOWN =0, | |
110 | NV_01 =1, | |
111 | NV_03 =3, | |
112 | NV_04 =4, | |
113 | NV_05 =5, | |
114 | NV_10 =10, | |
115 | NV_11 =10, | |
116 | NV_15 =10, | |
117 | NV_17 =10, | |
118 | NV_20 =20, | |
119 | NV_25 =20, | |
120 | NV_30 =30, | |
121 | NV_34 =30, | |
122 | NV_40 =40, | |
123 | NV_44 =44, | |
124 | NV_50 =50, | |
125 | NV_LAST =0xffff, | |
126 | }; | |
127 | ||
128 | enum nouveau_bus_type { | |
129 | NV_AGP =0, | |
130 | NV_PCI =1, | |
131 | NV_PCIE =2, | |
132 | }; | |
133 | ||
134 | #define NOUVEAU_MAX_SAREA_CLIPRECTS 16 | |
135 | ||
136 | typedef struct drm_nouveau_sarea { | |
137 | /* the cliprects */ | |
138 | drm_clip_rect_t boxes[NOUVEAU_MAX_SAREA_CLIPRECTS]; | |
139 | unsigned int nbox; | |
140 | } | |
141 | drm_nouveau_sarea_t; | |
142 | ||
143 | #define DRM_NOUVEAU_FIFO_ALLOC 0x00 | |
144 | #define DRM_NOUVEAU_OBJECT_INIT 0x01 | |
145 | #define DRM_NOUVEAU_DMA_OBJECT_INIT 0x02 | |
146 | #define DRM_NOUVEAU_MEM_ALLOC 0x03 | |
147 | #define DRM_NOUVEAU_MEM_FREE 0x04 | |
148 | #define DRM_NOUVEAU_GETPARAM 0x05 | |
149 | #define DRM_NOUVEAU_SETPARAM 0x06 | |
150 | ||
151 | #endif /* __NOUVEAU_DRM_H__ */ | |
152 |