[packages/kernel.git] / kernel-2.2.19-ide_sparc32.patch

diff -ur linux-2.2.19ide/include/asm-sparc/hdreg.h linux/include/asm-sparc/hdreg.h
--- linux-2.2.19ide/include/asm-sparc/hdreg.h	Thu Oct 11 15:56:53 2001
+++ linux/include/asm-sparc/hdreg.h	Thu Oct 11 15:26:21 2001
@@ -0,0 +1,13 @@
+/*
+ * hdreg.h: SPARC specific IDE glue.
+ *
+ * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
+ */
+
+#ifndef __SPARC_HDREG_H
+#define __SPARC_HDREG_H
+
+typedef unsigned long ide_ioreg_t;
+
+#endif /* __SPARC_HDREG_H */
diff -ur linux-2.2.19ide/include/asm-sparc/ide.h linux/include/asm-sparc/ide.h
--- linux-2.2.19ide/include/asm-sparc/ide.h	Thu Oct 11 15:56:41 2001
+++ linux/include/asm-sparc/ide.h	Thu Oct 11 15:51:00 2001
@@ -0,0 +1,280 @@
+/*
+ * ide.h: SPARC specific IDE glue.
+ *
+ * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
+ */
+
+#ifndef _SPARC_IDE_H
+#define _SPARC_IDE_H
+
+#ifdef __KERNEL__
+
+#include <asm/pgtable.h>
+#include <asm/hdreg.h>
+
+#undef  MAX_HWIFS
+#define MAX_HWIFS	2
+
+#define	ide__sti()	__sti()
+
+static __inline__ int ide_default_irq(ide_ioreg_t base)
+{
+	return 0;
+}
+
+static __inline__ ide_ioreg_t ide_default_io_base(int index)
+{
+	return 0;
+}
+
+static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
+{
+	ide_ioreg_t reg =  data_port;
+	int i;
+
+	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += 1;
+	}
+	if (ctrl_port) {
+		hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+	} else {
+		hw->io_ports[IDE_CONTROL_OFFSET] = 0;
+	}
+	if (irq != NULL)
+		*irq = 0;
+}
+
+/*
+ * This registers the standard ports for this architecture with the IDE
+ * driver.
+ */
+static __inline__ void ide_init_default_hwifs(void)
+{
+#ifndef CONFIG_BLK_DEV_IDEPCI
+	hw_regs_t hw;
+	int index;
+
+	for (index = 0; index < MAX_HWIFS; index++) {
+		ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, 0);
+		hw.irq = ide_default_irq(ide_default_io_base(index));
+		ide_register_hw(&hw, NULL);
+	}
+#endif /* CONFIG_BLK_DEV_IDEPCI */
+}
+
+typedef union {
+	unsigned int		all	: 8;	/* all of the bits together */
+	struct {
+		unsigned int	bit7	: 1;
+		unsigned int	lba	: 1;
+		unsigned int	bit5	: 1;
+		unsigned int	unit	: 1;
+		unsigned int	head	: 4;
+	} b;
+} select_t;
+
+static __inline__ int ide_request_irq(unsigned int irq,
+				      void (*handler)(int, void *, struct pt_regs *),
+				      unsigned long flags, const char *name, void *devid)
+{
+	return request_irq(irq, handler, SA_SHIRQ, name, devid);
+}
+
+static __inline__ void ide_free_irq(unsigned int irq, void *dev_id)
+{
+	free_irq(irq, dev_id);
+}
+
+static __inline__ int ide_check_region(ide_ioreg_t base, unsigned int size)
+{
+	return check_region(base, size);
+}
+
+static __inline__ void ide_request_region(ide_ioreg_t base, unsigned int size,
+					  const char *name)
+{
+	request_region(base, size, name);
+}
+
+static __inline__ void ide_release_region(ide_ioreg_t base, unsigned int size)
+{
+	release_region(base, size);
+}
+
+#undef  SUPPORT_SLOW_DATA_PORTS
+#define SUPPORT_SLOW_DATA_PORTS 0
+
+#undef  SUPPORT_VLB_SYNC
+#define SUPPORT_VLB_SYNC 0
+
+#undef  HD_DATA
+#define HD_DATA ((ide_ioreg_t)0)
+
+/* From m68k code... */
+
+#ifdef insl
+#undef insl
+#endif
+#ifdef outsl
+#undef outsl
+#endif
+#ifdef insw
+#undef insw
+#endif
+#ifdef outsw
+#undef outsw
+#endif
+
+#define insl(data_reg, buffer, wcount) insw(data_reg, buffer, (wcount)<<1)
+#define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1)
+
+#define insw(port, buf, nr) ide_insw((port), (buf), (nr))
+#define outsw(port, buf, nr) ide_outsw((port), (buf), (nr))
+
+static __inline__ void ide_insw(unsigned long port,
+				void *dst,
+				unsigned long count)
+{
+	volatile unsigned short *data_port;
+	unsigned long end = (unsigned long)dst + (count << 1);
+	u16 *ps = dst;
+	u32 *pi;
+
+	data_port = (volatile unsigned short *)port;
+
+	if(((u32)ps) & 0x2) {
+		*ps++ = *data_port;
+		count--;
+	}
+	pi = (u32 *)ps;
+	while(count >= 2) {
+		u32 w;
+
+		w  = (*data_port) << 16;
+		w |= (*data_port);
+		*pi++ = w;
+		count -= 2;
+	}
+	ps = (u16 *)pi;
+	if(count)
+		*ps++ = *data_port;
+}
+
+static __inline__ void ide_outsw(unsigned long port,
+				 const void *src,
+				 unsigned long count)
+{
+	volatile unsigned short *data_port;
+	unsigned long end = (unsigned long)src + (count << 1);
+	const u16 *ps = src;
+	const u32 *pi;
+
+	data_port = (volatile unsigned short *)port;
+
+	if(((u32)src) & 0x2) {
+		*data_port = *ps++;
+		count--;
+	}
+	pi = (const u32 *)ps;
+	while(count >= 2) {
+		u32 w;
+
+		w = *pi++;
+		*data_port = (w >> 16);
+		*data_port = w;
+		count -= 2;
+	}
+	ps = (const u16 *)pi;
+	if(count)
+		*data_port = *ps;
+
+	__flush_dcache_range((unsigned long)src, end);
+}
+
+#define T_CHAR          (0x0000)        /* char:  don't touch  */
+#define T_SHORT         (0x4000)        /* short: 12 -> 21     */
+#define T_INT           (0x8000)        /* int:   1234 -> 4321 */
+#define T_TEXT          (0xc000)        /* text:  12 -> 21     */
+
+#define T_MASK_TYPE     (0xc000)
+#define T_MASK_COUNT    (0x3fff)
+
+#define D_CHAR(cnt)     (T_CHAR  | (cnt))
+#define D_SHORT(cnt)    (T_SHORT | (cnt))
+#define D_INT(cnt)      (T_INT   | (cnt))
+#define D_TEXT(cnt)     (T_TEXT  | (cnt))
+
+static u_short driveid_types[] = {
+	D_SHORT(10),	/* config - vendor2 */
+	D_TEXT(20),	/* serial_no */
+	D_SHORT(3),	/* buf_type - ecc_bytes */
+	D_TEXT(48),	/* fw_rev - model */
+	D_CHAR(2),	/* max_multsect - vendor3 */
+	D_SHORT(1),	/* dword_io */
+	D_CHAR(2),	/* vendor4 - capability */
+	D_SHORT(1),	/* reserved50 */
+	D_CHAR(4),	/* vendor5 - tDMA */
+	D_SHORT(4),	/* field_valid - cur_sectors */
+	D_INT(1),	/* cur_capacity */
+	D_CHAR(2),	/* multsect - multsect_valid */
+	D_INT(1),	/* lba_capacity */
+	D_SHORT(194)	/* dma_1word - reservedyy */
+};
+
+#define num_driveid_types       (sizeof(driveid_types)/sizeof(*driveid_types))
+
+static __inline__ void ide_fix_driveid(struct hd_driveid *id)
+{
+	u_char *p = (u_char *)id;
+	int i, j, cnt;
+	u_char t;
+
+	for (i = 0; i < num_driveid_types; i++) {
+		cnt = driveid_types[i] & T_MASK_COUNT;
+		switch (driveid_types[i] & T_MASK_TYPE) {
+		case T_CHAR:
+			p += cnt;
+			break;
+		case T_SHORT:
+			for (j = 0; j < cnt; j++) {
+				t = p[0];
+				p[0] = p[1];
+				p[1] = t;
+				p += 2;
+			}
+			break;
+		case T_INT:
+			for (j = 0; j < cnt; j++) {
+				t = p[0];
+				p[0] = p[3];
+				p[3] = t;
+				t = p[1];
+				p[1] = p[2];
+				p[2] = t;
+				p += 4;
+			}
+			break;
+		case T_TEXT:
+			for (j = 0; j < cnt; j += 2) {
+				t = p[0];
+				p[0] = p[1];
+				p[1] = t;
+				p += 2;
+			}
+			break;
+		};
+	}
+}
+
+/*
+ * The following are not needed for the non-m68k ports
+ */
+#define ide_ack_intr(hwif)		(1)
+#define ide_release_lock(lock)		do {} while (0)
+#define ide_get_lock(lock, hdlr, data)	do {} while (0)
+
+#endif /* __KERNEL__ */
+
+#endif /* _SPARC_IDE_H */
Commit	Line	Data
a4a64eb0	1	diff -ur linux-2.2.19ide/include/asm-sparc/hdreg.h linux/include/asm-sparc/hdreg.h
	2	--- linux-2.2.19ide/include/asm-sparc/hdreg.h Thu Oct 11 15:56:53 2001
	3	+++ linux/include/asm-sparc/hdreg.h Thu Oct 11 15:26:21 2001
	4	@@ -0,0 +1,13 @@
	5	+/*
	6	+ * hdreg.h: SPARC specific IDE glue.
	7	+ *
	8	+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
	9	+ * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
	10	+ */
	11	+
	12	+#ifndef __SPARC_HDREG_H
	13	+#define __SPARC_HDREG_H
	14	+
	15	+typedef unsigned long ide_ioreg_t;
	16	+
	17	+#endif /* __SPARC_HDREG_H */
	18	diff -ur linux-2.2.19ide/include/asm-sparc/ide.h linux/include/asm-sparc/ide.h
	19	--- linux-2.2.19ide/include/asm-sparc/ide.h Thu Oct 11 15:56:41 2001
	20	+++ linux/include/asm-sparc/ide.h Thu Oct 11 15:51:00 2001
	21	@@ -0,0 +1,280 @@
	22	+/*
	23	+ * ide.h: SPARC specific IDE glue.
	24	+ *
	25	+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
	26	+ * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
	27	+ */
	28	+
	29	+#ifndef _SPARC_IDE_H
	30	+#define _SPARC_IDE_H
	31	+
	32	+#ifdef __KERNEL__
	33	+
	34	+#include <asm/pgtable.h>
	35	+#include <asm/hdreg.h>
	36	+
	37	+#undef MAX_HWIFS
	38	+#define MAX_HWIFS 2
	39	+
	40	+#define ide__sti() __sti()
	41	+
	42	+static __inline__ int ide_default_irq(ide_ioreg_t base)
	43	+{
	44	+ return 0;
	45	+}
	46	+
	47	+static __inline__ ide_ioreg_t ide_default_io_base(int index)
	48	+{
	49	+ return 0;
	50	+}
	51	+
	52	+static __inline__ void ide_init_hwif_ports(hw_regs_t hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int irq)
	53	+{
	54	+ ide_ioreg_t reg = data_port;
	55	+ int i;
	56	+
	57	+ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
	58	+ hw->io_ports[i] = reg;
	59	+ reg += 1;
	60	+ }
	61	+ if (ctrl_port) {
	62	+ hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
	63	+ } else {
	64	+ hw->io_ports[IDE_CONTROL_OFFSET] = 0;
65	+ }
66	+ if (irq != NULL)
67	+ *irq = 0;
68	+}
69	+
70	+/*
71	+ * This registers the standard ports for this architecture with the IDE
72	+ * driver.
73	+ */
74	+static __inline__ void ide_init_default_hwifs(void)
75	+{
76	+#ifndef CONFIG_BLK_DEV_IDEPCI
77	+ hw_regs_t hw;
78	+ int index;
79	+
80	+ for (index = 0; index < MAX_HWIFS; index++) {
81	+ ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, 0);
82	+ hw.irq = ide_default_irq(ide_default_io_base(index));
83	+ ide_register_hw(&hw, NULL);
84	+ }
85	+#endif /* CONFIG_BLK_DEV_IDEPCI */
86	+}
87	+
88	+typedef union {
89	+ unsigned int all : 8; /* all of the bits together */
90	+ struct {
91	+ unsigned int bit7 : 1;
92	+ unsigned int lba : 1;
93	+ unsigned int bit5 : 1;
94	+ unsigned int unit : 1;
95	+ unsigned int head : 4;
96	+ } b;
97	+} select_t;
98	+
99	+static __inline__ int ide_request_irq(unsigned int irq,
100	+ void (handler)(int, void , struct pt_regs *),
101	+ unsigned long flags, const char name, void devid)
102	+{
103	+ return request_irq(irq, handler, SA_SHIRQ, name, devid);
104	+}
105	+
106	+static __inline__ void ide_free_irq(unsigned int irq, void *dev_id)
107	+{
108	+ free_irq(irq, dev_id);
109	+}
110	+
111	+static __inline__ int ide_check_region(ide_ioreg_t base, unsigned int size)
112	+{
113	+ return check_region(base, size);
114	+}
115	+
116	+static __inline__ void ide_request_region(ide_ioreg_t base, unsigned int size,
117	+ const char *name)
118	+{
119	+ request_region(base, size, name);
120	+}
121	+
122	+static __inline__ void ide_release_region(ide_ioreg_t base, unsigned int size)
123	+{
124	+ release_region(base, size);
125	+}
126	+
127	+#undef SUPPORT_SLOW_DATA_PORTS
128	+#define SUPPORT_SLOW_DATA_PORTS 0
129	+
130	+#undef SUPPORT_VLB_SYNC
131	+#define SUPPORT_VLB_SYNC 0
132	+
133	+#undef HD_DATA
134	+#define HD_DATA ((ide_ioreg_t)0)
135	+
136	+/* From m68k code... */
137	+
138	+#ifdef insl
139	+#undef insl
140	+#endif
141	+#ifdef outsl
142	+#undef outsl
143	+#endif
144	+#ifdef insw
145	+#undef insw
146	+#endif
147	+#ifdef outsw
148	+#undef outsw
149	+#endif
150	+
151	+#define insl(data_reg, buffer, wcount) insw(data_reg, buffer, (wcount)<<1)
152	+#define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1)
153	+
154	+#define insw(port, buf, nr) ide_insw((port), (buf), (nr))
155	+#define outsw(port, buf, nr) ide_outsw((port), (buf), (nr))
156	+
157	+static __inline__ void ide_insw(unsigned long port,
158	+ void *dst,
159	+ unsigned long count)
160	+{
161	+ volatile unsigned short *data_port;
162	+ unsigned long end = (unsigned long)dst + (count << 1);
163	+ u16 *ps = dst;
164	+ u32 *pi;
165	+
166	+ data_port = (volatile unsigned short *)port;
167	+
168	+ if(((u32)ps) & 0x2) {
169	+ ps++ = data_port;
170	+ count--;
171	+ }
172	+ pi = (u32 *)ps;
173	+ while(count >= 2) {
174	+ u32 w;
175	+
176	+ w = (*data_port) << 16;
177	+ w \|= (*data_port);
178	+ *pi++ = w;
179	+ count -= 2;
180	+ }
181	+ ps = (u16 *)pi;
182	+ if(count)
183	+ ps++ = data_port;
184	+}
185	+
186	+static __inline__ void ide_outsw(unsigned long port,
187	+ const void *src,
188	+ unsigned long count)
189	+{
190	+ volatile unsigned short *data_port;
191	+ unsigned long end = (unsigned long)src + (count << 1);
192	+ const u16 *ps = src;
193	+ const u32 *pi;
194	+
195	+ data_port = (volatile unsigned short *)port;
196	+
197	+ if(((u32)src) & 0x2) {
198	+ data_port = ps++;
199	+ count--;
200	+ }
201	+ pi = (const u32 *)ps;
202	+ while(count >= 2) {
203	+ u32 w;
204	+
205	+ w = *pi++;
206	+ *data_port = (w >> 16);
207	+ *data_port = w;
208	+ count -= 2;
209	+ }
210	+ ps = (const u16 *)pi;
211	+ if(count)
212	+ data_port = ps;
213	+
214	+ __flush_dcache_range((unsigned long)src, end);
215	+}
216	+
217	+#define T_CHAR (0x0000) /* char: don't touch */
218	+#define T_SHORT (0x4000) /* short: 12 -> 21 */
219	+#define T_INT (0x8000) /* int: 1234 -> 4321 */
220	+#define T_TEXT (0xc000) /* text: 12 -> 21 */
221	+
222	+#define T_MASK_TYPE (0xc000)
223	+#define T_MASK_COUNT (0x3fff)
224	+
225	+#define D_CHAR(cnt) (T_CHAR \| (cnt))
226	+#define D_SHORT(cnt) (T_SHORT \| (cnt))
227	+#define D_INT(cnt) (T_INT \| (cnt))
228	+#define D_TEXT(cnt) (T_TEXT \| (cnt))
229	+
230	+static u_short driveid_types[] = {
231	+ D_SHORT(10), /* config - vendor2 */
232	+ D_TEXT(20), /* serial_no */
233	+ D_SHORT(3), /* buf_type - ecc_bytes */
234	+ D_TEXT(48), /* fw_rev - model */
235	+ D_CHAR(2), /* max_multsect - vendor3 */
236	+ D_SHORT(1), /* dword_io */
237	+ D_CHAR(2), /* vendor4 - capability */
238	+ D_SHORT(1), /* reserved50 */
239	+ D_CHAR(4), /* vendor5 - tDMA */
240	+ D_SHORT(4), /* field_valid - cur_sectors */
241	+ D_INT(1), /* cur_capacity */
242	+ D_CHAR(2), /* multsect - multsect_valid */
243	+ D_INT(1), /* lba_capacity */
244	+ D_SHORT(194) /* dma_1word - reservedyy */
245	+};
246	+
247	+#define num_driveid_types (sizeof(driveid_types)/sizeof(*driveid_types))
248	+
249	+static __inline__ void ide_fix_driveid(struct hd_driveid *id)
250	+{
251	+ u_char p = (u_char )id;
252	+ int i, j, cnt;
253	+ u_char t;
254	+
255	+ for (i = 0; i < num_driveid_types; i++) {
256	+ cnt = driveid_types[i] & T_MASK_COUNT;
257	+ switch (driveid_types[i] & T_MASK_TYPE) {
258	+ case T_CHAR:
259	+ p += cnt;
260	+ break;
261	+ case T_SHORT:
262	+ for (j = 0; j < cnt; j++) {
263	+ t = p[0];
264	+ p[0] = p[1];
265	+ p[1] = t;
266	+ p += 2;
267	+ }
268	+ break;
269	+ case T_INT:
270	+ for (j = 0; j < cnt; j++) {
271	+ t = p[0];
272	+ p[0] = p[3];
273	+ p[3] = t;
274	+ t = p[1];
275	+ p[1] = p[2];
276	+ p[2] = t;
277	+ p += 4;
278	+ }
279	+ break;
280	+ case T_TEXT:
281	+ for (j = 0; j < cnt; j += 2) {
282	+ t = p[0];
283	+ p[0] = p[1];
284	+ p[1] = t;
285	+ p += 2;
286	+ }
287	+ break;
288	+ };
289	+ }
290	+}
291	+
292	+/*
293	+ * The following are not needed for the non-m68k ports
294	+ */
295	+#define ide_ack_intr(hwif) (1)
296	+#define ide_release_lock(lock) do {} while (0)
297	+#define ide_get_lock(lock, hdlr, data) do {} while (0)
298	+
299	+#endif /* __KERNEL__ */
300	+
301	+#endif /* _SPARC_IDE_H */