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- updated to version 4.2.99.4 snap 20030124
[packages/XFree86.git] / XFree86-mga020414.patch
CommitLineData
4e83e030 1--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga.h Sat Jan 12 00:42:57 2002
2+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h Sun Apr 14 15:07:08 2002
3@@ -120,6 +120,7 @@
4 CARD32 Option;
5 CARD32 Option2;
6 CARD32 Option3;
7+ long Clock;
8 } MGARegRec, *MGARegPtr;
9
10 /* For programming the second CRTC */
11@@ -350,9 +351,11 @@
12 void (*GetQuiescence)(ScrnInfoPtr pScrn);
13
14 int agpMode;
15+ int agpSize;
16
17 #endif
18 XF86VideoAdaptorPtr adaptor;
19+ Bool DualHeadEnabled;
20 Bool SecondCrtc;
21 Bool SecondOutput;
22 GDevPtr device;
23@@ -495,6 +498,9 @@
24 void MGACRTC2GetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY);
25
26 double MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out);
27+
28+double MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out);
29+long MGAG450SavePLLFreq(ScrnInfoPtr pScrn);
30 void MGAprintDac(ScrnInfoPtr pScrn);
31
32 #ifdef USEMGAHAL
33--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga.man Tue Dec 18 05:52:32 2001
34+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man Sun Apr 14 15:07:08 2002
35@@ -19,11 +19,14 @@
36 8, 15, 16, 24, and an 8+24 overlay mode. All
37 visual types are supported for depth 8, and both TrueColor and DirectColor
38 visuals are supported for the other depths except 8+24 mode which supports
39-PseudoColor, GrayScale and TrueColor. Multi-head configurations
40+PseudoColor, GrayScale and TrueColor. Multi-card configurations
41 are supported. XVideo is supported on G200 and newer systems, with
42 either
43 .B TexturedVideo
44-or video overlay.
45+or video overlay. The second head of dual-head cards is supported for
46+the G450 and G550. Support for the second head on G400 cards requires
47+a binary-only "mga_hal" module that is available from Matrox
48+<http://www.matrox.com>. That module also provides various other enhancements.
49 .SH SUPPORTED HARDWARE
50 The
51 .B mga
52@@ -44,6 +47,10 @@
53 Millennium G200 and Mystique G200
54 .TP 12
55 .B G400
56+.TP 12
57+.B G450
58+.TP 12
59+.B G550
60 .SH CONFIGURATION DETAILS
61 Please refer to XF86Config(__filemansuffix__) for general configuration
62 details. This section only covers configuration details specific to this
63@@ -57,9 +64,11 @@
64 .PP
65 .RS 4
66 "mga2064w", "mga1064sg", "mga2164w", "mga2164w agp", "mgag100", "mgag200",
67-"mgag200 pci" "mgag400".
68+"mgag200 pci", "mgag400", "mgag550".
69 .RE
70 .PP
71+The G450 is Chipset "mgag400" with ChipRev 0x80.
72+.PP
73 The driver will auto-detect the amount of video memory present for all
74 chips except the Millennium II. In the Millennium II case it defaults
75 to 4096\ kBytes. When using a Millennium II, the actual amount of video
76@@ -91,6 +100,10 @@
77 .TP
78 .BI "Option \*qNoAccel\*q \*q" boolean \*q
79 Disable or enable acceleration. Default: acceleration is enabled.
80+.TP
81+.BI "Option \*qNoHal\*q \*q" boolean \*q
82+Disable or enable loading the "mga_hal" module. Default: the module is
83+loaded when available and when using hardware that it supports.
84 .TP
85 .BI "Option \*qOverclockMem\*q"
86 Set clocks to values used by some commercial X-Servers (G100, G200 and G400
87--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_dacG.c Sat Jan 12 00:42:57 2002
88+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c Sun Apr 14 15:07:08 2002
89@@ -212,8 +212,8 @@
90 double f_pll;
91
92 if(MGAISGx50(pMga)) {
93- MGAG450SetPLLFreq(pScrn, f_out);
94- return;
95+ pReg->Clock = f_out;
96+ return;
97 }
98
99 /* Do the calculations for m, n, p and s */
100@@ -285,7 +285,7 @@
101 pReg->DacRegs[i] = initDAC[i];
102 }
103 ); /* MGA_NOT_HAL */
104-
105+
106 switch(pMga->Chipset)
107 {
108 case PCI_CHIP_MGA1064:
109@@ -529,7 +529,7 @@
110 OUTREG(MGAREG_ZORG, 0);
111 }
112
113- MGAGSetPCLK(pScrn, mode->Clock);
114+ MGAGSetPCLK(pScrn, mode->Clock);
115 ); /* MGA_NOT_HAL */
116
117 /* This disables the VGA memory aperture */
118@@ -616,6 +616,7 @@
119 /*
120 * MGAGRestorePalette
121 */
122+
123 static void
124 MGAGRestorePalette(ScrnInfoPtr pScrn, unsigned char* pntr)
125 {
126@@ -623,8 +624,8 @@
127 int i = 768;
128
129 outMGAdreg(MGA1064_WADR_PAL, 0x00);
130- while(i--)
131- outMGAdreg(MGA1064_COL_PAL, *(pntr++));
132+ while(i--)
133+ outMGAdreg(MGA1064_COL_PAL, *(pntr++));
134 }
135
136 /*
137@@ -637,8 +638,8 @@
138 int i = 768;
139
140 outMGAdreg(MGA1064_RADR_PAL, 0x00);
141- while(i--)
142- *(pntr++) = inMGAdreg(MGA1064_COL_PAL);
143+ while(i--)
144+ *(pntr++) = inMGAdreg(MGA1064_COL_PAL);
145 }
146
147 /*
148@@ -655,7 +656,21 @@
149 MGAPtr pMga = MGAPTR(pScrn);
150 CARD32 optionMask;
151
152+ /*
153+ * Pixel Clock needs to be restored regardless if we use
154+ * HALLib or not. HALlib doesn't do a good job restoring
155+ * VESA modes. MATROX: hint, hint.
156+ */
157+ if (MGAISGx50(pMga) && mgaReg->Clock) {
158+ /*
159+ * With HALlib program only when restoring to console!
160+ * To test this we check for Clock == 0.
161+ */
162+ MGAG450SetPLLFreq(pScrn, mgaReg->Clock);
163+ }
164+
165 if(!pMga->SecondCrtc) {
166+
167 MGA_NOT_HAL(
168 /*
169 * Code is needed to get things back to bank zero.
170@@ -696,7 +711,21 @@
171 mgaReg->Option3);
172 }
173 ); /* MGA_NOT_HAL */
174-
175+#ifdef USEMGAHAL
176+ /*
177+ * Work around another bug in HALlib: it doesn't restore the
178+ * DAC width register correctly. MATROX: hint, hint.
179+ */
180+ MGA_HAL(
181+ outMGAdac(MGA1064_MUL_CTL,mgaReg->DacRegs[0]);
182+ outMGAdac(MGA1064_MISC_CTL,mgaReg->DacRegs[1]);
183+ if (!MGAISGx50(pMga)) {
184+ outMGAdac(MGA1064_PIX_PLLC_M,mgaReg->DacRegs[2]);
185+ outMGAdac(MGA1064_PIX_PLLC_N,mgaReg->DacRegs[3]);
186+ outMGAdac(MGA1064_PIX_PLLC_P,mgaReg->DacRegs[4]);
187+ }
188+ );
189+#endif
190 /* restore CRTCEXT regs */
191 for (i = 0; i < 6; i++)
192 OUTREG16(0x1FDE, (mgaReg->ExtVga[i] << 8) | i);
193@@ -706,7 +735,7 @@
194 */
195 vgaHWRestore(pScrn, vgaReg,
196 VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0));
197- MGAGRestorePalette(pScrn, vgaReg->DAC);
198+ MGAGRestorePalette(pScrn, vgaReg->DAC);
199
200 /*
201 * this is needed to properly restore start address
202@@ -751,6 +780,7 @@
203 for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]);
204 ErrorF("\n");
205 #endif
206+
207 }
208
209 /*
210@@ -765,6 +795,15 @@
211 int i;
212 MGAPtr pMga = MGAPTR(pScrn);
213
214+ /*
215+ * Pixel Clock needs to be restored regardless if we use
216+ * HALLib or not. HALlib doesn't do a good job restoring
217+ * VESA modes (s.o.). MATROX: hint, hint.
218+ */
219+ if (MGAISGx50(pMga)) {
220+ mgaReg->Clock = MGAG450SavePLLFreq(pScrn);
221+ }
222+
223 if(pMga->SecondCrtc == TRUE) {
224 for(i = 0x80; i < 0xa0; i++)
225 mgaReg->dac2[i-0x80] = inMGAdac(i);
226@@ -790,7 +829,29 @@
227 */
228 vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | (saveFonts ? VGA_SR_FONTS : 0));
229 MGAGSavePalette(pScrn, vgaReg->DAC);
230+ /*
231+ * Work around another bug in HALlib: it doesn't restore the
232+ * DAC width register correctly.
233+ */
234
235+#ifdef USEMGAHAL
236+ /*
237+ * Work around another bug in HALlib: it doesn't restore the
238+ * DAC width register correctly (s.o.). MATROX: hint, hint.
239+ */
240+ MGA_HAL(
241+ if (mgaReg->DacRegs == NULL) {
242+ mgaReg->DacRegs = xnfcalloc(MGAISGx50(pMga) ? 2 : 5, 1);
243+ }
244+ mgaReg->DacRegs[0] = inMGAdac(MGA1064_MUL_CTL);
245+ mgaReg->DacRegs[1] = inMGAdac(MGA1064_MISC_CTL);
246+ if (!MGAISGx50(pMga)) {
247+ mgaReg->DacRegs[2] = inMGAdac(MGA1064_PIX_PLLC_M);
248+ mgaReg->DacRegs[3] = inMGAdac(MGA1064_PIX_PLLC_N);
249+ mgaReg->DacRegs[4] = inMGAdac(MGA1064_PIX_PLLC_P);
250+ }
251+ );
252+#endif
253 MGA_NOT_HAL(
254 /*
255 * The port I/O code necessary to read in the extended registers.
256--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_dri.c Wed Sep 26 21:59:17 2001
257+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c Sun Apr 14 15:07:08 2002
258@@ -571,11 +571,14 @@
259 MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo;
260 unsigned long mode;
261 unsigned int vendor, device;
262- int ret, count;
263+ int ret, count, i;
264+
265+ if(pMga->agpSize < 12)pMga->agpSize = 12;
266+ if(pMga->agpSize > 64)pMga->agpSize = 64; /* cap */
267
268 /* FIXME: Make these configurable...
269 */
270- pMGADRIServer->agp.size = 12 * 1024 * 1024;
271+ pMGADRIServer->agp.size = pMga->agpSize * 1024 * 1024;
272
273 pMGADRIServer->warp.offset = 0;
274 pMGADRIServer->warp.size = MGA_WARP_UCODE_SIZE;
275@@ -588,6 +591,13 @@
276 pMGADRIServer->primary.size);
277 pMGADRIServer->buffers.size = MGA_NUM_BUFFERS * MGA_BUFFER_SIZE;
278
279+
280+ pMGADRIServer->agpTextures.offset = (pMGADRIServer->buffers.offset +
281+ pMGADRIServer->buffers.size);
282+
283+ pMGADRIServer->agpTextures.size = pMGADRIServer->agp.size -
284+ pMGADRIServer->agpTextures.offset;
285+
286 if ( drmAgpAcquire( pMga->drmFD ) < 0 ) {
287 xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] AGP not available\n" );
288 return FALSE;
289@@ -750,6 +760,28 @@
290 "[drm] Added %d %d byte DMA buffers\n",
291 count, MGA_BUFFER_SIZE );
292
293+ i = mylog2(pMGADRIServer->agpTextures.size / MGA_NR_TEX_REGIONS);
294+ if(i < MGA_LOG_MIN_TEX_REGION_SIZE)
295+ i = MGA_LOG_MIN_TEX_REGION_SIZE;
296+ pMGADRIServer->agpTextures.size = (pMGADRIServer->agpTextures.size >> i) << i;
297+
298+ if ( drmAddMap( pMga->drmFD,
299+ pMGADRIServer->agpTextures.offset,
300+ pMGADRIServer->agpTextures.size,
301+ DRM_AGP, 0,
302+ &pMGADRIServer->agpTextures.handle ) < 0 ) {
303+ xf86DrvMsg( pScreen->myNum, X_ERROR,
304+ "[agp] Could not add agpTexture mapping\n" );
305+ return FALSE;
306+ }
307+/* should i map it ? */
308+ xf86DrvMsg( pScreen->myNum, X_INFO,
309+ "[agp] agpTexture handle = 0x%08lx\n",
310+ pMGADRIServer->agpTextures.handle );
311+ xf86DrvMsg( pScreen->myNum, X_INFO,
312+ "[agp] agpTexture size: %d kb\n", pMGADRIServer->agpTextures.size/1024 );
313+
314+
315 xf86EnablePciBusMaster( pMga->PciInfo, TRUE );
316
317 return TRUE;
318@@ -853,6 +885,9 @@
319 init.primary_offset = pMGADRIServer->primary.handle;
320 init.buffers_offset = pMGADRIServer->buffers.handle;
321
322+ init.texture_offset[1] = pMGADRIServer->agpTextures.handle;
323+ init.texture_size[1] = pMGADRIServer->agpTextures.size;
324+
325 ret = drmMGAInitDMA( pMga->drmFD, &init );
326 if ( ret < 0 ) {
327 xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
328@@ -1192,6 +1227,14 @@
329 pMGADRI->logTextureGranularity = i;
330 pMGADRI->textureSize = (pMGADRI->textureSize >> i) << i; /* truncate */
331
332+ i = mylog2( pMGADRIServer->agpTextures.size / MGA_NR_TEX_REGIONS );
333+ if ( i < MGA_LOG_MIN_TEX_REGION_SIZE )
334+ i = MGA_LOG_MIN_TEX_REGION_SIZE;
335+
336+ pMGADRI->logAgpTextureGranularity = i;
337+ pMGADRI->agpTextureOffset = (unsigned int)pMGADRIServer->agpTextures.handle;
338+ pMGADRI->agpTextureSize = (unsigned int)pMGADRIServer->agpTextures.size;
339+
340 pMGADRI->registers.handle = pMGADRIServer->registers.handle;
341 pMGADRI->registers.size = pMGADRIServer->registers.size;
342 pMGADRI->status.handle = pMGADRIServer->status.handle;
343@@ -1233,6 +1276,11 @@
344 if ( pMGADRIServer->warp.map ) {
345 drmUnmap( pMGADRIServer->warp.map, pMGADRIServer->warp.size );
346 pMGADRIServer->warp.map = NULL;
347+ }
348+
349+ if ( pMGADRIServer->agpTextures.map ) {
350+ drmUnmap( pMGADRIServer->agpTextures.map, pMGADRIServer->agpTextures.size );
351+ pMGADRIServer->agpTextures.map = NULL;
352 }
353
354 if ( pMGADRIServer->agp.handle ) {
355--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_driver.c Tue Jan 8 06:50:11 2002
356+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c Sun Apr 14 15:36:52 2002
357@@ -213,6 +213,7 @@
358 OPTION_CRTC2RAM,
359 OPTION_INT10,
360 OPTION_AGP_MODE,
361+ OPTION_AGP_SIZE,
362 OPTION_DIGITAL,
363 OPTION_TV,
364 OPTION_TVSTANDARD,
365@@ -244,6 +245,7 @@
366 { OPTION_CRTC2RAM, "Crtc2Ram", OPTV_INTEGER, {0}, FALSE },
367 { OPTION_INT10, "Int10", OPTV_BOOLEAN, {0}, FALSE },
368 { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE },
369+ { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE },
370 { OPTION_DIGITAL, "DigitalScreen",OPTV_BOOLEAN, {0}, FALSE },
371 { OPTION_TV, "TV", OPTV_BOOLEAN, {0}, FALSE },
372 { OPTION_TVSTANDARD, "TVStandard", OPTV_ANYSTR, {0}, FALSE },
373@@ -1299,28 +1301,122 @@
374 pScrn->monitor = pScrn->confScreen->monitor;
375
376 /*
377- * In case of DualHead, we need to determine if we are the 'master' head or the 'slave'
378- * head. In order to do that, at the end of the first initialisation, PrimInit is set as
379- * DONE to the shared entity. So that the second initialisation knows that something has
380- * been done before it. This always assume that the first device initialised is the master
381+ * Set the Chipset and ChipRev, allowing config file entries to
382+ * override.
383+ */
384+ if (pMga->device->chipset && *pMga->device->chipset) {
385+ pScrn->chipset = pMga->device->chipset;
386+ pMga->Chipset = xf86StringToToken(MGAChipsets, pScrn->chipset);
387+ from = X_CONFIG;
388+ } else if (pMga->device->chipID >= 0) {
389+ pMga->Chipset = pMga->device->chipID;
390+ pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
391+ from = X_CONFIG;
392+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
393+ pMga->Chipset);
394+ } else {
395+ from = X_PROBED;
396+ pMga->Chipset = pMga->PciInfo->chipType;
397+ pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
398+ }
399+ if (pMga->device->chipRev >= 0) {
400+ pMga->ChipRev = pMga->device->chipRev;
401+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
402+ pMga->ChipRev);
403+ } else {
404+ pMga->ChipRev = pMga->PciInfo->chipRev;
405+ }
406+
407+ /*
408+ * This shouldn't happen because such problems should be caught in
409+ * MGAProbe(), but check it just in case.
410+ */
411+ if (pScrn->chipset == NULL) {
412+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
413+ "ChipID 0x%04X is not recognised\n", pMga->Chipset);
414+ return FALSE;
415+ }
416+ if (pMga->Chipset < 0) {
417+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
418+ "Chipset \"%s\" is not recognised\n", pScrn->chipset);
419+ return FALSE;
420+ }
421+
422+ xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"", pScrn->chipset);
423+ if ((pMga->Chipset == PCI_CHIP_MGAG400) &&
424+ (pMga->ChipRev >= 0x80))
425+ xf86ErrorF(" (G450)\n");
426+ else
427+ xf86ErrorF(" (G400)\n");
428+
429+#ifdef USEMGAHAL
430+ if (HAL_CHIPSETS) {
431+ Bool loadHal = TRUE;
432+
433+ from = X_DEFAULT;
434+ if (xf86FindOption(pMga->device->options, "NoHal")) {
435+ loadHal = !xf86SetBoolOption(pMga->device->options,
436+ "NoHal", !loadHal);
437+ from = X_CONFIG;
438+ } else if (xf86FindOption(pMga->device->options, "Hal")) {
439+ loadHal = xf86SetBoolOption(pMga->device->options,
440+ "Hal", loadHal);
441+ from = X_CONFIG;
442+ }
443+ if (loadHal && xf86LoadSubModule(pScrn, "mga_hal")) {
444+ xf86LoaderReqSymLists(halSymbols, NULL);
445+ xf86DrvMsg(pScrn->scrnIndex, from,"Matrox HAL module used\n");
446+ pMga->HALLoaded = TRUE;
447+ } else {
448+ xf86DrvMsg(pScrn->scrnIndex, from, "Matrox HAL module not loaded "
449+ "- using builtin mode setup instead\n");
450+ pMga->HALLoaded = FALSE;
451+ }
452+ }
453+#endif
454+
455+ pMga->DualHeadEnabled = FALSE;
456+ if (xf86IsEntityShared(pScrn->entityList[0])) {/* dual-head mode requested*/
457+#ifdef USEMGAHAL
458+ if (pMga->HALLoaded || !MGA_DH_NEEDS_HAL(pMga)) {
459+#else
460+ if (!MGA_DH_NEEDS_HAL(pMga)) {
461+#endif
462+ pMga->DualHeadEnabled = TRUE;
463+ } else if (xf86IsPrimInitDone(pScrn->entityList[0])) {
464+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
465+ "This card requires the \"mga_hal\" module for dual-head operation\n"
466+ "\tIt can be found at the Matrox web site <http://www.matrox.com>\n");
467+ }
468+ }
469+
470+ /*
471+ * In case of DualHead, we need to determine if we are the 'master' head
472+ * or the 'slave' head. In order to do that, at the end of the first
473+ * initialisation, PrimInit is set as DONE to the shared entity. So that
474+ * the second initialisation knows that something has been done before it.
475+ * This always assume that the first device initialised is the master
476 * head, and the second the slave.
477 *
478 */
479 if (xf86IsEntityShared(pScrn->entityList[0])) { /* dual-head mode */
480-
481 if (!xf86IsPrimInitDone(pScrn->entityList[0])) { /* Is it the first initialisation? */
482 /* First CRTC */
483 pMga->SecondCrtc = FALSE;
484 pMga->HWCursor = TRUE;
485 pMgaEnt->pScrn_1 = pScrn;
486- }
487- else {
488+ } else if (pMga->DualHeadEnabled) {
489 /* Second CRTC */
490 pMga->SecondCrtc = TRUE;
491 pMga->HWCursor = FALSE;
492 pMgaEnt->pScrn_2 = pScrn;
493 pScrn->AdjustFrame = MGAAdjustFrameCrtc2;
494- }
495+ } else {
496+ return FALSE;
497+ }
498+ }
499+
500+ if (pMga->DualHeadEnabled) {
501 #ifdef XF86DRI
502 pMga->GetQuiescence = MGAGetQuiescenceShared;
503 #endif
504@@ -1421,65 +1517,6 @@
505 if (pScrn->depth == 8)
506 pScrn->rgbBits = 8;
507
508- /*
509- * Set the Chipset and ChipRev, allowing config file entries to
510- * override.
511- */
512- if (pMga->device->chipset && *pMga->device->chipset) {
513- pScrn->chipset = pMga->device->chipset;
514- pMga->Chipset = xf86StringToToken(MGAChipsets, pScrn->chipset);
515- from = X_CONFIG;
516- } else if (pMga->device->chipID >= 0) {
517- pMga->Chipset = pMga->device->chipID;
518- pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
519- from = X_CONFIG;
520- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
521- pMga->Chipset);
522- } else {
523- from = X_PROBED;
524- pMga->Chipset = pMga->PciInfo->chipType;
525- pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset);
526- }
527- if (pMga->device->chipRev >= 0) {
528- pMga->ChipRev = pMga->device->chipRev;
529- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
530- pMga->ChipRev);
531- } else {
532- pMga->ChipRev = pMga->PciInfo->chipRev;
533- }
534-
535-#ifdef USEMGAHAL
536- if (HAL_CHIPSETS) {
537- if (!xf86ReturnOptValBool(pMga->Options, OPTION_NOHAL, FALSE)
538- && xf86LoadSubModule(pScrn, "mga_hal")) {
539- xf86LoaderReqSymLists(halSymbols, NULL);
540- xf86DrvMsg(pScrn->scrnIndex, X_INFO,"Matrox HAL module used\n");
541- pMga->HALLoaded = TRUE;
542- } else {
543- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Matrox HAL module not loaded "
544- "- using builtin mode setup instead\n");
545- pMga->HALLoaded = FALSE;
546- }
547- }
548-#endif
549-
550- /*
551- * This shouldn't happen because such problems should be caught in
552- * MGAProbe(), but check it just in case.
553- */
554- if (pScrn->chipset == NULL) {
555- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
556- "ChipID 0x%04X is not recognised\n", pMga->Chipset);
557- return FALSE;
558- }
559- if (pMga->Chipset < 0) {
560- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
561- "Chipset \"%s\" is not recognised\n", pScrn->chipset);
562- return FALSE;
563- }
564-
565- xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
566-
567 #ifdef XF86DRI
568 from = X_DEFAULT;
569 pMga->agpMode = MGA_DEFAULT_AGP_MODE;
570@@ -1494,6 +1531,12 @@
571 }
572 from = X_CONFIG;
573 }
574+ if (xf86GetOptValInteger(pMga->Options,
575+ OPTION_AGP_SIZE, &(pMga->agpSize))) {
576+ /* check later */
577+ xf86DrvMsg(pScrn->scrnIndex, from, "Using %d MB of AGP memory\n",
578+ pMga->agpSize);
579+ }
580
581 xf86DrvMsg(pScrn->scrnIndex, from, "Using AGP %dx mode\n",
582 pMga->agpMode);
583@@ -1812,7 +1855,7 @@
584 pScrn->videoRam = MGACountRam(pScrn);
585 }
586
587- if(xf86IsEntityShared(pScrn->entityList[0])) {
588+ if (pMga->DualHeadEnabled) {
589 /* This takes gives either half or 8 meg to the second head
590 * whichever is less. */
591 if(pMga->SecondCrtc == FALSE) {
592@@ -2073,6 +2116,17 @@
593 pMga->pClientStruct->pMga = (MGAPtr) pMga;
594
595 MGAMapMem(pScrn);
596+ /*
597+ * For some reason the MGAOPM_DMA_BLIT bit needs to be set
598+ * on G200 before opening the HALlib. I don't know why.
599+ * MATROX: hint, hint.
600+ */
601+ /*if (pMga->Chipset == PCI_CHIP_MGAG200 ||
602+ pMga->Chipset == PCI_CHIP_MGAG200_PCI) */{
603+ CARD32 opmode;
604+ opmode = INREG(MGAREG_OPMODE);
605+ OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT | opmode);
606+ }
607 MGAOpenLibrary(pMga->pBoard,pMga->pClientStruct,sizeof(CLIENTDATA));
608 MGAUnmapMem(pScrn);
609 pMga->pMgaHwInfo = xalloc(sizeof(MGAHWINFO));
610@@ -2101,7 +2155,7 @@
611 }
612
613 /* copy the board handles */
614- if (xf86IsEntityShared(pScrn->entityList[0])) {
615+ if (pMga->DualHeadEnabled) {
616 pMgaEnt->pClientStruct = pMga->pClientStruct;
617 pMgaEnt->pBoard = pMga->pBoard;
618 pMgaEnt->pMgaHwInfo = pMga->pMgaHwInfo;
619@@ -2182,7 +2236,11 @@
620 * Can we trust HALlib to set the memory configuration
621 * registers correctly?
622 */
623+#ifdef USEMGAHAL
624 else if ((pMga->softbooted || pMga->Primary /*|| pMga->HALLoaded*/ ) &&
625+#else
626+ else if ((pMga->softbooted || pMga->Primary) &&
627+#endif
628 (pMga->Chipset != PCI_CHIP_MGA2064) &&
629 (pMga->Chipset != PCI_CHIP_MGA2164) &&
630 (pMga->Chipset != PCI_CHIP_MGA2164_AGP)) {
631@@ -2264,7 +2322,7 @@
632
633 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "YDstOrg is set to %d\n",
634 pMga->YDstOrg);
635- if(xf86IsEntityShared(pScrn->entityList[0])) {
636+ if(pMga->DualHeadEnabled) {
637 if(pMga->SecondCrtc == FALSE) {
638 pMga->FbUsableSize = pMgaEnt->masterFbMapSize;
639 /* Allocate HW cursor buffer at the end of video ram */
640@@ -2368,7 +2426,7 @@
641 /* This needs to only happen after this board has completed preinit
642 * both times
643 */
644- if(xf86IsEntityShared(pScrn->entityList[0])) {
645+ if(pMga->DualHeadEnabled) {
646 /* Entity is shared make sure refcount == 2 */
647 /* If ref count is 2 then reset it to 0 */
648 if(pMgaEnt->refCount == 2) {
649@@ -2630,6 +2688,7 @@
650 vgaRegPtr vgaReg;
651 MGAPtr pMga = MGAPTR(pScrn);
652 MGARegPtr mgaReg;
653+
654 #ifdef USEMGAHAL
655 Bool digital1 = FALSE;
656 Bool digital2 = FALSE;
657@@ -2736,7 +2795,7 @@
658
659 ); /* MGA_HAL */
660
661- /* getting around bugs in the HAL lib. MATROX: hint, hint */
662+ /* getting around bugs in the HAL lib. MATROX: hint, hint. */
663 MGA_HAL(
664 switch (pMga->Chipset) {
665 case PCI_CHIP_MGA1064:
666@@ -2745,7 +2804,8 @@
667 case PCI_CHIP_MGAG200:
668 case PCI_CHIP_MGAG200_PCI:
669 case PCI_CHIP_MGAG400:
670- if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) {
671+ case PCI_CHIP_MGAG550:
672+ if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) {
673 outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW,
674 pMga->FbCursorOffset >> 10);
675 outMGAdac(MGA1064_CURSOR_BASE_ADR_HI,
676@@ -2769,6 +2829,7 @@
677
678 MGAStormSync(pScrn);
679 MGAStormEngineInit(pScrn);
680+
681 vgaHWProtect(pScrn, FALSE);
682
683 if (xf86IsPc98()) {
684@@ -2840,7 +2901,6 @@
685
686 if (pScrn->pScreen != NULL)
687 MGAStormSync(pScrn);
688-
689 if(pMga->SecondCrtc) {
690 MGARestoreSecondCrtc(pScrn);
691 return;
692@@ -2930,7 +2990,7 @@
693 || (pMga->Chipset == PCI_CHIP_MGAG100_PCI))
694 MGAG100BlackMagic(pMga);
695
696- if (xf86IsEntityShared(pScrn->entityList[0])) {
697+ if (pMga->DualHeadEnabled) {
698 DevUnion *pPriv;
699 pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex);
700 pMgaEnt = pPriv->ptr;
701@@ -2988,7 +3048,7 @@
702 #ifdef USEMGAHAL
703 MGA_HAL(
704 /* There is a problem in the HALlib: set soft reset bit */
705- /* MATROX: hint, hint */
706+ /* MATROX: hint, hint. */
707 if (!pMga->Primary && !pMga->FBDev &&
708 (pMga->PciInfo->subsysCard == PCI_CARD_MILL_G200_SG) ) {
709 OUTREG(MGAREG_Reset, 1);
710@@ -3040,7 +3100,6 @@
711 if (!MGAModeInit(pScrn, pScrn->currentMode))
712 return FALSE;
713 }
714-
715 /* Darken the screen for aesthetic reasons and set the viewport */
716 if (pMga->SecondCrtc == TRUE) {
717 MGASaveScreenCrtc2(pScreen, SCREEN_SAVER_ON);
718@@ -3290,7 +3349,7 @@
719 } else {
720 xf86DrvMsg(pScrn->scrnIndex, driFrom, "Direct rendering disabled\n");
721 }
722- if (xf86IsEntityShared(pScrn->entityList[0]) && pMga->SecondCrtc == FALSE)
723+ if (pMga->DualHeadEnabled && pMga->SecondCrtc == FALSE)
724 pMgaEnt->directRenderingEnabled = pMga->directRenderingEnabled;
725 pMga->haveQuiescense = 1;
726 #endif
727@@ -3318,7 +3377,7 @@
728 Bool
729 MGASwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
730 {
731- return MGAModeInit(xf86Screens[scrnIndex], mode);
732+ return MGAModeInit(xf86Screens[scrnIndex], mode);
733 }
734
735
736@@ -3513,6 +3572,7 @@
737 vgaHWPtr hwp = VGAHWPTR(pScrn);
738 MGAPtr pMga = MGAPTR(pScrn);
739 MGAEntPtr pMgaEnt = NULL;
740+
741 #ifdef USEMGAHAL
742 MGA_HAL( RESTORE_TEXTMODE_ON_DVI(pMga); );
743 #endif
744@@ -3534,7 +3594,7 @@
745 }
746 #endif
747
748- if (xf86IsEntityShared(pScrn->entityList[0])) {
749+ if (pMga->DualHeadEnabled) {
750 DevUnion *pPriv;
751 pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex);
752 pMgaEnt = pPriv->ptr;
753@@ -3543,7 +3603,7 @@
754
755 #ifdef USEMGAHAL
756 MGA_HAL(
757- if(xf86IsEntityShared(pScrn->entityList[0])) {
758+ if(pMga->DualHeadEnabled) {
759 if(pMgaEnt->refCount == 0) {
760 /* Both boards have closed there screen */
761 MGACloseLibrary(pMga->pBoard);
762--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_g450pll.c Sat Jan 12 00:42:57 2002
763+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c Sun Apr 14 15:07:08 2002
764@@ -208,6 +208,26 @@
765 return TRUE;
766 }
767
768+static CARD32 G450ReadMNP(ScrnInfoPtr pScrn)
769+{
770+ MGAPtr pMga = MGAPTR(pScrn);
771+ MGARegPtr pReg;
772+ CARD32 ret = 0;
773+
774+ pReg = &pMga->ModeReg;
775+
776+ if (!pMga->SecondCrtc) {
777+ ret = (CARD8)inMGAdac(MGA1064_PIX_PLLC_M) << 16;
778+ ret |= (CARD8)inMGAdac(MGA1064_PIX_PLLC_N) << 8;
779+ ret |= (CARD8)inMGAdac(MGA1064_PIX_PLLC_P);
780+ } else {
781+ ret = (CARD8)inMGAdac(MGA1064_VID_PLL_M) << 16;
782+ ret |= (CARD8)inMGAdac(MGA1064_VID_PLL_N) << 8;
783+ ret |= (CARD8)inMGAdac(MGA1064_VID_PLL_P);
784+ }
785+ return ret;
786+}
787+
788
789 static CARD32 G450CompareMNP(ScrnInfoPtr pScrn, CARD32 ulFout, CARD32 ulMNP1,
790 CARD32 ulMNP2, long *pulResult)
791@@ -305,6 +325,9 @@
792
793 MGAPtr pMga = MGAPTR(pScrn);
794
795+#ifdef DEBUG
796+ xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Restoring PLLClk = %d\n",f_out);
797+#endif
798 G450FindFirstPLLParam(pScrn, f_out, &ulMNP);
799 ulMNPTable[0] = ulMNP;
800 G450FindNextPLLParam(pScrn, f_out, &ulMNP);
801@@ -454,4 +477,21 @@
802 }
803
804 return TRUE;
805+}
806+
807+long
808+MGAG450SavePLLFreq(ScrnInfoPtr pScrn)
809+{
810+ CARD32 ulMNP = G450ReadMNP(pScrn);
811+ CARD8 ucP;
812+ CARD32 freq;
813+
814+ G450CalculVCO(pScrn, ulMNP, &freq);
815+ ucP = (CARD8)(ulMNP & 0x03);
816+ G450ApplyPFactor(pScrn, ucP, &freq);
817+
818+#ifdef DEBUG
819+ xf86DrvMsg(pScrn->scrnIndex,X_INFO,"Saved PLLClk = %d\n",freq);
820+#endif
821+ return freq;
822 }
823diff -urN XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_macros.h XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h
824--- XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga.orig/mga_macros.h Wed Sep 26 21:59:17 2001
825+++ XFree86-4.2.0/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h Sun Apr 14 15:07:08 2002
826@@ -111,5 +111,8 @@
827
828 #define MGAISGx50(x) ( (((x)->Chipset == PCI_CHIP_MGAG400) && ((x)->ChipRev >= 0x80)) || \
829 ((x)->Chipset == PCI_CHIP_MGAG550) )
830+
831+#define MGA_DH_NEEDS_HAL(x) (((x)->Chipset == PCI_CHIP_MGAG400) && \
832+ ((x)->ChipRev < 0x80))
833
834 #endif /* _MGA_MACROS_H_ */
XFree86 Window System servers and basic programs
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